The binary-info feature that introduced in #54290 causing trouble
with some rp2xxx variant boards.
Turning off this feature defaultly to solve these problems.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Binary Info embeds program meta information in flash,
which can be viewed with RaspberryPi Pico's `picotool`.
Metadata is automatically collected from pinctrl.
It can be override by the Kconfig configurations, such as
```
CONFIG_RPI_PICO_BINARY_INFO_OVERRIDE_PROGRAM_NAME="my program name"
```
When this feature is enabled, pinctrl groups are restricted to
consisting of pins with a single rpi_pico function.
In other words, SPI's MISO and MOSI can be in the same group,
but I2C's SDA cannot be included in this group.
This is rarely an issue in normal use,
and can be resolved by dividing them into separate groups.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Imply XIP from the SoC config to make XIP the default to match the
behaviour between Cortex-M33 and Hazard3 variants.
This fixes cbe6a716d3, which stopped
selecting XIP at the SoC level.
Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
Add an early init hook to check the boot mode and reset into the RP2 USB
bootloader if requested. Includes a snippet to use with any RP2040/RP2350
board to enable the necessary DTS/Kconfig to use the functionality, and
easy DTS includes for boards to use explicitly.
Signed-off-by: Peter Johanson <peter@peterjohanson.com>
The RP2350 SoC series contain two Hazard3 cores, which use the RISC-V
instruction set. Define a new CPU cluster (`hazard3`), which is intended
to be used with the two Hazard3 cores 'plugged in' to the two 'sockets'
in the RP2350 series SoCs.
Update the linker script to support linking against the correct
(ISA-specific) linker script, and to generate a correct IMAGE_DEF for
the target ISA.
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
The RP2350 uses the Xh3irq interrupt controller, which supports nested
and prioritised interrupts. This adds initial support, configuring the
controller in 'direct' (non-vectored) mode.
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
RP2350 has 48 GPIOs, where only the first 30 are broken out to pins on
RP2350A (same as RP2040) and the remaining 18 are only usable on RP2350B.
This change makes the soc pinctrl driver support GPIOs above 31, where
previously it was impossible to configure GPIOs 32 through 47.
Tested on RP2350B, confirming that GPIO44 can be correctly configured for
PWM.
Signed-off-by: Peter Marheine <peter@taricorp.net>
Confirmed by section 3.7.2 in the datasheet (version 29 July 2025) and
running a sample piece of code exercising smuad, smladx and
other DSP intrinsics.
Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
Use this approach for a simpler flow and to make relocation of images
into RAM easier.
Also do not force-select CONFIG_XIP (which is a default anyway), since
RP2350 can boot from SRAM.
Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
Avoid the individual `CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC` for each
board instead to referencing the dt value.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
The image_def header shall not be added to apps that are booted by a
bootloader, e.g. mcuboot. Added proper handling for UF2 by hanan619.
Signed-off-by: Manuel Aebischer <manuel.aebischer@belden.com>
Add UF2 Family ID for Raspberry Pi 2350 and build
UF2 image by default for Pico 2 board
Signed-off-by: Ryan Grachek <grachek@gmail.com>
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
On RP2350, the alt function value can be up to 0x1F, so store as 5 bits.
Signed-off-by: Peter Johanson <peter@peterjohanson.com>
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
A significant amount of the pin muxing is duplicated between the RP2040,
the RP2350A, and RP2350B. Reflect this in the file structure, with a
`-common` suffix used to to indicate this.
Macros are defined in ascending order of the function index in the
relevant table in the datasheet. SoC/SoC-series specific macros are
defined in their respective tables. Functions that are not currently
used (e.g. the new HSTX) are intentionally not defined here as they do
not (currently) have any use in the Zephyr tree (i.e. there's no drivers
that make use of this functionality).
clang-format has been run over the existing definitions to reduce the
noise generated by CI. These are cosmetic changes; I've tried to retain
attribution to the relevant authors where applicable.
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
RP2350 is Raspberry Pi's newest SoC. From the datasheet:
"RP2350 is a new family of microcontrollers from Raspberry Pi that
offers significant enhancements over RP2040. Key features include:
• Dual Cortex-M33 or Hazard3 processors at 150 MHz
• 520 kB on-chip SRAM, in 10 independent banks
• 8 kB of one-time-programmable storage (OTP)
• Up to 16 MB of external QSPI flash/PSRAM via dedicated QSPI bus
...
"
This commit introduces some changes to support the existing RP2040 and
what is describe by Raspberry Pi as the "RP2350 family". Currently there
are 4 published products in the family: RP2350A, RP2350B, RP2354A, and
RP2354A. Within Zephyr's taxonomy, split the configuration as follows:
Family: Raspberry Pi Pico. This contains all RP2XXX SoCs,
SoC Series: RP2040 and RP2350.
SoC: RP2040 and, for now, just the RP2350A, which is present on the Pico
2, where the A suffix indicates QFN-60 package type. This structure is
reflected in `soc/raspberrypi/soc.yml`, and somewhat assumes that there
won't be a RP2050, for example, as a RP2040 with more RAM.
This is foundation work ahead of introducing support for Raspberry Pi's
Pico 2 board, which is fitted with a RP2350A and 4MB of flash.
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
