Commit graph

19 commits

Author SHA1 Message Date
Kumar Gala 6bdd91e9b1 soc: Add ability for SOC to specify runtime CPU detection
Add Kconfig SOC_HAS_RUNTIME_NUM_CPUS symbol that an SoC can
set to specify that it supports determining the number of CPUs
at runtime.

On xtensa add support for SOC_HAS_RUNTIME_NUM_CPUS and expose
soc_num_cpus that the SoC code should set early in boot as the
means to expose the number of cpus.

Signed-off-by: Kumar Gala <kumar.gala@intel.com>
2022-11-03 16:43:53 -04:00
Torsten Rasmussen 6be1b2af9b kconfig: soc and shield cleanup
Always source the Zephyr base soc and shield (board root) Kconfigs
directly from Kconfig instead of generated Kconfig files.

This has the benefit that it is no longer necessary to generate Kconfig
files to source SoC root and shield (board root) when no custom roots
are provided.

Also this cleans up the doc/CMakeLists.txt and ensures that the
doc/CMakeLists.txt is not getting out of sync with the Kconfig.cmake.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-06-11 16:13:22 +02:00
Daniel Leung 0ffcfa9633 timing: introduce timing functions as a generic feature
Add timing functions and APIs.  This is now used with some of the tests
we have for performance and metrics and will be used whereever timing
informations are needed, for example for tracing, profiling and other
operations where timing info is critical.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-09-05 13:28:38 -05:00
Torsten Rasmussen 5f7cc8ded9 cmake: kconfig: support for multiple SOC_ROOT
This commit introduces support for multiple SOC_ROOT.

This means that additional SOC_ROOTs specified using -DSOC_ROOT as
argument to CMake will be forming a list together with ${ZEPHYR_BASE}.

This allows for greater flexibility, as developers can now specify
multiple out-of-tree SoCs and not worry about the SoC used for the
board they compile for.

Also it avoid code, such as:
if(BOARD STREQUAL my_board_using_out_of_tree_soc)
  set(SOC_ROOT some/out/of/tree/soc/path)
endif()
in application CMakeLists.txt.

Finally, allowing multiple SOC_ROOTs prepares for specifying SOC_ROOTs
in Zephyr modules.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2020-08-05 08:06:07 -04:00
Kumar Gala 9ca541a504 linker: Remove deprecated Kconfig options related to linker scripts
Remove Kconfig, linker script, and related bits associated with
CUSTOM_RODATA_LD, CUSTOM_RWDATA_LD, CUSTOM_SECTIONS_LD,
SOC_NOINIT_LD, SOC_RODATA_LD, and SOC_RWDATA_LD options that have been
deprecated since Zephyr 2.2.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-06-12 11:14:28 +02:00
Vincent Wan 180b4df229 soc: kconfig: add SOC_DEPRECATED_RELEASE
Adding a Kconfig parameter so that we can indicate an SoC is to be
deprecated, similar to what is being done for BOARD_DEPRECATED_RELEASE.

Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2020-01-13 10:21:12 -05:00
Nicolas Pitre 1f4b5ddd0f riscv32: rename to riscv
With the upcoming riscv64 support, it is best to use "riscv" as the
subdirectory name and common symbols as riscv32 and riscv64 support
code is almost identical. Then later decide whether 32-bit or 64-bit
compilation is wanted.

Redirects for the web documentation are also included.

Then zephyrbot complained about this:

"
New files added that are not covered in CODEOWNERS:

dts/riscv/microsemi-miv.dtsi
dts/riscv/riscv32-fe310.dtsi

Please add one or more entries in the CODEOWNERS file to cover
those files
"

So I assigned them to those who created them. Feel free to readjust
as necessary.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-08-02 13:54:48 -07:00
Øyvind Rønningstad 5bebf2ae5c soc: Port usage of soc-*.ld to use Cmake
Mark the feature as deprecated

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-05-20 22:28:28 -04:00
Anas Nashif 3ae52624ff license: cleanup: add SPDX Apache-2.0 license identifier
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier.  Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.

By default all files without license information are under the default
license of Zephyr, which is Apache version 2.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-07 08:45:22 -04:00
Ulf Magnusson 735de5fc38 soc: kconfig: Simplify SOC_*_LD deps. with an 'if'
'if FOO' is equivalent to adding 'depends on FOO' to each item within
the 'if'.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-03-26 07:56:39 -05:00
Ulf Magnusson 53376394b7 kconfig: Remove blank lines at the beginning/end of files
Maybe this is some "just in case" thing that got copied around. There's
no need to have a blank line at the beginning or end of Kconfig files.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-03-13 07:29:42 -05:00
Daniel Leung 1134e59bd2 linker: allow SoC to insert linker script fragments
This allows the SoC to specify some additional linker script
fragments into the bss, data and read-only data sections.

For example, the Cypress PSOC6 has a few input sections that
must be put into bss and data sections. Without specifying
these in the linker script, they are consider orphan sections
and the placement is based on linker heuristic which is
arbitrary.

POSIX is not supported as the main linker script is
provided by the host system's binutils and we have no control
over it. Also, currently Xtensa SoCs have their own linker
scripts so there is no need to this feature.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-10-19 16:11:34 -04:00
Alberto Escolar Piedras eea73e13bd soc: Kconfig: Add options for compatible NRF SOCs
Simulated NRF boards based on the POSIX ARCH cannot directly
use the current SOC_*NRF options as these pull options from
the ARM CPU and other peripherals.
This commit adds a new set of hidden SOC_COMPATIBLE_* options to
be selected both by the real SOCs and the simulated ones.
In this manner we can have the common code depend on the
SOC_COMPATIBLE* options instead of the current ones where
neccessary.

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>

(f) arm kconfig
2018-10-15 09:36:37 -04:00
Anas Nashif 1d0136ef3b Revert "linker: allow SoC to insert linker script fragments"
This reverts commit 2fed930f4e.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-10-14 12:14:04 -04:00
Daniel Leung 2fed930f4e linker: allow SoC to insert linker script fragments
This allows the SoC to specify some additional linker script
fragments into the bss, data and read-only data sections.

For example, the Cypress PSOC6 has a few input sections that
must be put into bss and data sections. Without specifying
these in the linker script, they are consider orphan sections
and the placement is based on linker heuristic which is
arbitrary.

POSIX is not supported as the main linker script is
provided by the host system's binutils and we have no control
over it. Also, currently Xtensa SoCs have their own linker
scripts so there is no need to this feature.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-10-09 08:23:41 -04:00
Anas Nashif 071c9dc0f3 soc: logging: move soc tree to new logger
Use the new logger framework for soc related code.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-10-08 17:49:12 -04:00
Piotr Zięcik d393186d51 arch: arm: Introduce CPU_HAS_ARM_MPU and CPU_HAS_NXP_MPU options
This commit introduces CPU_HAS_ARM_MPU and CPU_HAS_NXP_MPU options,
which indicate which flavour of MPU is supported by given SoC family.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2018-09-20 14:16:50 +02:00
Anas Nashif 96455d5881 build: support out of tree SoC definition
Add the glue to make this work with SoC code outside of the tree.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-13 00:56:48 -04:00
Anas Nashif abcf2ad5a8 kconfig: move soc selection to ZEPHYR_BASE/soc/
Rather than do that for each architecture, source SoC Kconfigs where the
code is maintained, under ZEPHYR_BASE/soc.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-13 00:56:48 -04:00