Add a new AARCH32_ARMV8_A Kconfig symbol for ARMv8-A processors
running in AArch32 execution state, modelled after the existing
ARMv8-R AArch32 support. ARMv8-A AArch32 execution state is used
by processors such as the Cortex-A32 that implement only the AArch32
state as well as by other ARMv8-A processors that support AArch32
at specific exception levels.
A dedicated Kconfig symbol is needed (compared to simply reusing
ARMV7_A)because ARMv8-A AArch32 shares some code paths with ARMv7-A
and others with ARMv8-R AArch32. This also means that rather than
introducing a new standalone architecture port, the implementation
selectively extends the code paths used by either of these
architectures based on the architectural requirements as detailed
below.
MMU/fault handling: The implementation uses the existing short
descriptor translation table format used by ARMv7-A, sharing
the MMU programming and FSR encodings.
exception modes stack initialization: ARMv8-A AArch32 implements the
same exception modes as ARMv7-A and so reuses the ARMv7-A exception
mode stack initialization framework directly.
VBAR programming: Unlike ARMv7-A, ARMv8-A AArch32 mandates the use of
VBAR to store the vector table base address. So extend the vector
table relocation support already used by ARMv8-R AArch32. Also map
the vectors region from arch-level code rather than requiring each
SoC to provide this.
Arm generic timer support: The Generic Timer is mandatory in ARMv8-A
AArch32 and is accessed via the system register interface rather than
the memory-mapped I/O interface used by some ARMv7-A implementations.
The system-register-based timer path is therefore shared with ARMv8-R
AArch32.
interrupt masking: Reuse the CPSR based interrupt masking used by
ARMv7-A and ARMv8-R AArch32.
SVC based fatal error path: Reuse the SVC based fatal error path
shared by ARMv7-A and ARMv8-R AArch32.
Signed-off-by: Silesh C V <silesh@alifsemi.com>
Specifically configure IFX_UART_ENABLED as OFF for
Zephyr's integration of tf-m for pse84.
Additionally move the pse84 specific configuration
from the tf-m CMakeLists to the soc level one.
Signed-off-by: Laura Carlesso <laura.carlesso@infineon.com>
Update the path for Infineon tf-m generated source
accordingly to the updated platform chanfes fone in
the trusted-firmware-m module.
Signed-off-by: Laura Carlesso <laura.carlesso@infineon.com>
Add some dependencies to Kconfig options in `Kconfig.psa.auto` that
wouldn't make sense to enable without their dependencies.
This is just a first version with few additions, more can be added
later.
Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
- enable MONOLITHIC_NBU for NXP_IEEE802154_MAC for rw61x
- update hal_nxp ieee_802_15_4 module to 26.06.00-pvw2
Signed-off-by: Laurent Clementine <laurent.clementine@nxp.com>
Signed-off-by: George Stefan <george.stefan@nxp.com>
LVGL RGB888 and PIXEL_FORMAT_RGB_888 share the same byte order, so the
default-on LV_Z_COLOR_24_BGR_TO_RGB swap actually corrupted RGB_888
displays. Swap only when the driver reports PIXEL_FORMAT_BGR_888 and drop
the Kconfig option.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Disable the device.system component in the MCUX SDK device
configuration for i.MX952 to avoid conflicts with Zephyr device
initialization system.
Signed-off-by: Qiang Zhao <qiang.zhao@nxp.com>
Enable the MU1 (Messaging Unit 1) driver component in the
MCUX SDK driver configuration to support inter-core
communication on i.MX952.
Signed-off-by: Qiang Zhao <qiang.zhao@nxp.com>
SiWx91x provide two DMA hardware block: GPDMA and UDMA, The GPDMA is
properly named: silabs,gpdma. However, the UDMA is named
"silabs,siwx91x-dma" without any reference to the hardware block it is
supposed to run.
Rename the UDMA driver to fix this inconsistency.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Add compilation of sl_openthread library to silabs 15.4 radio
driver to enable RAIL operations for OpenThread.
Co-Authored-by: David Boullie <David.Boullie@silabs.com>
Co-Authored-by: Sree Sreerajatha <sree.sreerajatha@silabs.com>
Signed-off-by: David Boullie <David.Boullie@silabs.com>
The pico-sdk rand module places rng_state in a .uninitialized_data
section that must not be initialized at boot. The linker fragment was
added via zephyr_linker_sources(DATA_SECTIONS ...), which placed a
(NOLOAD) section in the middle of the initialized data region. This
caused a VMA/LMA mismatch during the boot-time flash-to-RAM copy:
the NOLOAD section consumed VMA but no LMA, shifting all subsequent
section data to the wrong RAM addresses.
On RP2350 boards with USB enabled, this corrupted the USBD context
struct (placed in an iterable section after the NOLOAD gap), causing
USB initialization to fail with "Failed to initialize language
descriptor (-1)" followed by a bus fault.
Fix by using NOINIT instead of DATA_SECTIONS, which places the
uninitialized data in the noinit section where NOLOAD content
belongs. Update the linker fragment to only contribute the section
glob, since the noinit section wrapper is provided by
common-noinit.ld.
Signed-off-by: Scott Shawcroft <scott@tannewt.org>
Add driver for NXP MCUX Segment LCD (SLCD) controller to support
segment-style auxiliary displays.
The driver provides a unified implementation that handles both
the SLCD controller (nxp,slcd) and a generic SLCD panel.
It supports the generic SLCD panel with common header and binding
which includes the following panel features:
- Segment types(7, 14, 16 segments)
- Configurable front plane pins and back plane COMs
- pin/COM for each segment
- Optional pin/COM for each indicator
- Optional colon/dot indicators
Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
MCUX SDK drivers use DataQuickAccess, CodeQuickAccess, and
NonCacheable input sections for data, code, and NonCacheable
areas that require special placement.
The NXP HAL glue currently registers linker snippets for these
sections unconditionally on Cortex-M, which places them in the
default Zephyr SRAM-backed sections.
This prevents boards from using a memory layout where zephyr,sram
points to one memory region, such as OCRAM, while MCUX quick access
data or code must live in TCM. A board-provided linker snippet cannot
override the default placement because the HAL snippet consumes the
input section first.
Add Kconfig choices for MCUX DataQuickAccess, CodeQuickAccess, and
NonCacheable placement. The default selections preserve the existing
behavior, while new DTCM, ITCM, and CUSTOM options allow boards or
applications to place these sections explicitly.
Apply the same placement choices to both MCUX and S32 HAL glue paths,
since both use the shared MCUX linker snippets.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
To improve mapping of Kconfig to TF-PSA-Crypto options.
Make it default-enabled for now because MCUboot fails to
build without it (undefined `mbedtls_memory_buffer_alloc_init()`) and
there might be other consequences to disabling it by default.
Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
SLI_SI91X_ENABLE_OS and SL_SI91X_SI917_RAM_MEM_CONFIG are not specific to
the Network Co-Processor. They are also required by the Sleeptimer and for
deep sleep.
It is expected that Sleeptimer and Power Management will eventually be
usable without enabling the NWP. Move these definitions outside of the
CONFIG_SILABS_SIWX91X_NWP guard so they are always applied. This has no
impact on current builds since the NWP is always enabled alongside these
features today.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Using Mbed TLS in the names wasn't accurate as it may be some other
PSA Crypto implementation.
Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
To allow specifying a different TF-PSA-Crypto paths when using
CONFIG_TF_PSA_CRYPTO_CUSTOM.
This is useful as Mbed TLS automatically compiles with include
directories pointing to TF_PSA_CRYPTO_DIR.
The Kconfig option is made available even when CONFIG_MBEDTLS
is disabled because there are tests that manually make use
of the TF-PSA-Crypto path, and enabling CONFIG_PSA_CRYPTO
makes them crash somehow (at least net.lwm2m.lwm2m_engine
on mps2/an385).
Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
Just as we have for Mbed TLS, provide the option for users that want
to bring their own TF-PSA-Crypto.
To that end, guard references to the tfpsacrypto CMake
library as well as the inclusion of zephyr_entropy.c
and zephyr_init.c behind CONFIG_TF_PSA_CRYPTO_BUILTIN.
Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
- Add Fast peripherals, GRTC CLCK pin, VPR121, VPR130
and MIPIRFFE Ctrlsel configuration to nRF9251.
- Add Trace port Ctrlsel support for nRF9251 and nRF9280.
- Simplify script by removing Family and rely only on SoC
number.
Signed-off-by: Aymen LAOUINI <aymen.laouini@nordicsemi.no>
Having an interface library named "mbedTLS" and the real library named
"mbedtls" (as provided by the Mbed TLS module) is misleading.
This commit replaces:
- mbedTLS -> mbedtls_iface for the CMake library. "mbedTLS" is still
available as alias to "mbedtls_iface" for backward
compatibility, but this should be removed in the future.
- mbedTLS -> Mbed TLS in comments and documentation.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
Add missing include directory for the TF-M build.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
Signed-off-by: Laura Carlesso <laura.carlesso@infineon.com>
- Add TFM_PUBLIC_KEY_FORMAT as Kconfig instead of CMake variable. It tells
in which format the public key is stored in the signed images.
Available options:
* full: store the public key in raw format;
* hash: store only the hash of the key.
- Modify all the boards that were previously setting TFM_PUBLIC_KEY_FORMAT
in their cmake files. Those changes were not required before because
"full" was already set by default when not otherwise specified, and
they are not needed now because that's the default for the Kconfig.
- Fix TF-M Cmake logic to properly set the key format used for the signing
key.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
By default TF-M will installs TF-PSA-Crypto headers in the binary folder,
but this will duplicate what the TF-PSA-Crypto library already exports
in Zephyr. Disable this feature.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
Prevent TF-M from signing images as this requires installing some extra
unnecesary Python packages (and it also wastes time), but keep generating
object files that are required to sign images.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
Specify TF-PSA-Crypto path instead of the Mbed TLS 3.6 one. This is
required to build the crypto support in TF-M.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
The serial-memory library allows to interact with the external flash but
its code needs to be relocated to RAM if the external flash is where the
code is executing from or it could cause faults.
Signed-off-by: Laura Carlesso <laura.carlesso@infineon.com>
Add a new Kconfig option to disable the stable BSP from build
and make part of the CMake file dependable on it to avoid conflicts
with external BSPs.
Also, remove remains of the old solution.
Signed-off-by: Magdalena Pastula <magdalena.pastula@nordicsemi.no>
When building with the address sanitizer and size optimizations on 32-bit
x86 (e.g. native_sim), the TF-PSA-Crypto bignum_core.c assembly fails
with: error: 'asm' operand has impossible constraints
A similar fix existed for the previous mbedtls 3.x integration (commit
691486de83) but was lost during the CMakeLists.txt rewrite for
Mbed TLS 4.x / TF-PSA-Crypto 1.x (commit 393350fd65).
Restore the workaround by forcing speed optimization (-O2) for
bignum_core.c when ASAN is enabled on 32-bit POSIX targets.
Signed-off-by: Jeremy Truttmann <jetstreeam.code@outlook.com>
- Modify Infineon module's CMakeLists.txt to include the correct .c
file, based on the devicetree flash node's "compatible" variable for
the supported, Infineon "edge" family platforms
- Add component name to kit_pse84_eval board's dtsi "flash" node
- Add component name to kit_pse84_ai board's dtsi "flash" node
- Update version of hal_infineon module in west.yml
Assisted-by: GitHub Copilot:claude-sonnet-4.6
Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
Make the per-family unicast route-table options user visible and
separate them more clearly from packet forwarding.
Expose NET_IPV4_ROUTE and NET_IPV6_ROUTE as the route-table support
symbols used for static routes, shell route commands, and host-side
route selection. Rename NET_IPV4_ROUTING and NET_IPV6_ROUTING to
NET_IPV4_FORWARDING and NET_IPV6_FORWARDING so the forwarding options
describe router behavior only.
Keep the old routing symbols as deprecated compatibility aliases,
move orig_iface packet metadata behind an internal helper symbol, and
update route test configs to select the route-table options
explicitly. Also add migration-guide notes so out-of-tree users know
how the old and new symbols map.
Assisted-by: Copilot:GPT-5.4
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
Current upstream zephyr have enabled CONFIG_TFM_LOG_LEVEL_SILENCE
which will break the build when TFM_REGRESSION_S enabled. The reason
that it breaks is that the variable which shares the UART instance,
this is also aligning to other 54L soc, we can reenable it when
NCSDK-31930 is resolved.
Added nrf71 support for tf-m to use TFM_PERIPHERAL_UART30_SECURE when
SECURE_UART is enabled, aligning to 54L impplementation.
Signed-off-by: Travis Lam <travis.lam@nordicsemi.no>
Extend enum ieee802154_rx_fail_reason and map them
to OT errors. This ensures that otPlatRadioReceiveDone is
handled as per Openthread spec.
Signed-off-by: sree sreerajatha <sree.sreerajatha@silabs.com>
This key exchange was removed with Mbed TLS v4.0, but it was left by
mistake in Zephyr.
Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
This key exchange was removed with Mbed TLS v4.0, but it was left by
mistake in Zephyr.
Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
When writes are issued to the mram controller without verifying that it
is ready, it can cause the reads to be stalled until all writes finish.
Fix this by adding a wait busy loop before each MRAM_WORD aligned write
and disable autopowerdown before starting the write.
Signed-off-by: Riadh Ghaddab <riadh.ghaddab@nordicsemi.no>
Convert SMC driver inclusion from SOC-specific configuration to
devicetree-based configuration:
- CONFIG_SOC_SERIES_KINETIS_K2X → CONFIG_DT_HAS_NXP_SMC_ENABLED
- CONFIG_SOC_SERIES_KE1XZ → CONFIG_DT_HAS_NXP_SMC_ENABLED
Gate LLWU HAL driver on CONFIG_WUC_MCUX_LLWU (the Zephyr WUC driver
Kconfig) rather than DT node presence, since the DT node may exist
in disabled state without the driver being needed.
Signed-off-by: Holt Sun <holt.sun@nxp.com>
It doesn't really serve a purpose since the addition of
CONFIG_PSA_CRYPTO.
Replace remaining uses of the former by the latter.
TF-M now implies CONFIG_PSA_CRYPTO the same way as
CONFIG_MBEDTLS because otherwise we get build failures
if we build Mbed TLS without CONFIG_PSA_CRYPTO enabled.
Hopefully we can remove these two in a later PR.
Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
Simply make it depend on CONFIG_PSA_CRYPTO which allows to cover the
case where a PSA Crypto provider other than TF-M or Mbed TLS is used
and CONFIG_MBEDTLS_PSA_CRYPTO_C is not enabled.
Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
