Commit graph

15409 commits

Author SHA1 Message Date
Peter Bigot
258877a921 irq: document requirement that irq_lock/unlock provides a memory barrier
Correct functioning of spinlocks requires that they be memory barriers.
With CONFIG_SMP=y this falls out as a consequence of using sequentially
consistent atomic operations to ensure all processors are locked out.
With CONFIG_SMP=n a spinlock uses arch_irq_lock/unlock(), so the barrier
behavior must come from that function.

As arch_irq_lock/unlock() delegates to irq_lock/unlock() for
documentation, document the barrier requirement there.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-01-26 13:42:17 -05:00
Watson Zeng
f71cd2aaf5 spinlock: validate: fix the dependency with MP_NUM_CPUS
the implementation of spinlock validation uses two LSB bits in the
bottom of a pointer union to store a CPU index, which only has space
for 4 CPUS. the MP_NUM_CPUS should be <= 4.

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2021-01-26 08:43:45 -05:00
Hubert Miś
0475cd0eae net: coap: Allow encoding packets using data from constant buffers
Token and payload are appended from data buffers to a CoAP packet
being encoded. Keyword const was missing for parameters in functions
appending these parts to a packet.

Now token and paylod can be copied to CoAP packet from constant
buffers, that can be stored in ROM.

Signed-off-by: Hubert Miś <hubert.mis@nordicsemi.no>
2021-01-26 06:17:41 -05:00
Hubert Miś
759f7454d8 net: coap: define max token length
This patch introduces COAP_TOKEN_MAX_LEN definition in coap.h file.
This definition replaces magic number across CoAP protocol
implementation and CoAP samples.

Signed-off-by: Hubert Miś <hubert.mis@nordicsemi.no>
2021-01-26 06:17:41 -05:00
Peter Bigot
f91e9fba51 device: fix potential truncation of DT-derived device names
While using the encoded path to a device tree node guarantees a unique
identifier for the corresponding device there is a limit on the number
of characters of that name that can be captured when looking up a
device by name from user mode, and the path can exceed that limit.

Synthesize a unique name from the node dependency ordinal instead, and
update the gen_defines script to record the name associated with the
full path in the extern declaration.

Add a build-time check that no device is created with a name that
violates the user mode requirement.

Also update the network device DTS helper functions to use the same
inference for dev_name and label that the real one does, since they
bypass the real one.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-01-25 16:26:12 -05:00
Volodymyr Babchuk
490408fa8e aarch64: introduce explicit instructions to access MMIO
With classic volatile pointer access gcc something generates
access instructions with immediate offset value, like

str     w4, [x1], #4

Such instructions produce invalid syndrome in HSR register when are
trapped by hypervisor. This leads to inability to emulate device access
in hypervisor.

So we need to make sure that any access to device memory is done
with plain str/ldr instructions without offset.

Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
2021-01-24 13:59:55 -05:00
Volodymyr Babchuk
cd86ec2655 aarch64: add ability to generate image header
Image header is compatible with Linux aarch64 boot protocol,
so zephyr can be booted with U-boot or Xen loader.

Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
2021-01-24 13:59:55 -05:00
Andrew Boie
6c97ab3167 mmu: promote public APIs
These are application facing and are prefixed with k_.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Andrew Boie
ed22064e27 x86: implement demand paging APIs
All arch_ APIs and macros are implemented, and the page fault
handling code will call into the core kernel.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Andrew Boie
b9bbef2a2c kernel: add app-facing demand paging APIs
Routines to evict memory, page-in memory, and set pinned state
at runtime.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Andrew Boie
ecb25fec51 mmu: ensure gperf data is mapped
Page tables created at build time may not include the
gperf data at the very end of RAM. Ensure this is mapped
properly at runtime to work around this.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Andrew Boie
5db615bb38 mmu: add k_mem_free_get()
Return the amount of physical anonymous memory remaining.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Andrew Boie
8ccec8eba6 kernel: add k_mem_map() interface
Allows applications to increase the data space available to Zephyr
via anonymous memory mappings. Loosely based on mmap().

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Andrew Boie
e35f179db3 kernel: add page frame management
Initialize the page frame ontology at boot and update it
when we do memory mappings.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Andrew Boie
951e4a8a9a arm64: linker: define z_mapped_* symbols
Add linker symbols corresponding to the start and end of the
mapped Zephyr image. This is not used by the ARM arch yet, but
is required to compile the core kernel MMU code.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Andrew Boie
94aedfbc77 x86: linker: define z_mapped_* symbols
We will use this to map the kernel instead of all RAM.
The end of the kernel is always page-aligned, regardless
of CONFIG_SRAM_REGION_PERMISSIONS as it must be mapped.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Andrew Boie
5791434ee5 linker-defs: add syms for kernel image bounds
These are needed on MMU systems and define where the kernel
image resides in virtual memory at boot so that it may be
memory-mapped.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Peter Bigot
3746ebc305 Revert "device: inject device dependency information from devicetree nodes"
This reverts commit b61515320e.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-01-23 18:01:03 -05:00
Peter Bigot
affa7a1c7e Revert "device: add post-process of elf file to manage device handles"
This reverts commit 40d3653758.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-01-23 18:01:03 -05:00
Peter Bigot
9c70fb1e18 Revert "linker: common-rom: tweak section naming to feet all linkers"
This reverts commit fd5fa203b6.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-01-23 18:01:03 -05:00
Eugeniy Paltsev
fd5fa203b6 linker: common-rom: tweak section naming to feet all linkers
MWDT toolchain adds additional suffix to sections name in case of
ffunction-sections / fdata-sections are enabled.

The 40d3653758 commit
(device: add post-process of elf file to manage device handles)
breaks linkage with MWDT toolchain as it adds new sections
which are not meet MWDT requirements.

Let's pick a single set of rules and syntax that work for all
toolchain.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2021-01-22 15:44:20 -05:00
Hake Huang
2a8a580825 clocks: add clock api for gpt
add clock api for gpt

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2021-01-22 08:34:49 -06:00
Watson Zeng
f27e7bccf9 arc: sys_io: fix sys_read32 return value from uint16_t to uint32_t
Fix sys_read32 return value from uint16_t to uint32_t.
Current implementation causes read/modify/write of 32bit
registers to fail on the high bits.

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2021-01-22 09:32:09 -05:00
Flavio Ceolin
321ce7fb77 power: Use substate-id in pm subsystem
Change subsystem to use struct pm_state with substate-id instead of
using only the power state category.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin
c5e82ecec3 power: Add substate-id property for a power state
There are platforms that have multiple states that maps to a specific
Zephyr power state. To accommodate this sort of situation this commit
adds an additional property to a power state that can be used by the
platform.

The power state now consists of two properties, a category and a
substate-id. The former property is the current power state.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin
579f7049c7 power: Move pm subsystem to new power states
Migrate the whole pm subsystem to use new power states information
from power_state.h and get states and residency properties from
device tree.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin
539ccb880a power: dts: Return empty list when the are no power states
Return an empty list when information about power states is not
defined in the device tree of an specific target.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin
47e3577ff2 dts: power: Change pm state properties
Making it looks more Linux alike

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Luiz Augusto von Dentz
d8a41c8179 net: buf: Allow passing NULL as allocator to net_buf_append_bytes
This enables to use net_buf_append_bytes without passing an allocator in
which case the code would attempt to use the net_buf_pool of the
original buffer.

Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2021-01-22 16:30:19 +02:00
Peter Bigot
0ab314f705 kernel: const-qualify objects used to calculate delay values
The internal API to measure time until a delay expires does not modify
the referenced timeout.  Make the functions that call it take pointers
to const objects, so that they can be used with pointer to
const-qualified containers.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-01-22 08:05:26 -06:00
Anas Nashif
9c86416598 Revert "linker-defs: add syms for kernel image bounds"
This reverts commit 8a365048bb.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif
25d589d46d Revert "x86: linker: define z_mapped_* symbols"
This reverts commit 891776ec2a.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif
8e6add58b0 Revert "arm64: linker: define z_mapped_* symbols"
This reverts commit 9559223c7b.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif
8e84eaf73e Revert "kernel: add page frame management"
This reverts commit 2ca5fb7e06.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif
0417b97257 Revert "kernel: add k_mem_map() interface"
This reverts commit 69d39af5e6.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif
6b82664a5a Revert "mmu: add k_mem_free_get()"
This reverts commit 9111ec2c19.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif
d887e078f9 Revert "mmu: ensure gperf data is mapped"
This reverts commit e9bfd64110.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif
495c6c72ab Revert "kernel: add app-facing demand paging APIs"
This reverts commit d5b8fe16ad.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif
adff757c72 Revert "x86: implement demand paging APIs"
This reverts commit 7711c9a82d.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif
ef17f889dc Revert "mmu: promote public APIs"
This reverts commit 63fc93e21f.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Daniel Leung
d3218ca515 debug: coredump: remove z_ prefix for stuff used outside subsys
This removes the z_ prefix those (functions, enums, etc.) that
are being used outside the coredump subsys. This aligns better
with the naming convention.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-01-21 22:08:59 -05:00
Daniel Leung
2b53f3ded2 debug: coredump: add new backend using flash partition
This adds another simple backend to use flash partition as
backing storage.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-01-21 22:08:59 -05:00
Daniel Leung
1dc813853a debug: coredump: add query and command APIs
This adds two new APIs to the coredump subsystem to perform
query and command. These can be used to query coredump subsys
for information, and to perform commands such as finding
out if there is a stored coredump.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-01-21 22:08:59 -05:00
Daniel Leung
c4de586fbe debug: coredump: no need to track errors at frontend
The coredump frontend (mostly) consists of wrappers of backend
functions so there is really no need to track errors at
the frontend level. Let the backends deal with their own errors
and this simplifies the code a bit.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-01-21 22:08:59 -05:00
Andy Ross
e932a1537c arch: tests: Document interrupt delivery behavior after arch_irq_disable()
Upcoming changes from Andrew that add a global timeout to the kernel
broke because of some voodoo behavior in the kernel/context test.  It
will use arch_irq_disable() on the timer interrupt directly to prevent
interrupts and measure timekeeping in their absence.  But some
architectures[1] don't reliably deliver interrupts that arrive, which
means that a running timeout that exists across this period will
result in a corrupt timeout queue.

Document that rule for architectures, move the offending test to the
end of the test suite (to minimize the chance of interacting with
other test code) and put a giant warning about the situation on it.
Long term, we may want to rework this test to do its job in other
ways.

[1] On x86, the interrupt disable happens at the IO-APIC level, while
interrupt latching and delivery is downstream in each CPU's Local
APIC.  An IO-APIC masked interrupt is completely invisible to the APIC
and can never be delivered once the line goes low.

Fixes #31333

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-01-21 17:50:01 -05:00
Johann Fischer
ecc57a12a6 include: power: include missing header for slist
Include missing header for slist.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2021-01-21 16:47:29 -05:00
Andrew Boie
63fc93e21f mmu: promote public APIs
These are application facing and are prefixed with k_.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-21 16:47:00 -05:00
Andrew Boie
7711c9a82d x86: implement demand paging APIs
All arch_ APIs and macros are implemented, and the page fault
handling code will call into the core kernel.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-21 16:47:00 -05:00
Andrew Boie
d5b8fe16ad kernel: add app-facing demand paging APIs
Routines to evict memory, page-in memory, and set pinned state
at runtime.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-21 16:47:00 -05:00
Andrew Boie
e9bfd64110 mmu: ensure gperf data is mapped
Page tables created at build time may not include the
gperf data at the very end of RAM. Ensure this is mapped
properly at runtime to work around this.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-21 16:47:00 -05:00