This commit removes the flexram,bank-spec property from dtsi files.
The property causes flexram to be dynamically configured based on
the configuration in flexram,bank-spec. This is a problem for 2 reasons:
1) The FlexRAM will always be dynamically reconfigured to default
fuse configuration. This is unnecessary if using default fuses.
2) If a user decides to program fuses. The FlexRAM will still be
reconfigured to the default fuse configuration.
Modify description in the binding to show how to use the property at:
dts/bindings/memory-controllers/nxp,flexram.yaml
Added board overlay to mimxrt1170_evk_cm7 magic_addr:
samples/boards/nxp/mimxrt1170_evk_cm7/magic_addr/boards
Signed-off-by: Jacob Wienecke <jacob.wienecke@nxp.com>
Enable NXP FlexRAM in DTS and SOC code.
Do not configure flexram at runtime if the code is in the RAM.
Fix RT1060 DT to be more accurate.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Those dividers were configured in Kconfig so far. Add 'arm-podf',
'ahb-podf' and 'ipg-podf' "fixed-factor-clock" compatible DT child nodes
under 'ccm' (Clock Control Module) and use configured 'clock-div' values
instead of Kconfig equivalents.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Add gpio-reserved-ranges property to gpio controllers on RT10xx devices
that have gaps in their GPIO numbering.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This device-tree file is only used by rt10xx dtsi files, as rt11xx (and
other families as well) have their own root SoC specific dtsi file.
Rename nxp_rt.dtsi to nxp_rt10xx.dtsi for consistency across families.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
In order for pinctrl support to be complete, RT series GPIO driver must
support pinmuxing within the driver level. RT series pinmux settings do
not correspond directly to gpio port/pin numbers, so use DTS mappings to
pinctrl nodes to select and apply pinmux settings in the gpio driver.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Added a driver to enable the GPT timer on RT1xxx parts to be used
instead of systick as a clock source. The timer is set to run in reset
mode, and uses the low frequency 32kHz oscillator for power savings
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
gpt has internal divider, add dedicated attributes
nxp,gptfreq is added as required one
gpt can customize the gpt freq
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Refactors nxp i.mx, kinetis, and lpc soc-level device trees to use
DT_SIZE_K and DT_SIZE_M macros to define internal memory sizes. This is
self documenting and easier to read.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Have nodelabels match the SoC docs so when a nodelabel reference is
made in the code its easier to relate to the SoC.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit adds a fixed clock node (representing clock driving
system bus). The added node is then referenced by peripherals requiring
information about driving clock frequency.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
