soc: nxp: rt1xxx: Enable NXP FlexRAM

Enable NXP FlexRAM in DTS and SOC code.

Do not configure flexram at runtime if the code is in the RAM.

Fix RT1060 DT to be more accurate.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This commit is contained in:
Declan Snyder 2023-09-14 19:40:17 -05:00 committed by Carles Cufí
commit 2d1fdb5586
14 changed files with 178 additions and 12 deletions

View file

@ -6,6 +6,15 @@
#include <nxp/nxp_rt10xx.dtsi>
&flexram {
flexram,num-ram-banks = <4>;
/* default fuse */
flexram,bank-spec = <FLEXRAM_OCRAM>,
<FLEXRAM_OCRAM>,
<FLEXRAM_DTCM>,
<FLEXRAM_ITCM>;
};
&sysclk {
clock-frequency = <500000000>;
};

View file

@ -7,6 +7,15 @@
#include <nxp/nxp_rt10xx.dtsi>
&flexram {
flexram,num-ram-banks = <4>;
/* default fuse */
flexram,bank-spec = <FLEXRAM_OCRAM>,
<FLEXRAM_OCRAM>,
<FLEXRAM_DTCM>,
<FLEXRAM_ITCM>;
};
&sysclk {
clock-frequency = <500000000>;
};

View file

@ -7,6 +7,19 @@
#include <nxp/nxp_rt10xx.dtsi>
&flexram {
flexram,num-ram-banks = <8>;
/* default fuse */
flexram,bank-spec = <FLEXRAM_OCRAM>,
<FLEXRAM_OCRAM>,
<FLEXRAM_DTCM>,
<FLEXRAM_DTCM>,
<FLEXRAM_ITCM>,
<FLEXRAM_ITCM>,
<FLEXRAM_OCRAM>,
<FLEXRAM_OCRAM>;
};
&sysclk {
clock-frequency = <500000000>;
};

View file

@ -7,6 +7,19 @@
#include <nxp/nxp_rt10xx.dtsi>
&flexram {
flexram,num-ram-banks = <8>;
/* default fuse */
flexram,bank-spec = <FLEXRAM_OCRAM>,
<FLEXRAM_OCRAM>,
<FLEXRAM_DTCM>,
<FLEXRAM_DTCM>,
<FLEXRAM_ITCM>,
<FLEXRAM_ITCM>,
<FLEXRAM_OCRAM>,
<FLEXRAM_OCRAM>;
};
&sysclk {
clock-frequency = <500000000>;
};

View file

@ -6,6 +6,10 @@
#include <nxp/nxp_rt10xx.dtsi>
&flexram {
flexram,num-ram-banks = <16>;
};
&sysclk {
clock-frequency = <500000000>;
};

View file

@ -5,6 +5,27 @@
*/
#include <nxp/nxp_rt10xx.dtsi>
&flexram {
flexram,num-ram-banks = <16>;
/* default fuse */
flexram,bank-spec = <FLEXRAM_OCRAM>,
<FLEXRAM_OCRAM>,
<FLEXRAM_OCRAM>,
<FLEXRAM_OCRAM>,
<FLEXRAM_DTCM>,
<FLEXRAM_DTCM>,
<FLEXRAM_ITCM>,
<FLEXRAM_ITCM>,
<FLEXRAM_ITCM>,
<FLEXRAM_ITCM>,
<FLEXRAM_DTCM>,
<FLEXRAM_DTCM>,
<FLEXRAM_OCRAM>,
<FLEXRAM_OCRAM>,
<FLEXRAM_OCRAM>,
<FLEXRAM_OCRAM>;
};
&ccm {
arm-podf {
clock-div = <2>;

View file

@ -6,14 +6,33 @@
#include <nxp/nxp_rt10xx.dtsi>
/* i.MX rt1060 has two continuous on-chip RAM, one is part of the
* FlexRAM mapped at 0x20280000 (vs 0x20280000 on rt1050) and is
* configurable (256KB by defaults), the other one is dedicated 512KB
* ram (OCRAM2) mapped at 0x20200000. In order to have a continuous
* region, we describe them in one 768Kb unique node.
*/
&ocram {
reg = <0x20200000 DT_SIZE_K(768)>;
&flexram {
/* FlexRAM OCRAM is at a different address on RT1060 */
/delete-node/ ocram@20200000;
ocram: ocram@20280000 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x20280000 DT_SIZE_K(256)>;
zephyr,memory-region = "OCRAM";
};
flexram,num-ram-banks = <16>;
/* default fuse */
flexram,bank-spec = <FLEXRAM_OCRAM>,
<FLEXRAM_OCRAM>,
<FLEXRAM_OCRAM>,
<FLEXRAM_OCRAM>,
<FLEXRAM_DTCM>,
<FLEXRAM_DTCM>,
<FLEXRAM_ITCM>,
<FLEXRAM_ITCM>,
<FLEXRAM_ITCM>,
<FLEXRAM_ITCM>,
<FLEXRAM_DTCM>,
<FLEXRAM_DTCM>,
<FLEXRAM_OCRAM>,
<FLEXRAM_OCRAM>,
<FLEXRAM_OCRAM>,
<FLEXRAM_OCRAM>;
};
&ccm {
@ -26,9 +45,9 @@
};
};
/* i.MX rt1060 has a second Ethernet controller. */
/ {
soc {
/* i.MX rt1060 has a second Ethernet controller. */
enet2: ethernet@402d4000 {
compatible = "nxp,kinetis-ethernet";
reg = <0x402D4000 0x628>;
@ -42,6 +61,13 @@
interrupt-names = "IEEE1588_TMR";
};
};
/* RT1060 has a dedicated OCRAM region */
ocram2: ocram@20200000 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x20200000 DT_SIZE_K(512)>;
zephyr,memory-region = "OCRAM2";
};
};
};

View file

@ -7,6 +7,27 @@
#include <nxp/nxp_rt1060.dtsi>
&flexram {
flexram,num-ram-banks = <16>;
/* default fuse */
flexram,bank-spec = <FLEXRAM_OCRAM>,
<FLEXRAM_OCRAM>,
<FLEXRAM_OCRAM>,
<FLEXRAM_OCRAM>,
<FLEXRAM_DTCM>,
<FLEXRAM_DTCM>,
<FLEXRAM_ITCM>,
<FLEXRAM_ITCM>,
<FLEXRAM_ITCM>,
<FLEXRAM_ITCM>,
<FLEXRAM_DTCM>,
<FLEXRAM_DTCM>,
<FLEXRAM_OCRAM>,
<FLEXRAM_OCRAM>,
<FLEXRAM_OCRAM>,
<FLEXRAM_OCRAM>;
};
&flexspi2 {
status = "okay";
reg = <0x402a4000 0x4000>, <0x70000000 DT_SIZE_M(4)>;

View file

@ -11,6 +11,7 @@
#include <zephyr/dt-bindings/gpio/gpio.h>
#include <zephyr/dt-bindings/i2c/i2c.h>
#include <zephyr/dt-bindings/pwm/pwm.h>
#include <zephyr/dt-bindings/memory-controller/nxp,flexram.h>
/ {
chosen {
@ -87,13 +88,17 @@
soc {
flexram: flexram@400b0000 {
compatible = "nxp,imx-flexram";
compatible = "nxp,flexram";
reg = <0x400b0000 0x4000>;
interrupts = <38 0>;
#address-cells = <1>;
#size-cells = <1>;
status = "okay";
flexram,bank-size = <32>;
itcm: itcm@0 {
compatible = "zephyr,memory-region", "nxp,imx-itcm";
reg = <0x00000000 DT_SIZE_K(128)>;

View file

@ -1,10 +1,11 @@
/*
* Copyright (c) 2021, NXP
* Copyright 2021-2023 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <nxp/nxp_rt11xx.dtsi>
#include <zephyr/dt-bindings/memory-controller/nxp,flexram.h>
/ {
cpus {
@ -22,12 +23,35 @@
/delete-node/ dma-controller@40c14000;
flexram: flexram@40028000 {
compatible = "nxp,flexram";
reg = <0x40028000 0x4000>;
interrupts = <50 0>;
#address-cells = <1>;
#size-cells = <1>;
flexram,bank-size = <32>;
flexram,num-ram-banks = <16>;
flexram,has-magic-addr;
/* same as default fuse value */
flexram,bank-spec = <FLEXRAM_DTCM>,
<FLEXRAM_DTCM>,
<FLEXRAM_DTCM>,
<FLEXRAM_DTCM>,
<FLEXRAM_ITCM>,
<FLEXRAM_ITCM>,
<FLEXRAM_ITCM>,
<FLEXRAM_ITCM>,
<FLEXRAM_DTCM>,
<FLEXRAM_DTCM>,
<FLEXRAM_DTCM>,
<FLEXRAM_DTCM>,
<FLEXRAM_ITCM>,
<FLEXRAM_ITCM>,
<FLEXRAM_ITCM>,
<FLEXRAM_ITCM>;
itcm: itcm@0 {
compatible = "zephyr,memory-region", "nxp,imx-itcm";
reg = <0x00000000 DT_SIZE_K(256)>;
@ -39,6 +63,8 @@
reg = <0x20000000 DT_SIZE_K(256)>;
zephyr,memory-region = "DTCM";
};
/* no ocram node for this bank-spec */
};
/*

View file

@ -50,6 +50,9 @@ zephyr_compile_definitions_ifdef(CONFIG_ENTROPY_MCUX_CAAM CACHE_MODE_WRITE_THROU
zephyr_compile_definitions_ifdef(CONFIG_USB_DEVICE_DRIVER DATA_SECTION_IS_CACHEABLE=1)
# flexram header
zephyr_library_include_directories(${ZEPHYR_BASE}/drivers/memc)
zephyr_linker_section_configure(
SECTION .rom_start
INPUT ".boot_hdr.ivt"

View file

@ -92,6 +92,9 @@ config FLASH_SIZE
default $(dt_node_int_prop_int,$(DT_CHOSEN_FLASH_NODE),size,Kb) \
if $(DT_FLASH_HAS_SIZE_PROP)
config MEMC
default y
choice USB_MCUX_CONTROLLER_TYPE
default USB_DC_NXP_EHCI
endchoice

View file

@ -21,6 +21,8 @@
#include "usb.h"
#endif
#include "memc_nxp_flexram.h"
#include <cmsis_core.h>
#define CCM_NODE DT_INST(0, nxp_imx_ccm)
@ -345,6 +347,11 @@ void z_arm_platform_init(void)
{
/* Call CMSIS SystemInit */
SystemInit();
#if defined(FLEXRAM_RUNTIME_BANKS_USED)
/* Configure flexram if not running from RAM */
memc_flexram_dt_partition();
#endif
}
#endif

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2021, NXP
* Copyright 2021-2023 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -33,6 +33,7 @@
#include "usb_phy.h"
#include "usb.h"
#endif
#include "memc_nxp_flexram.h"
#include <cmsis_core.h>
@ -689,6 +690,11 @@ static int imxrt_init(void)
void z_arm_platform_init(void)
{
SystemInit();
#if defined(FLEXRAM_RUNTIME_BANKS_USED)
/* Configure flexram if not running from RAM */
memc_flexram_dt_partition();
#endif
}
#endif