refactor flash_page_get_info to simplify and to avoid using mixing the
usage of an off_t (offs) and an uint32_t (page_index).
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
The nRF QSPI has a configurable delay from the rising
clock signal to the actual sample point measured in
clock cycles. This commit exposes that delay as a DTS
parameter without modifying existing behavior.
Signed-off-by: Abram Early <abram.early@gmail.com>
The definition of qspi_flash_get_parameters, that implements
the mandatory get_parameters API call for the driver, was incorrectly
placed within block conditionally compiled when
CONFIG_FLASH_PAGE_LAYOUT is defined.
The commit fixes the issue that was causing compilation error
when the config has not been set.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
hal_espressif repository was updated from esp-idf v4.2
to esp-idf v4.3 to allow latest Espressif chips integration.
As a consequence, it added a few changes in drivers
and peripherals. To maintain bisectability, changes in this
PR cannot be split. Here are some details:
wifi: update linker script by adding libphy and new attributes.
spi: update some APIs and fixed missing wait_idle check
west.yml: esp32: update hal to new version
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Move all PM_DEVICE_STATE_* definitions to an enum. The
PM_DEVICE_STATE_SET and PM_DEVICE_STATE_GET definitions have been kept
out of the enum since they do not represent any state. However, their
name has not been changed since they will be removed soon.
All drivers and tests have been adjusted accordingly.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit removes the huge if condition section and is
replaced with DT APIs to get the maximum erase time of a
stm32 flash from dtsi.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
Converts the spi_nor flash driver to use `spi_dt_spec` as a
demonstration of the simplifications that the API enables.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Similar to #32218 and #34032
Flush ART cache before erase operation
(preparing ART activation)
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Similar to #32218 and #34032
Flush ART caches before erase operation
(preparing ART activation)
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
This implement the same flush cache functionality already present in the
other stm32 series flash drivers, used to avoid bus errors when writing
big chunks of data to the flash.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
The flash_stm32l4x driver seems to work out of the box on the WL series.
This just adds the necessary config changes to let the driver build and
run when SOC_SERIES_STM32WLX is selected.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Add flash driver for it8xxx2. The driver can implement
flash read, write and erase that will be mapped to the
ram section for executing.
TEST="flash write 0x80000 0x10 0x20 0x30 0x40 ..."
"flash read 0x80000 0x100"
"flash erase 0x80000 0x1000"
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
This commit adds the flash driver for nucleo_f207zg platform.
This has been tested with flash test application.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
Since we removed various series headers, move stm32 driver
under main driver/pinmux folder.
Take this change into account into various drivers.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Remove useless definiton STM32F7X_SECTOR_MASK and use CMSIS instead.
By the way fix bug as '|' should be in fact '&',
but thanks to '~' inversion, '|' is now good.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
The flash write function casts a void * to flash_prg_t, which can be 2,
4 or 8 bytes long depending on the SoC. This can trigger a hard fault
exception if data is not aligned, such as when passing a constant string
from settings_save_one().
Copying the chunk of data to a temporary variable on the stack to avoid
the problem.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Fixing error introduced in 951e72b947
where ifdef was converted to IS_ENABLED. Ifdef was required because
element in the struct does not exist when multithreading is disabled.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The context parameter used across device power management is
actually the power state. Just use it and avoid a lot of
unnecessary casts.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Move LUT to driver.
Update CMake to include SoC specific driver.
Fix mimxrt685_evk LUT header spacing.
Signed-off-by: Saurabh Jagdhane <saurabh.jagdhane@nxp.com>
Adding Reset and Write-protect pins initialization during AT45 driver
start-up. Usually these pins are driven high when not used.
The AT45 device incorporates an internal power-on reset circuit, so
there is no initial on-off reset sequence.
Signed-off-by: Eug Krashtan <eug.krashtan@gmail.com>
The energy consumption on nrf52840 is unnecessarily high when
CONFIG_NORDIC_QSPI_NOR is used due to Anomaly 122. The nrf_qspi_nor
driver is unitialize after QSPI usage and initialize before using
it again.
Semaphore objects are used to allow multiple threads exclusive access
and efficient usage.
The main assumption made was that all QSPI API is stateless, in the
sense that it is not required to store any peripheral state before
uninit. Also, the QSPI driver was supposed to be synchronous, except
for the erase operation, in which the nrf signals its start, instead of
its end. While the flash is performing the erase, an uninit followed
by an init doesn't work. For that reason, polling is done before
every uninit.
Tests were made with a simple LittleFS application in a custom board
using flash MX25R3235F and another with the LittleFS flash sample
using nrf52840 DK that has a MX25R6435F. Current consumption dropped
from 630 uA to ~10uA in both cases.
Signed-off-by: Rodrigo Brochado <git.rodrigobrochado@gmail.com>
The STM32H7x flash has an integrated ECC that can correct single
errors and detect double errors. When a double ECC error is detected,
the DBECCERR1/2 flag is raised and there is a bus fault.
We now mask this bus fault and check the error flags. ECC errors are
logged with the offset of the data. Single ECC errors cause a warning
to be logged and double ECC errors return -EIO.
Fixes#33140.
Signed-off-by: Göran Weinholt <goran.weinholt@endian.se>
Use the CODE_DATA_RELOCATION_SRAM config to indentify code relocated
to SRAM so we can setup the MPU for the SRAM region used for code
relocation.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Information about which block protect bits are set on power-up is not
inferable from SFDP content, so we need the devicetree config pointer
to get the has-lock property value even when SFDP data is read at
runtime.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This commit replaces driver hard coded clk bus and enr definitions with
definitions from device tree.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit fixes missing pclken member if used for h7 series.
Additionally to the check if instance 0 of compatible
st_stm32_flash_controller has defined a clock,
this needs to be checked for compatible st_stm32h7_flash_controller.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Add a function that uses the JESD216 SFDP BFP DW16 Enter 4-Byte
Addressing parameter to put the device into 4-byte addressing mode if
one of the entry modes that's supported by the driver is available on
the device.
Perform the transition if SFDP data is provided (either by devicetree
or at runtime), or if a special devicetree property provides the entry
mode descriptor.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Support both 24-bit and 32-bit address values when constructing the
device command. Note that some commands require 24-bit address
regardless of mode, and some require 32-bit addresses regardless of
mode, so provide command-specific overrides of a generic (but not yet
configurable) default address size.
With this we no longer need a special interface for READ_SFDP which
uses a 24-bit address but with a wait state introduced by clocking out
a fifth command byte.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This driver abstracts most access through a generic function that
supports both read and write with and without address components in
the command. Rework this so that instead of distinct arguments
specifying the combination of features there's a flag set that will
allow more combinations to be specified.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This commit fixes sporadic kernel panics when writing big data chunks
to the flash. (data bus errors). Just like the stm32g4 does.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit fixes sporadic kernel panics when writing big data chunks
to the flash. (data bus errors). Just like the stm32g4 does
but on instruction cache.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Some SPI NOR devices, particularly Atmel and SST, power-up with block
protect bits set in the status register. These bits must be cleared
before any erase or program operation can succeed. However, blindly
clearing bits in SR is wrong as some of these are non-volatile and
control chip behavior, including quad-enable.
Add a devicetree flag to identify device-specific BP bits in the status
register that should be cleared on startup only for devices that need
them, and when set do the clear during initialization.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the standard note to two functions that require the caller to have
first acquired the device.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Reads would wait until the device was ready before issuing the first
command; writes and erases did not. Fix this documenting and changing
so that wait-for-ready is invoked only where needed, i.e. to confirm
that a WRITE_STATUS, ERASE, or PROGRAM operation has completed before
proceeding to allow more commands to be submitted. This matches Linux
spi_nor driver behavior.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This feature prevents issues when trying to write data to the flash
device that is located on or addressed at the same flash device.
An example is the mcuboot logic that writes a magic number to
the secondary partition header.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
