The j iterator is used for priorities, and the i iterator is used for
choosing the actual screening register. Therefore the screening register
availability needs to be checked with i.
This commit also improves the readability by doing two things:
* by moving the screening register index check to a place where the
index is going to be actually used
* by using the ARRAY_SIZE macro instead of a hard-coded number as the
upper limit
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
The feature that used this symbol was removed in 18b07e09e0.
This is just a cleanup commit that removes the unused symbol.
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
These options were removed from kconfig in previous patch. So rename
the leftovers as shared_irq driver options are defined in DTS now.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Same change as in commit 8cf8db3a73 ("Kconfig: Use a short, consistent
style for prompts"), fixing stuff that got introduced since then.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
In was generating these warnings:
eth_stellaris.c:66:8: warning: unused variable ‘eth_hdr’
eth_stellaris.c:65:8: warning: unused variable ‘head_len_left’
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Wait in the send callback for the packet to be actually sent.
After this change, only one TX packet will be handled at once.
This is needed because of the way the TX packets are currently handled
in L2 after this PR: #12563
This is similar to what #13167 did for the SAM GMAC on SAM E-70.
Without this, packet time-stamping does not work with the current stack.
This commit is minimalistic on purpose to make it easily revertible when
the network stack is able to properly handle DMA drivers for TX packets
again.
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
The ring_buf implementation is basically used as an array of net_buf
pointers in the RX path. The tail and head indexes are taken from the
RX descriptors and not from the ring_buf. That's why for example the
fact that head is never initialized doesn't cause problem. Only len is
used in free_rx_bufs(), but anyway this function is plainly broken as
it always free the first net_buf and doesn't set it back to NULL.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Scale down the TX path of the GMAC driver by waiting for a packet to be
fully sent before returning from the send function. This has a small
performance impact, but has a few advantages:
- It allows the Ethernet code to modify the packet afterward, fixing PTP
support on this board (see PR #12563).
- It returns an error to the IP stack in case of a transmit failure.
- It doesn't require net_buf to be thread safe.
This change can be reverted by changing GMAC_MULTIPLE_TX_PACKETS from 0
to 1.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The GMAC driver tries to ensure that it can always send a complete
Ethernet frame. However in the TX path this is the problem of the IP
stack: if the buffers can't be allocated, they won't be sent. Therefore
just drop the check.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Now that the RX packets are limited to the RX workqueue only, we can
reduce ETH_SAM_GMAC_BUF_RX_COUNT to 12 and still be able to receive a
full Ethernet frame. This reduces the minimum NET_BUF_RX_COUNT required
by this driver to 24.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This reverts commit afbee4c96a. The IP
stack has been fixed and does not use the RX packets or buffers to
transmit data.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Commit 040d6b6e99 (eth: eth_mcux: Convert to use DT_ prefixed defines)
changed all the defines, but to incorrect ones.
This commit changes them to what actually gets generated.
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
The eth mcux driver has been using non DT_ prefixed defines for DT
generated defines. Switch to use DT_ prefixed ones as we want to
deprecated the non DT_ prefixed defines.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The SAM GMAC Ethernet driver currently keeps a reference to the packet
being sent in addition than keeping of references of the fragments. In
practice this is only needed when PTP is enabled, otherwise the driver
only need to prevent the fragment (or even their content) to be changed.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The SAM GMAC Ethernet driver uses scatter gather DMA to transmit data.
Each fragment of a network packet is mapped from a set of descriptors
that is used by the controller to do the DMA transfer. This means that
the packet is not necessary sent when the send() function returns. For
that reason the driver calls net_pkt_ref() on the packet to prevent it
from being freed. It is then unreferenced with net_pkt_unref() in the
TX ISR when the packet has effectively been sent.
However this doesn't work if the packet is modified in the meantime,
like it will be done in PR #12563 to remove the Ethernet header
contained in the first fragment. To avoid that, call net_pkt_frag_ref()
on each fragment of the packet, and unreferenced them with
net_pkt_frag_unref() in the TX ISR when the packet has effectively been
sent.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Replace the sole use of i2c_burst_read_addr with a more generic API
function to allow the former to be deprecated along with its unreliable
sibling write and update functions.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
This allows the shared_irq driver to be configured by device tree.
With previous implementation, only the board configuration can
override the IRQ trigger, as the trigger config is a "choice" rather
than "config". With this patch, the driver can be fully configued at
the SoC level.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Use the new API where relevant. Only sam_gmac is left aside for now.
This simplifies a lot the code as the caller should only care about
allocating net_pkt and its buffer once, and thus will not need to mess
with "frags" etc...
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Force Operation Mode Strap Override register to disable NANDTree. This
is due to some users reporting PHY entering NANDTree.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Boot PHY initialization timeout, caching mechanism fixes and networking
buffer descriptors moved to no cache section. Enabled cache management
in networking driver and manual barriers.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Previous SAM E70 HAL version was patched by commit 4dcfc8706 ("Add
missing interrupt number definitions") to add missing interrupt
definitions for SAM GMAC Priority Queues. This has been fixed in the
latest HAL by using a slightly different name. This patch updates the
driver accordingly.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Now that the descriptor lists are in non-cached memory, the helpers are
just accessing the w0 or w1 members of the structure. Just drop them and
access the members directly.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Atmel SAM Ethernet module is using a scatter-gather technique to
exchange data with the Ethernet driver. To communicate the location
of the data buffers the driver sets-up a so called descriptor list. This
is effectively a place in RAM containing a sequence of 32-bit words
representing buffer location and its status.
Currently the cache coherency is handled using cache clean or
invalidate. Unfortunately this strategy only works correctly when the
corresponding data size is a multiple of the cache line. This is not
the case here and might lead to data loss or corruption.
Instead of using cache operations, this patch moves the descriptor
listed to the recently added non-cached memory region, as recommended by
ATMEL. A data synchronisation barrier is still required for writes, as
the non-cached memory is defined with TEX=1, i.e. it is not strongly
ordered. The descriptor lists alignment can be decreased to 4 bytes, as
required by the SAM Ethernet module.
The RX/TX buffer are left unchanged, still managed by cache operations.
Fixes#9812
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The RX buffer accounting list is not a list shared with Ethernet device,
therefore there is no need to run a cache clean operation on it.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The SAM E70 GMAC ethernet driver reference a packet with net_pkt_ref()
when queueing a packet, and unreference it with net_pkt_unref() in the
ISR when it has been fully sent.
The call to net_pkt_ref() is done just after re-enabling the
interruptions, so there is however a small race condition that might
cause the packet to be unreference before being referenced. This is
only theoretical and has not been seen in practice.
Fix that by moving the call to net_pkt_ref() just before re-enabling
the interruptions.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The previous commit replaced the net_pkt element ref with an element
atomic_ref. CI tests turned up more places where ref was used directly.
This commit converts them to use the new element.
Signed-off-by: Daniel Glöckner <dg@emlix.com>
For some reason, there was sequence like:
1. Get size of RX packet.
2. Allocate pkt buffer.
3. Check if the size of RX packet is too large, then deallocate pkt
buffer and error out.
Instead, reorder operations to check size before allocating buf.
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
Adds a new config HAS_MCUX_ENET to constrain which socs can enable the
mcux ethernet driver. This will prevent users from enabling the driver
on socs like kl25z or kw41z which do not have ethernet mac hardware.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
We now generate CS GPIO defines from the DTS that we can utilize. We
needed to slightly update the #defines in the driver from:
DT_MICROCHIP_ENC28J60_0_CS_GPIOS_{PIN,CONTROLLER} to
DT_MICROCHIP_ENC28J60_0_CS_GPIO_{PIN,CONTROLLER}
Fixes#12640
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The SAM E70 Ethernet driver uses scatter gather DMA to transmit data.
Each fragment of a network packet is mapped from a set of descriptors
that is used by the controller to do the DMA transfer. Each descriptor
contain an address and a length/status. The important status bits are
GMAC_TXW1_LASTBUFFER to indicate the last fragment of a packet and
GMAC_TXW1_USED to indicate that a descriptor has been processed by the
controller.
When starting a transmission, the controller start at the descriptor
after the last one that has been processed. If the descriptor is NOT
flagged by GMAC_TXW1_USED, it sends a first packet by sending all the
fragments up to a descriptor flagged with GMAC_TXW1_LASTBUFFER. The
first descriptor of a packet *and only the first descriptor of a packet*
is then modified to flag it with GMAC_TXW1_USED and to provide a status
(mostly related to errors and checksum offloading). It then continues
with the next packet and so on and only stops if the next descriptor
after GMAC_TXW1_LASTBUFFER is flagged with GMAC_TXW1_USED.
Therefore in order for the controller to stop processing descriptors,
the strategy is to flag the next descriptor after the last fragment to
be sent with GMAC_TXW1_USED. When the next packet has to be queued, the
flag can be removed before starting a transmission.
This is what is currently done in the current driver. However there is a
small race condition in the implementation: if packets are queued fast
enough, the controller is still sending the fragment of the previous
packet when the descriptor are written. When writing the first
descriptor, the GMAC_TXW1_USED flag is removed. This is done after
writing the address (with a memory barrier) so that looks safe. However
given that the GMAC_TXW1_USED flag is only added by the controller to
the first descriptor of a packet it means the next descriptor might
have it cleared. In that case the descriptor is processed, and a junk
packet is sent. That also desynchronize eth_tx and tx_complete as one
or more packets than expected are transmitted.
In order to fix that the strategy is slightly changed to initially write
the first descriptor with the GMAC_TXW1_USED flag set. Once all the
descriptors from the packet are written the bit is cleared (after a
memory barrier). Then the transmission can be started safely.
The patch also does a small optimization writing the next descriptor
with only the GMAC_TXW1_USED bit set instead of setting this bit. As
this will be a non-cached area, it's better avoiding a read followed
by a write if not necessary.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
If a pkt has more frags than the number of TX descriptors, we end up in
a deadlock situation, as the whole packet and thus all the frags have to
be mapped in the descriptors at once. That is why the number of
descriptors is defined as CONFIG_NET_BUF_TX_COUNT + 1.
This wrongly assumes that only TX buffers can be used to send data,
however the packets might also come from the RX buffers, like for
example with ICMPv4.
Therefore define the number of descriptors as the maximum of
CONFIG_NET_BUF_RX_COUNT + 1 and CONFIG_NET_BUF_TX_COUNT + 1. This fixes
a deadlock when CONFIG_NET_BUF_TX_COUNT is much smaller than
CONFIG_NET_BUF_RX_COUNT.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The current SAM E70 Ethernet driver sometimes get stuck if the stack
has to send 2 packets in a row, for example an ack for the just received
data + answer data.
The problem is the following one:
1) The first packet goes through eth_tx, one tx_desc_sem semaphore is
taken, and the tx_timeout_work delayed work is submitted.
2) The second packet also goes through eth_tx, another tx_desc_sem
semaphore is taken, and the tx_timeout_work delayed work is not
started because there is already one already submitted.
3) The first packet has been sent, one tx_desc_sem semaphore is given
and the tx_timeout_work delayed work is cancelled.
4) The second packet has been sent but given the delayed work has
already been cancelled, tx_completed is not called: the tx_desc_sem
semaphore is not given back and the network packet is not
unreferenced.
The whole timeout concept probably has to be reworked. In the meantime
it is probably better to just drop the timeout code instead of keeping
the driver broken. We can only get stuck on the TX path if there is a
bug in the driver or a hardware malfunction. It might happen, but with
the less probability then the current hangs. In addition it just hides
the real issues and prevent them to be fixed.
This commit therefore just remove the timeout code in the TX path.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
It was reported, and confirmed by multiple parties that default
CONFIG_ETH_MCUX_RX_BUFFERS=2 under some packet load leads to
1s and increasing packet processing delay and eventual deadlock.
No reports were about CONFIG_ETH_MCUX_TX_BUFFERS=2, but be on safe
side and just set that to the minimal value as the current default,
to allow us to have good conservative base to test various networking
stack issues.
Fixes: #3132
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
As emulated by QEMU. SMSC9118 is compatible with SMSC9220 as used in
ARM MPS2 board, as well as SMSC9115/6/7/etc. devices.
Portions of the code are based on mbedOS code from its
targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/drivers/smsc9220_eth.c
eth_smsc9220_priv.h originally comes from Arm mbedOS file:
targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/drivers/smsc9220_eth.h
augmented with struct & defines from:
targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/CM3DS.h
and renamed as eth_smsc911x_priv.h to follow Zephyr conventions.
Then, following changes applied:
Changes to build under Zephyr, changes to use symbolic constants
and field access helpers, typo fixes, etc.
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
Driver for networking device Microchip ENC28J60 is used as SPI slave,
moved to DTS type definition. Samples echo_client and echo_server use
this device on Arduino 101 board.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
When used suitable config overlay, qemu_cortex_m3 with Ethernet
support can be started with just usual "make run".
An example of such overlay is included with samples/net/echo_server,
can be built and run with:
make BOARD=qemu_cortex_m3 \
CONF_FILE="prj.conf overlay-qemu_cortex_m3_eth.conf" run
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
The Kconfig option ETH_SAM_GMAC was missing it's dependency on
NET_L2_ETHERNET. Before this patch Kconfig was allowing users to
enable the driver, but the driver was not added because the CMake code
only adds the driver when NET_L2_ETHERNET.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
There is no need to reserve any space for each frag, as the l2 will
allocate a frag for the ethernet header, arp will do the same.
This is one step further to removing the concept of ll reserve.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
