Commit graph

28 commits

Author SHA1 Message Date
Pieter De Gendt 10dafbfcf4 drivers: bbram: Rename emul_bbram_backend_api to emul_bbram_driver_api
Structs with a __subsystem tag are required to have a _driver_api suffix.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2024-05-03 14:44:41 +01:00
Ruibin Chang 19a23d5190 bbram: fix bbram dead code issue
Clear the whole 192 bytes of bbram, before writing the magic value to it.
test pass "west twister -cviG -T tests/drivers/bbram/".

Fixes #69119

Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
2024-02-29 11:53:45 +00:00
Guillaume Gautier b0e1e9f5fb drivers: bbram: stm32: add include to fix compilation error
Driver BBRAM for STM32 had a compilation error: "unknown type name
'RTC_TypeDef'" due to missing include file.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-02-14 10:40:00 +01:00
Yuval Peress 2772843cf1 bbram: npcx: Add emulator
Add an emulator for the NPCX BBRAM which supports reading and writing

Signed-off-by: Yuval Peress <peress@google.com>
2024-01-12 09:59:31 +01:00
Yuval Peress 69dfb2fee3 bbram: mcp7940c: Add emulator
Add an emulator for the mcp7940c BBRAM that supports reading and writing.

Signed-off-by: Yuval Peress <peress@google.com>
2024-01-12 09:59:31 +01:00
Yuval Peress 59675bf682 bbram: it8xxx2: Add emulator implementation
Add an emulator that supports reading and writing to the it8xxx2 bbram.

Signed-off-by: Yuval Peress <peress@google.com>
2024-01-12 09:59:31 +01:00
Adrien Bruant 176d433b98 drivers: bbram: stm32-bbram: port to stm32wl
On STM32WL, the backup memory is defined as part of the TAMP peripheral.
This seems to be a deviation from the stm32 family where this memory is
defined as part of the RTC.

The STM32WL reference manual shows that tamp_pclk is connected to
rtc_pclk. This means that the clock required to run the TAMP peripheral
is the same as the RTC's. A quick port of BBRAM on STM32WL is achieved
by instanciating the bbram device as a child of the RTC and by modifying
the address offset to the first backup register from the rtc base
address.

Signed-off-by: Adrien Bruant <adrien.bruant@aalberts-hfc.com>
2023-11-21 08:40:51 +00:00
Anas Nashif a08bfeb49c syscall: rename Z_OOPS -> K_OOPS
Rename internal API to not use z_/Z_.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-11-03 11:46:52 +01:00
Anas Nashif 9c4d881183 syscall: rename Z_SYSCALL_ to K_SYSCALL_
Rename internal API to not use z_/Z_.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-11-03 11:46:52 +01:00
Anas Nashif 4e396174ce kernel: move syscall_handler.h to internal include directory
Move the syscall_handler.h header, used internally only to a dedicated
internal folder that should not be used outside of Zephyr.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-11-03 11:46:52 +01:00
Johan Lafon a63bb6317c drivers: rtc: stm32: allow new RTC driver to work with BBRAM
STM32 BBRAM depends on RTC to work. This changes STM32 RTC init stage to
PRE_KERNEL_1 to allow RTC driver to initialize before BBRAM driver.

Some adjustments are made so that kernel API is not used during the init
procedure.

Signed-off-by: Johan Lafon <johan.lafon@syslinbit.com>
2023-09-20 11:34:52 +01:00
Laczen JMS 95bdfb5c33 bbram: add support from user threads
Provide the necessary handlers to support bbram access from userthreads
solves #61868.

Signed-off-by: Laczen JMS <laczenjms@gmail.com>
2023-08-29 10:26:07 +02:00
Gerard Marull-Paretas 1eb683a514 device: remove redundant init functions
Remove all init functions that do nothing, and provide a `NULL` to
*DEVICE*DEFINE* macros.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-19 10:00:25 +02:00
Henrik Brix Andersen c41dd36de2 drivers: kconfig: unify menuconfig title strings
Unify the drivers/*/Kconfig menuconfig title strings to the format
"<class> [(acronym)] [bus] drivers".

Including both the full name of the driver class and an acronym makes
menuconfig more user friendly as some of the acronyms are less well-known
than others. It also improves Kconfig search, both via menuconfig and via
the generated Kconfig documentation.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2023-03-28 15:06:06 +02:00
Jamie McCrae f9fd899da0 drivers: bbram: Add Microchip MCP7940N driver
Adds Microchip MCP7940N battery-backed RAM support.

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2023-03-01 08:55:39 +01:00
Patryk Duda f7fca220ba drivers: bbram: Introduce BBRAM shell
Add 'bbram' command which is very convenient tool for examining and
modyfying BBRAM content.

Examples:

Write one byte:
$ bbram write backup_regs 0x1 0xaa

Write many bytes (starting from 0x13):
$ bbram write backup_regs 0x13 0xa 0xb 0xc 0xd 0xe 0xf 0xaa 0xab 0xac

Read whole BBRAM:
$ bbram read backup_regs

Read many bytes (4 bytes starting from address 0x14 in this case):
$ bbram read backup_regs 0x14 4

Read one byte (from 0x14 address):
$ bbram read backup_regs 0x14

Signed-off-by: Patryk Duda <pdk@semihalf.com>
2022-12-08 16:47:09 +09:00
Patryk Duda e02456a52d drivers: bbram: Introduce STM32 BBRAM driver
STM32 battery-backed RAM is organized in 4 byte registers. Number of
registers can vary between models from 5 to 32 registers.

Usually, the registers are part of RTC. On some variants they are part
of tamper module. On STM32F1 the registers are in separate module. For
now, only backup registers from RTC are supported.

Signed-off-by: Patryk Duda <pdk@semihalf.com>
2022-12-08 16:47:09 +09:00
Keith Short 2f2c0176e5 include: fix includes for IT8xxx2 SoC
Fix missing includes for IT8xxx2 drivers.

Signed-off-by: Keith Short <keithshort@google.com>
2022-10-12 16:10:05 -04:00
Kumar Gala ecd6632f36 drivers: bbram: Update Kconfig
* Utilize DT_HAS_<COMPAT>_ENABLED for devicetree based drivers

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-16 18:08:42 -05:00
Gerard Marull-Paretas fb60aab245 drivers: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all drivers to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:58:21 +02:00
Jay Vasanth 8c193743ac drivers: bbram: mec: fixed compilation error
Fixed compilation error when building bbram driver
for MEC15xx

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-03-01 14:18:55 -06:00
Jay Vasanth 9f3d90e283 drivers: bbram: Add bbram driver for mec device
Add bbram driver for Microchip mec device

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-02-21 22:17:52 -05:00
Wealian Liao 6d6c5e1155 drivers: npcx: Drop DRV_CONFIG/DRV_DATA usage
Stop using DRV_CONFIG/DRV_DATA macros and use dev->data and dev->config
instead.

Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
2022-01-28 10:06:05 +01:00
Tim Lin 013bc73e40 ITE: cleanup: drivers/bbram: correct the default configuration format
1. Rename DT_COMPAT_ST_BBRAM_IT8XXX2 to COMAPT_ITE_IT8XXX2_BBRAM
2. The default configuration "$( )" should be a parentheses instead
   of curly brackets. The BBRAM for it8xxx2 can be driven after
   correcting.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2022-01-17 11:52:13 -05:00
Tim Lin 95ba8e3fe4 ITE: drivers/bbram: add magic number to compare in initial
BBRAM content should be cleared when boot from cutoff. Compare magic
number to decide whether to clear entire BBRAM.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2022-01-17 11:52:13 -05:00
Yuval Peress 74b9a607b4 drivers: bbram: Add it8xxx2 BBRAM driver implementation
Note that the it8xxx2 does not support a status register so that
functionality is omitted.

This change also adds driver tests that build both the npcx and it8xxx2
drivers.

Signed-off-by: Yuval Peress <peress@chromium.org>
2021-08-30 11:35:23 -04:00
Yuval Peress cbe4803812 drivers: bbram: fix npcx driver and update Kconfig defaults
There was a typo that snuck into the bbram driver for npcx.
Fix the driver and update the Kconfig to automatically include the
driver if the compatible string exists in the dts. This ensures that
the driver is built when building the npcx evbs.

Signed-off-by: Yuval Peress <peress@chromium.org>
2021-08-30 11:35:23 -04:00
Yuval Peress 268f9bf163 nuvoton: battery-backed ram
Add bindings and entry for the battery-backed ram in the nuvoton
npcx. This commit is an upstream port of
https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/platform/ec/zephyr/dts/bindings/cros_bbram/nuvoton,npcx-cros-bbram.yaml;l=1;drc=e9af813c36b7b411bf2a01cbc1b09d5fdec49b8a

Along with a bit of cleaning up and an emulator.

Signed-off-by: Yuval Peress <peress@chromium.org>
2021-08-07 20:32:33 -04:00