Commit graph zephyr/cmake/compiler
Author SHA1 Message Date
Joel Holdsworth
81b6e13b36 arch: openrisc: add LLEXT ELF relocation support
Implement arch_elf_relocate() for the OpenRISC architecture to enable
the LLEXT (Linkable Loadable Extensions) subsystem.

Supported relocation types:
- R_OR1K_32, R_OR1K_32_PCREL (data)
- R_OR1K_INSN_REL_26 (26-bit PC-relative branch/jump)
- R_OR1K_HI_16_IN_INSN, R_OR1K_LO_16_IN_INSN (address pair)
- R_OR1K_AHI16 (adjusted high, sign-compensated)
- R_OR1K_SLO16 (split-immediate store encoding)
- R_OR1K_PCREL_PG21, R_OR1K_LO13, R_OR1K_SLO13 (page-relative)
- R_OR1K_TLS_LE_HI16, R_OR1K_TLS_LE_LO16, R_OR1K_TLS_LE_AHI16,
  R_OR1K_TLS_LE_SLO16, R_OR1K_TLS_TPOFF (TLS local-exec)

Signed-off-by: Joel Holdsworth <jholdsworth@nvidia.com>
2026-07-14 16:41:44 -04:00
Joel Holdsworth
5aa4def94c cmake: gcc: add target_openrisc.cmake to suppress RWX segment warning
OpenRISC runs code from RAM (non-XIP), so the single LOAD segment
legitimately needs RWX permissions. Add --no-warn-rwx-segments to
prevent ld >= 2.39 from turning this into an error under
--fatal-warnings.

Signed-off-by: Joel Holdsworth <jholdsworth@nvidia.com>
2026-07-14 16:41:44 -04:00
Torsten Rasmussen
c04d206509 cmake: move gcov detection from generic.cmake to target.cmake files
gcov belongs in target.cmake and not generic.cmake.
generic.cmake are for generic tools that are needed during build system
generation, before the arch is known, for example for Kconfig
pre-processing.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2026-07-07 17:26:16 +01:00
Jinming Zhao
217e2913a1 lib: heap: kasan: lightweight heap write sanitizer for sys_heap
Lightweight write sanitizer for sys_heap.  Uses
-fsanitize=kernel-address compiler instrumentation combined with a
per-heap shadow bitarray (one bit per granule) to detect buffer
overflows, underflows, and use-after-free on write accesses.

Ships its own lightweight sanitizer runtime (__asan_store* callbacks);
does not depend on an external ASAN library and supports debugging on
real embedded targets.

Instrumentation is opt-in per CMake target via
zephyr_target_enable_heap_kasan(), or per directory via
zephyr_heap_kasan_enable_directory().  Only writes are checked
(-asan-instrument-reads=0).  Bulk-write library calls (memset,
memcpy, str*, printf family) are redirected to checked wrappers at
compile time via -Dfoo=__asan_foo, requiring no source changes in
application code.

Heap tracking is likewise opt-in: register each heap with
SYS_HEAP_KASAN_ENABLE() / K_HEAP_KASAN_ENABLE(), or enable
CONFIG_SYS_HEAP_KASAN_MALLOC / CONFIG_SYS_HEAP_KASAN_SYSTEM for the
common libc malloc and kernel system heaps.

Usage:

  CONFIG_SYS_HEAP_KASAN=y
  CONFIG_SYS_HEAP_KASAN_MALLOC=y   # auto-track malloc/free
  CONFIG_SYS_HEAP_KASAN_SYSTEM=y   # auto-track k_malloc/k_free

  # Instrument all sources of <target> (CMakeLists.txt)
  zephyr_target_enable_heap_kasan(app)
  # Or instrument sources under <dir>
  zephyr_heap_kasan_enable_directory(src/mymodule)

  /* Opt-in tracking for a custom heap */
  K_HEAP_DEFINE(my_heap, 4096);
  K_HEAP_KASAN_ENABLE(my_heap, 4096);

Signed-off-by: Jinming Zhao <jinmzhao@qti.qualcomm.com>
2026-07-01 05:21:22 -04:00
Liu Qian
ab0c08a6ce arch: riscv: add Zk and Zks ISA extension support
Add RISCV_ISA_EXT_ZK (Scalar Cryptography) and RISCV_ISA_EXT_ZKS
(ShangMi Suite) Kconfig options, and append them to the GCC march
flag when enabled.

Signed-off-by: Liu Qian <liuqian.andy@picoheart.com>
2026-06-29 13:56:59 -05:00
Omar Naffaa
0bbd981df0 arch: riscv: Add support for Smaia and Ssaia extensions
As a part of the AIA specification two new extensions were introduced:
Smaia (Supervisor Machine AIA) and Ssaia (Supervisor Software AIA).
Support is added for these 2 extensions

Signed-off-by: Omar Naffaa <onaffaa@qti.qualcomm.com>
2026-06-22 15:48:32 +02:00
Evan Chen
13d1b5c8c1 cmake: armclang: fix C++ header search and AEABI flags
Avoid exporting the ARMClang builtin header path ahead of
libc++ for C++ builds, and restrict
_AEABI_PORTABILITY_LEVEL=1 to C and ASM.

This restores the expected C++ standard library include
behavior and avoids applying C-only AEABI portability
handling to libc++.

Assisted-by: GitHub Copilot:GPT-5.4 [apply_patch] [run_in_terminal]
Signed-off-by: Evan Chen <bugena123@gmail.com>
2026-06-19 11:10:42 +02:00
Anas Nashif
fe0dd27db9 cmake: clang: Fix no_global_merge flag compatibility
The -mno-global-merge flag is not recognized by Clang. Since GCC also
sets this property to an empty string, update Clang to match for
cross-platform compatibility. This fixes RISC-V builds with Clang.

Fixes build error on qemu_riscv32e with LLVM:
clang: error: argument unused during compilation: '-mno-global-merge'

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2026-06-17 10:14:59 -04:00
Anas Nashif
ddb3225099 cmake: clang: Fix stack protector guard flag compatibility
Clang doesn't support -mstack-protector-guard flags that are used by
GCC.  These flags are particularly problematic on RISC-V where they
cause compilation failures.

Override the security_canaries properties in Clang to only include the
base -fstack-protector variants, removing the unsupported
-mstack-protector-guard flags inherited from GCC.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2026-06-16 17:47:15 +02:00
Anas Nashif
c05e59bd1f compiler: clang: Override LTO flags with Clang-compatible forms
Clang does not support the GCC-specific -flto=auto and -flto=1
flag forms, causing build failures when LTO is enabled with the
LLVM toolchain:

  clang: error: unsupported argument '1' to option '-flto='

Override optimization_lto and optimization_lto_st in the Clang
compiler flags to use the Clang-supported equivalents:

  - optimization_lto:    -flto=thin  (parallel, replaces -flto=auto)
  - optimization_lto_st: -flto=full  (single-threaded, replaces -flto=1)

Assisted-by: GitHub Copilot:claude-sonnet-4.6
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2026-06-12 15:33:09 +02:00
Anas Nashif
d030dea26d cmake: fix ARM llext module loading with clang
Define ARM-specific LLEXT compile flags for the clang toolchain
configuration to match GCC behavior.

This adds long-call code generation for extension objects and disables
unwind table emission in llext builds.

Also strip ARM unwind metadata sections from packaged .llext files so
the loader does not encounter relocations against non-loaded unwind
sections (.ARM.exidx/.ARM.extab and related rel sections).

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2026-06-12 07:53:32 +02:00
Anas Nashif
6bb0c37c55 cmake: compiler: fix cmake style issue
Remove space before '(' in if() statements.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2026-06-10 13:13:12 +02:00
Anas Nashif
570ef09d0f cmake: clang: fix MVE FP disabled on Cortex-M55 with -mfpu=fpv5-sp-d16
Two related problems caused clang/LLVM to disable MVE floating-point
(-mve.fp) when targeting Cortex-M55:

1. cmake/gcc-m-fpu.cmake set FPU_FOR_cortex-m55 to fpv5-sp-d16 (commit
   6612580d9e) to allow precision selection via PRECISION_TOKEN. For
   GCC this is harmless because GCC derives MVE capability from -march.
   For clang, -mfpu=fpv5-sp-d16 explicitly overrides the CPU's default
   FPU capabilities, which disables mve.fp:

     clang -mcpu=cortex-m55 -mfpu=fpv5-sp-d16 -> +nomve.fp  (wrong)
     clang -mcpu=cortex-m55                    -> +mve.fp    (correct)

   restore FPU_FOR_cortex-m55 to "auto". The +nomve.fp, +nomve and
   +nodsp variants keep fpv5-sp-d16 because they explicitly restrict FPU
   capabilities.

2. cmake/compiler/clang/target_arm.cmake unconditionally passed
   -mfpu=${GCC_M_FPU} when CONFIG_FPU is set, with no guard for "auto".
   The equivalent armclang fix was applied in commit f30235f56a but was
   never ported to the standalone clang toolchain path.

   add the same NOT "auto" guard as armclang/target.cmake.

Fixes #109009

Assisted-by: GitHub Copilot:claude-sonnet-4.6
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2026-06-10 13:13:12 +02:00
Torsten Rasmussen
82990ecb7b cmake: improve genex stripping from flags
Move `string(GENEX_STRIP ...)` before the loop.

We want to strip generator expressions from INTERFACE_COMPILE_OPTIONS.
This needs to be done before looping the list so that a compile  option
list like this: `--arg1;$<1:--genarg1;--genarg2>;--arg2` are correctly
processed as a list of
- --arg1
- --arg2

and not an invalid list of
- --arg1
- $<1:--genarg1
- --genarg2>
- --arg2

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2026-06-09 19:56:28 +02:00
Camille BAUD
04b060f83d arch: riscv: Add xthead extension support
Add support for xthead extension usage

Signed-off-by: Camille BAUD <mail@massdriver.space>
2026-06-08 13:56:38 +02:00
Kenth Eriksson
375903dbcb cmake: Fix llvm always links against c++ rt for rtti and exceptions
Zephyr computes the runtime lib via --print-libgcc-file-name, but does
not pass the C++ compile flags -fno-exceptions and -fno-rtti causing
the probe to always select the wrong c++ rt.

Signed-off-by: Kenth Eriksson <kenth.eriksson@nokia.com>
2026-05-27 21:30:45 -04:00
Mayur Salve
729110c12f arch: riscv: use TLS-based stack canary guard
This change enables per thread stack canary for RISC-V.

RISC-V GCC accesses the stack canary via a fixed offset from the
thread pointer (tp) when -mstack-protector-guard=tls is used. The
compiler emits code equivalent to:

  lw t0, 0(tp)   # load canary from tp+0

Additionally, tp is zeroed in arch_kernel_init() when TLS is enabled,
which means any C function called before thread setup completes (such
as z_early_rand_get or data_copy_xip_relocation) would fault trying
to access the canary.

Introduce STACK_CANARIES_TLS_PREPEND, which places the
.stack_chk.guard section at offset 0 of the TLS block, before .tdata
and .tbss. The compiler flags -mstack-protector-guard-reg=tp and
-mstack-protector-guard-offset=0 are passed so GCC generates the
correct canary access.

With STACK_CANARIES_TLS_PREPEND the per-thread TLS block layout is:

  tp --> +------------------+  offset 0
         | .stack_chk.guard |  (__stack_chk_guard)
         +------------------+
         | .tdata           |  (initialized TLS data)
         +------------------+
         | .tbss            |  (zero-initialized TLS data)
         +------------------+

The RISC-V reset path is extended to initialize tp before any C code
runs by allocating a TLS area on the boot stack and calling
arch_riscv_early_tls_stack_update(). Early boot functions that run
before tp is set up (z_early_rand_get, data_copy_xip_relocation) are
marked FUNC_NO_STACK_PROTECTOR to avoid canary access before tp is
valid.

Signed-off-by: Mayur Salve <msalve@qti.qualcomm.com>
2026-05-14 21:52:56 +02:00
Christoph Busold
88278fb59f drivers: entropy + random: Add implementations for ARM64 RNG
Add new implementations for entropy driver and random subsystem
based on ARM64 RNDRRS and RNDR instructions.

Signed-off-by: Christoph Busold <cbusold@qti.qualcomm.com>
2026-05-06 07:05:12 +02:00
Gaetan Perrot
c215bb17a6 cmake: fix typos in comments and documentation
Fix multiple spelling mistakes and typos in CMake
and ECL files, including:

- "warnigs" -> "warnings"
- "tihs" -> "this"
- "provied" -> "provided"
- "singlular" -> "singular"
- "exchangable" -> "exchangeable"
- "desciption" -> "description"
- "initalizer" -> "initializer"
- "Identifers" -> "Identifiers"

These changes improve readability and maintain
consistency in documentation without affecting
functionality.

Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
2026-04-14 22:26:24 -04:00
Jason Yu
6d789dd9cd cmake: toolchain: Update iar toolchain for Zephyr SDK 1.0.0
The iar toolchain fails to build after the update to the
1.0.0 Zephyr SDK. The path to the gnu toolchains
was updated to '${ZEPHYR_SDK_INSTALL_DIR}/gnu/'
in order to be compatible with the 1.0.0 SDK.

Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
2026-04-07 11:44:06 -05:00
Duy Nguyen
66d3edce9b compiler: gcc: Update build config for RX board
ZephyrSDK v1.0.0 is updated to support RXv2 and RXv3 instruction
this update the gcc cmake configuration for RX build on Zephyr SDK
for RXv2 and RXv3 MCU

Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
2026-03-19 15:27:18 +09:00
Stephanos Ioannidis
0f33efdd9e cmake: clang: Override -Wno-volatile with -Wno-deprecated-volatile
Override the GCC-specific `-Wno-volatile` flag specified by GCC
`compiler_flags.cmake` with the Clang-equivalent
`-Wno-deprecated-volatile`.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2026-03-17 15:43:52 -04:00
Andy Lin
6cb74ad968 arch: riscv: Add -msave-restore option to reduce code footprint
Add `-msave-restore` option to reduce the code footprint
of function prologue and epilogue.

Signed-off-by: Andy Lin <andylinpersonal@gmail.com>
2026-03-16 10:07:57 -04:00
Wojciech Jablonski
2291220143 cmake: toolchain/xt-clang: Fix a formatting issue
Add indentations to conditional instructions

Signed-off-by: Wojciech Jablonski <wojciech.jablonski@intel.com>
2026-02-23 13:32:47 -06:00
Wojciech Jablonski
9806fab79b llext: Option for customizing FLIX generation
Compiler-generated FLIX instructions are currently disabled for LLEXT due
to a historic issue with LLEXT feature that appears to be already
resolved. However, another issue with FLIX is now being investigated.
The latter issue is not related to LLEXT but userspace feature.
To mitigate impact of global complier settings, this change adds a kconfig
choice for controlling FLIX generation independently for LLEXT modules.

Signed-off-by: Wojciech Jablonski <wojciech.jablonski@intel.com>
2026-02-23 13:32:47 -06:00
Zhaoxiang Jin
93ee7998af cmake: compiler: add warning_no_misleading_indentation flag
Add a new compiler property warning_no_misleading_indentation to allow
disabling misleading indentation warnings. This is implemented for GCC
with the -Wno-misleading-indentation flag.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2026-02-20 10:08:45 +01:00
Lauren Murphy
ebf1f9d019 tests: llext: fixes for arcmwdt, gcc
Adds fixes for build and runtime issues using MWDT:

* Rename sections for llext_memblk.c buffers as MWDT cannot initialize
  sys_mem_blocks struct with buffer address when the section name of
  sys_mem_blocks struct (its variable name) is identical to the
  buffer's section name
* Adds --no-check-sections flag for MWDT on final stages of
  linking. Unlike other toolchains, MWDT's default behavior is to
  strictly check and fail on section overlap. Using SLIDs requires
  overlap; see llext-sections.ld
* Modifies inspect test case's ifdef around rodata sections, as
  not all Harvard platforms using MWDT have .rodata_in_data sections -
  their creation is triggered by passing the -Hccm flag to CCAC.
  As an example, nsim/nsim_em doesn't have them and nsim/nsim_vpx5 does
* Removes -Hccm flag when building with CONFIG_LLEXT_RODATA_NO_RELOC
  as it causes CCAC to mark the custom section llext.rodata.noreloc
  writable (SHF_WRITE) though it has only read-only data, making it
  impossible for for LLEXT to recognize it and put it in the
  appropriate region; see llext_load.c's llext_map_sections
* Adds name to unnamed first argument of threads_objects_test_setup,
  removing warning about omitting parameter names being a
  C2x extension

Also fixes a build warning for GCC about pointer arithmetic in
the INSTR_FETCHABLE macro.

Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
2026-02-20 07:07:52 +01:00
Nicolas Pitre
a02a3f14f3 arm64: Make PACBTI Kconfig available and add compiler flag support
Enable the ARM_PACBTI Kconfig choice for ARM64 architectures (ARMV8_A
and ARMV9_A) in addition to the existing ARM32 ARMV8_1_M_MAINLINE
support. Add the corresponding -mbranch-protection compiler flags to
both GCC and Clang target files for ARM64.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2026-02-03 09:36:09 +01:00
Sudan Landge
ab0473509f cmake: armclang: fix -lgcc error for armclang
Fix below build error with armclang by not passing the gcc
runtime library flags.
```
Fatal error: L3900U: Unrecognized option '-lgcc'.
```

Signed-off-by: Sudan Landge <sudan.landge@arm.com>
2026-02-02 12:56:02 +01:00
Daniel Leung
34021be789 cmake: toolchain/xt-clang: add flag to skip FLIX generation
This adds the compiler flag to instruct xt-clang not to generate
FLIX (Flexible Length Instruction Xtensions) instructions, where
multiple instructions can be fused into one instruction. FLIX
can provide performance and code size advantages.

When userspace is enabled, FLIX may reorder memory access
where memory is accessed before code determines whether
we should perform that memory access. For example,
when guarding memory access via k_is_user_context(), and
some kernel variables can only be accessed via kernel mode,
FLIX may reorder memory access such that these variables are
accessed before k_is_user_context(). This results in access
violation. This turns off FLIX generation by default and
lets the application developers to decide whether to enable
FLIX generation.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2026-01-29 16:09:13 -06:00
Daniel Leung
8776407309 cmake: compiler: add flags for VLIW generations
This adds to compiler flags template on instructing the compiler
on whether to generate VLIW instructions.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2026-01-29 16:09:13 -06:00
Fin Maaß
c4945315e7 riscv: gcc: use string(APPEND
use string(APPEND instead of
string(CONCAT where possible.
Makes it shorter.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2026-01-24 08:47:18 -06:00
Fin Maaß
03418c538e riscv: gcc: seperate fpu mabi and march part
seperate fpu mabi and march part, also use
the extention for the march part to make it
easier to add Zfinx and Zdinx later.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2026-01-24 08:47:18 -06:00
Andy Lin
d807e39a2c arch: riscv: Add the support for Zbkb ISA extension
Introduce the missing flag to compile code with Zbkb extension,
which has already been supported by the GCC 12 in current SDK.

Signed-off-by: Andy Lin <andylinpersonal@gmail.com>
2026-01-23 13:51:55 +01:00
Nicolas Pitre
6b5af82164 cmake: compiler: arm64: Disable SVE for ARMv9-A when CONFIG_ARM64_SVE=n
When building for ARMv9-A platforms with CONFIG_ARM64_SVE disabled,
compilers still emit SVE instructions because ARMv9-A includes SVE
by default in the architecture specification.

Add explicit +nosve flag to -march when CONFIG_ARMV9_A=y but
CONFIG_ARM64_SVE=n to prevent SVE instruction emission. This ensures
the compiler respects the SVE configuration and only emits SVE
instructions when explicitly enabled.

Applied to both GCC and Clang/LLVM toolchains.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2026-01-19 12:22:34 +01:00
Thinh Le Cong
b90df06299 cmake: compiler: iar: skip GCC-specific lib detection
Avoid calling flag print-liggcc-file-name when using IAR

Signed-off-by: Thinh Le Cong <thinh.le.xr@bp.renesas.com>
2026-01-08 12:00:29 +00:00
Carles Cufi
d0547b67cd toolchain: gcc: Add a new LTO_SINGLE_THREADED option for LTO
As described in this issue:
https://github.com/zephyrproject-rtos/sdk-ng/issues/1038
`-flto=auto` fails on some (slower) Windows machines due to an issue with
the Zephyr SDK's GCC toolchain for Windows.
In order to allow users to work around this issue, introduce a new
CONFIG_LTO_SINGLE_THREADED option that switches to `-flto=1`, which
enforces a single thread when processing LTO.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2025-11-28 09:50:04 +00:00
Rico van Dongen
e55bf93d5d cmake: allow spaces in install path of GNU Arm Embedded linker
This commit fixes bug #95402. When the GNU toolchain is installed
in its default path the library include dir will contain spaces.
By encasulating the library path in quotes the linker works again.

Signed-off-by: Rico van Dongen <rdongen@ziggo.nl>
2025-11-27 11:32:19 +01:00
Nicolas Pitre
ffd08f5385 arch: arm64: Implement SVE context switching for ARMv9-A
Implement Scalable Vector Extension (SVE) context switching support,
enabling threads to use SVE and SVE2 instructions with lazy context
preservation across task switches.

The implementation is incremental: if only FPU instructions are used
then only the NEON access is granted and preserved to minimize context
switching overhead. If SVE is used then the NEON context is upgraded to
SVE and then full SVE access is granted and preserved from that point
onwards.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2025-11-18 17:49:40 -05:00
Nicolas Pitre
2aef4fbe5b arch: arm64: Add ARMv9-A architecture and Cortex-A510 CPU support
Add ARMv9-A architecture support with Cortex-A510 CPU as the default
processor for generic ARMv9-A targets.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2025-11-18 17:49:40 -05:00
Anas Nashif
303af992e5 style: fix 'if (' usage in cmake files
Replace with 'if(' and 'else(' per the cmake style guidelines.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-10-29 11:44:13 +02:00
Afonso Oliveira
1c52f45aec cmake: arcmwdt: riscv: derive ccac flags from Kconfig
Add arcmwdt RISC-V core/ISA mapping in target_riscv.cmake to
automatically derive compiler flags from Kconfig settings.

- Select series core flag from SoC Kconfig: -av5rmx/-av5rhx
- Map RISC-V Kconfig to ccac -Z flags (M/A/C/Zicsr/Zifencei/Zicntr)
- Handle compressed logic correctly: -Zc or individual Zc* sub-extensions
- Add F/D and compressed FPU (-Zf/-Zd, -Zcf/-Zcd)
- Add -Zmmul when M is not selected and ZMMUL is enabled
- Use OPTIONAL include to allow for arch-specific target files

Keep early compiler checks stable by not pushing -Z flags into
CMAKE_REQUIRED_FLAGS.

Co-authored-by: Torsten Tejlmand Rasmussen <torsten.rasmussen@nordicsemi.no>
Signed-off-by: Afonso Oliveira <afonsoo@synopsys.com>
Signed-off-by: Afonso Oliveira <afonso.oliveira707@gmail.com>
Signed-off-by: Torsten Tejlmand Rasmussen <torsten.rasmussen@nordicsemi.no>
2025-10-14 18:51:25 +02:00
Kevin Townsend
03fcfcd0f2 cmake: compiler: Add func_instrumentation flag
Adds a new compiler flag to enable function instrumentation injection
at compile time for compilers that support it.

Adds support for this flag to GCC when `CONFIG_INSTRUMENTATION` is
enabled, setting the `-finstrument-functions` flag during compilation.

Signed-off-by: Kevin Townsend <kevin.townsend@linaro.org>
Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
2025-10-05 06:18:25 -04:00
Pierrick Guillaume
b7eec0fe24 cmake: linker: separate toolchain_ld_options() calls for grouped flags
Fixes #91045

Adding NO_SPLIT in the TOOLCHAIN_LD_FLAGS list caused every flags in the
list to be checked together by the linker. This caused issues where
incompatible flags was passed together, and the result was that none was
propagated to the linker.

By using separate variables, we can achieve the initial goal of NO_SPLIT to
only group a sub-set of flags.

Signed-off-by: Pierrick Guillaume <pguillaume@fymyte.com>
2025-09-30 19:36:37 +02:00
Robin Kastberg
d1e5c34ccc iar: toolchain: Cortex-M85 support
Add support in IAR build system for Cortex-M85.

Signed-off-by: Robin Kastberg <robin.kastberg@iar.com>
2025-09-26 13:22:38 +02:00
Benjamin Cabé
59bf4e7895 cmake: clang: set no_track_macro_expansion properly
Compiler property no_track_macro_expansion is controlled by
CONFIG_COMPILER_TRACK_MACRO_EXPANSION.
When that Kconfig is set to Y, clang fails with the following error
message:

   unknown argument: '-ftrack-macro-expansion=0'

This commit modifies clang/compiler_flags.cmake so that there is a
proper clang compiler option for this flag.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-09-22 11:17:34 +02:00
Jaagup Averin
ac0387448e llvm: Remove "-Wno-volatile" from clang compiler args.
-Wno-volatile is set by gcc/compiler_flags.cmake,
but is not supported by clang and generated warnings.

Signed-off-by: Jaagup Averin <jaagup.averin@gmail.com>
2025-09-13 18:14:04 -04:00
Jaagup Averin
a2c55e01a8 llvm: Reorganize clang/compiler_flags.cmake
Since this overrides values from gcc/compiler_flags.cmake,
they should ideally have the same structure and order.

Signed-off-by: Jaagup Averin <jaagup.averin@gmail.com>
2025-09-13 18:14:04 -04:00
Ilya Tagunov
09a034e8ce toolchain: arcmwdt: override unsuitable default implementations
Provide toolchain-specific implementations for the new functions
added in d77b58a, because the default ones end up with build failures.

As the MWDT toolchain doesn't support different combinations of
compilers and linkers, there's no need to pass any linker properties
from the compiler, at least for the time being. Moreover, the default
implementation of compiler_set_linker_properties() uses the compiler
flag (--print-libgcc-file-name) that doesn't make any sense for MWDT.
Therefore, provide an empty implementation of the function.

The default implementation of toolchain_linker_add_compiler_options()
doesn't cause any issues for now, but it's still better to replace
it with the passthrough implementation borrowed from ld/lld.

Signed-off-by: Ilya Tagunov <Ilya.Tagunov@synopsys.com>
2025-09-01 14:01:46 +02:00
Mikhail Siomin
60a12bd336 cmake: fix build using clang when default and target arch do not match
Use CMAKE_C_COMPILER_TARGET to allow clang to correctly determine
the runtime library for the target architecture.
Otherwise, the default runtime library will be selected.

Signed-off-by: Mikhail Siomin <victorovich.01@mail.ru>
2025-09-01 08:33:00 +02:00