This expands the Galileo pinmux driver to configure the GPIOs
on the DesignWare IP block, and the core/resume wells on
the legacy bridge.
Change-Id: Ia1df4b6fd3b104f08563fe9eab93f01efbb53b66
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This enables all the GPIO blocks, and pin muxes on Galileo Gen2
board. GPIO and I2C are now sharing one interrupt line so both
can now get interrupt driven events.
Change-Id: I31a4823abba84539ce5d1cc84e85b7dc335cf831
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Debugging should only enabled in the application using this
platform, not for everyone.
Change-Id: If5c17d0a87ac1d15d19ece7de93102eb2461c324
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The Kconfig option SUPPORT_FP_SHARING does not exist. In fact, it had been
previously renamed to FP_SHARING (this one case was missed). Fixing this
allows the use of conditional directives in _ExcExit() to be simplified.
Change-Id: I61f98191afe776f70af3c9d9265c38c559be3486
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Fixes the initialization of the default exception stack frame to ensure that
every field of the structure is initialized to the dummy value of 0xdeaddead.
Change-Id: Ic7a5b66204172b53a657c9540196f01a74e1000c
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
The DesignWare GPIO and I2C are PCI devices which share the same
IRQ line. This patch enables the shared IRQ support for I2C. GPIO
support is to be followed.
This also enables I2C for nanokernel on Galileo.
Change-Id: I66681d71899914bdcb35c4af649d077ffb8d7970
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
On some platforms (e.g. Galileo), the I2C controller is on PCI bus,
which shares IRQ with other devices (GPIO on Galileo). This patch
adds support for utilizing shared IRQ.
Change-Id: Id4e4714aed37c2893d0ffe9ed1e4edaabb338121
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
On some platforms (e.g. Galileo), the GPIO controller is on PCI bus,
which shares IRQ with other devices (I2C on Galileo). This patch
adds support for utilizing shared IRQ.
Change-Id: I4b44bae15356e4710d54f0343fed1bd27f35e484
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds the code to setup the IO-APIC for shared IRQ.
The code to enable shared IRQ with GPIO and I2C will follow.
Change-Id: I6e7de69f83bf7f1dd0da0571dbcb417beb2c232b
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This driver allows multiple drivers to share a common interrupt
line. This functionality is required on system that conform to the PC
interrupt structure. In the context of Zephyr this is needed for
SOC's that have their I/O IP blocks behind a PCI interface. Due to the
limited number of interrupt lines provided by the PCI interface
multiple IP blocks may be configured to share an interrupt line.
Drivers that share interrupts must be modified to *not* register their
own interrupt service routine as part of their configuration/initialization
but instead bind to the correct instance of this driver by name, then
register their interrupt service routine with this driver.
Change-Id: I57b517b97ebeabce484ba53c8f940da993cb391d
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
The first 32 entries are for well-known exceptions
Change-Id: I3342c48af6e7f687065fafd0c2af4dabc04d421e
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The GPIO ports on the legacy bridge have to be access by
I/O port read/write, instead of direct memory access.
Choices in Kconfig cannot have default values in Kconfig,
so it has to be done in defconfig instead.
Change-Id: I479f3776edf5690f73d8e857ce6683285db092c0
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The interrupt selectionss are no longer specific to a particular
controller (e.g. I2C_DW_0), but apply to all controllers on
the platform.
[DL: Extracted these changes into their own patch, instead of
being squashed with others. Also modified the Kconfig
options to move them into proper position.]
Change-Id: Idc7ac9769e947447b868dccf772a95dbb5fc8021
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
This adds the default config option to enable the I2C controller,
for both nanokernel and microkernel.
Note that choices in Kconfig cannot have default values in Kconfig,
so it has to be done in defconfig instead.
Change-Id: I2ac0c880629db68e5b9a6bf61e49939ab7418a89
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds the Kconfig option to specify default configuration
for the I2C controller during driver initialization.
During boot, the controller needs to be configured before
communication to slave devices can start. After boot,
an app can re-configure the controller if needed.
Change-Id: I7bf252f75a31943ae444e4d914f3a9a1a3f3d91f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Begining of interrupt (BOI) is only supported on systems with a 8259
interrupt controller all modern x86 systems use APIC interrupt
controller.
Change-Id: Ife2b3b1971bbebeda597bfa1f96005f79cd7e959
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Zephyr requires that the processor be in 32 bit protected mode on
entry.
Change-Id: I71792eeb154281881e8516a7a8a2291a52f83fc6
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
BOOT_A20_ENABLE relies on the kernel being on a system that has a full
PC BIOS and requires that the A20 line be enabled to boot
correctly. None of the supported platforms satisfy either requirment.
Change-Id: I05805a050f5531de0348b60a4f0cb974e464b279
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
This avoids the case where the system has multiple threads using
floating point and the threads were not properly configured to use
floating point. The misconfigured threads will only take the fault on
first use of a floating point instruction.
Change-Id: I2be9f9f145bc4e7659e07154021ccc237774897b
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Allow the user to see the configure option without relying on
FP_SHARING being set.
Change-Id: I7e802c18a1c1087f7672925b18ae32dcc20787da
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
The default for x86 floating point support in Zephyr is *no* this
option is redundant and more that a little confusing.
Change-Id: I41fad33467321c483a4df028230ecbb28b4486f9
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
SSE instructions are controlled by the FLOAT and SSE config variables
this option is redundant
Change-Id: Iab43d21315655a00daeac24994ee29a8e1c70207
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
The projects depend on the options enabled by ENHANCED_SECURITY select
required options explicitly. Forcing selection based on
ENHANCED_SECURITY is redundant.
Change-Id: I4473996355e67c99be91413b55d7c6685d9263b2
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
All supported platforms have descending stack (growth direction is
down). To avoid confusion just remove not needed stack direction
defines.
If new platform with stack direction up is added is should be
configured by adding Kconfig option eg STACK_GROWS_UP and
CONFIG_STACK_GROWS_UP should be used in code that depends on
stack growth direction.
Change-Id: I786ff1ab28d8f8bad3f6d1bbe64defc0e81d1707
Signed-off-by: Szymon Janc <ext.szymon.janc@tieto.com>
There are devices that need are part of the architecture core the need
to be initialized prior to devices that are integrated around a core
to make up a complete SOC. Namely the interrupt controller in the SOC
must be configured in order to allow the integrated IP blocks drivers
to initialize correctly.
Change-Id: I0a91e08f98516a7b7dd402ffc6494a071f1326b2
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
This macro is legacy from an early implementation of the init system
before the pure level was split into early and late phases remove it
now to avoid confusion going forward.
Change-Id: I6720874c840c9e14888fd6f411a8182e7420ca29
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
[DL: changed mapping, and to set GPIO directions.]
Change-Id: I4153c5565b341215998645377eaad0d91da4febf
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
From old build system -DPERF_OPT was set with no optimisation, that
was buggy and did not function as expected with new Makefiles.
Change-Id: I21ebbe0e9314d0a25cb53c6455ff244252e44af0
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Dependency on ia32_pci here is wrong, also simplify the variable
handling and logic.
Change-Id: I535e25e12283c288250b23327b2a8f698da31341
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Those ports uses different instructions to get accessed: in/out
instructions. It differs in many ways with memory access, and it's much
slower. It's unset by default, but some arch exposing legacy UART ports
might need it.
Change-Id: I06f2a7c7812e720863957bd20d5c2b8b02c10734
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Avoid adding platform data to defconfig directly and instead
use Kconfig. This will allow overrides.
Change-Id: I95984cb691e8a796ff14b92c6985fceccb0b9cad
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The default values for the platform will be used when running
make *_defconfig instead of hardcoding them in the defconfig directly.
Change-Id: If2945cc11cfca787c2b93a96b502650f1dddd29d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This makes variables readable and consistent with other drivers
we have.
Change-Id: I816f133279497eafd5d5614013c8d224d5909590
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This driver naming is an exception which compared with all other drivers
we have. To keep things consistent the configuration options and variables
are renamed to <type>_<name>.
Change-Id: Ib95aa09630a507848f78d8f2c28706b545eed06d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
On Galileo, there are additional GPIO pins on the legacy bridge.
This adds the config options to enable the driver for those GPIOs,
using the MMIO-based GPIO driver.
Change-Id: I0014018238a40577631bafbdf55ed0c6c0886194
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
There are 3x PCAL9535A GPIO chips on Galileo gen2 board.
This enables the driver for all of them.
Change-Id: Ie4d1aec9427e159a60322caac541b75e7ef973db
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
