Commit graph

64 commits

Author SHA1 Message Date
Flavio Ceolin
9a869ef33a arc: pm: Don't use deprecated function
Use pm_system_resume instead of z_pm_save_idle_exit

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2024-06-05 17:36:22 -05:00
Evgeniy Paltsev
6ce3c531d8 ARC: ARcv3: 64bit: manage accumulator reg properly
In case of ARCv3 64 bit we have only one 64bit accumulator
register instead of register pair, so fixup register
save & restore code.

While we at it also make ARC_HAS_ACCL_REGS option (which
controls accumulator reg/regs save & restore) default
for HS5x and HS6x as well - as it should be.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2022-08-19 12:09:37 +02:00
Gerard Marull-Paretas
4b91c2d79f asm: update files with <zephyr/...> include prefix
Assembler files were not migrated with the new <zephyr/...> prefix.
Note that the conversion has been scripted, refer to #45388 for more
details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-09 12:45:29 -04:00
Flavio Ceolin
7dd4297214 pm: Remove unused parameter
The number of ticks on z_pm_save_idle_exit is not used and there is
no need to have it.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-11-17 11:15:49 -05:00
Andy Ross
c815996606 arch/arc: Add hook for CONFIG_SCHED_THREAD_USAGE accounting in ISRs
Call into z_thread_usage_stop() before ISR entry to avoid including
interrupt handling totals in thread usage stats.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-11-08 21:32:20 -05:00
Evgeniy Paltsev
ab17a59ba5 ARC: mark accesses which are 32 bit despite of platform bittnes
Mark the places where we intentionally use st instead of STR for
code common for ARCv2 and ARCv3.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-05-07 14:55:49 -05:00
Evgeniy Paltsev
c2b61dfe72 ARC: rewrite ASM code with asm-compat macroses
Rewrite ARC assembler code with asm-compat macroses, so the same
code can be used for both ARCv2 (GNU and MWDT assemblers) and
ARCv3 (GNU assembler)

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-05-07 14:55:49 -05:00
Anas Nashif
e0f3833bf7 power: remove SYS_ and sys_ prefixes
Remove SYS_ and sys_ from all PM related functions and defines.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-12-09 15:18:29 -05:00
Anas Nashif
dd931f93a2 power: standarize PM Kconfigs and cleanup
- Remove SYS_ prefix
- shorten POWER_MANAGEMENT to just PM
- DEVICE_POWER_MANAGEMENT -> PM_DEVICE

and use PM_ as the prefix for all PM related Kconfigs

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-12-09 15:18:29 -05:00
Watson Zeng
249aa62c27 arch: arc: fix for hs eret has no copy of pc in interrupt entry
According to the PRMs of both ARC EM & ARC HS families on entry
to Fast IRQ handler ARC hardware saves PC (Program Counter) value
of where processor was right before jumping to the IRQ handler into
2 registers: ILINK & ERET.

But it turned out in case of ARC HS (at least in configuration with
Fast IRQs & 1 register bank) only ILINK was populated with the
previous PC, while in Zephyr we relied on what we read out of ERET.
That lead to funny issues when CPU returned from IRQ handling
to some unexpected location.

And now with that precious knowledge we're switching to return
address recovery from ILINK so that with both families of ARC
processors (EM & HS) we may get reliably good results.

The wrapper is few cycles shorter/faster as well, as we may shave off
another extra instruction for transferring ERET value from its AUX reg
to a scratch core register to be later stored in the memory.

+----+---------------+---------------+--------------+
|    | FIRQ          | RIRQ          | RIRQ(Secure) |
+----+---------------+---------------+--------------+
| HS | ILINK=PC      | ILINK=PC      | NULL         |
+----+---------------+---------------+--------------+
| EM | ILINK=ERET=PC | ILINK=ERET=PC | ILINK=PC     |
+----+---------------+---------------+--------------+

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2020-11-26 14:19:28 +01:00
Yuguo Zou
d24c6e5aae arch: arc: use ifdef to replace if define in isr wrapper code
isr wrapper code has mixed usage of #ifdef and #if define macros. Unify
them to more usual #ifdef.

Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
2020-11-02 11:02:47 -06:00
Yuguo Zou
dbd431d2bc arch: arc: fix a reg misuse in leaving tickless idle
There is a register misuse in leaving tickless idle code, which would
destroy exception/interrupt status. This commit fix this issue.

Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
2020-11-02 11:02:47 -06:00
Anas Nashif
6e27478c3d benchmarking: remove execution benchmarking code
This code had one purpose only, feed timing information into a test and
was not used by anything else. The custom trace points unfortunatly were
not accurate and this test was delivering informatin that conflicted
with other tests we have due to placement of such trace points in the
architecture and kernel code.

For such measurements we are planning to use the tracing functionality
in a special mode that would be used for metrics without polluting the
architecture and kernel code with additional tracing and timing code.

Furthermore, much of the assembly code used had issues.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-09-05 13:28:38 -05:00
Anas Nashif
a45c403c56 tracing: arc: depend on CONFIG_TRACING_ISR for ISRs
Use CONFIG_TRACING_ISR to exclude tracing ISRs just like other
architectures.

Also, z_sys_trace_isr_exit was not defined (It was renamed some time ago
and this was forgotten...)

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-08-24 13:21:12 +02:00
Eugeniy Paltsev
9cb9906418 ARC: cleanup exit_tickless_idle
Rewrite 'exit_tickless_idle' macro to make code more readable.
No functional changes intended.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2020-07-24 12:05:12 +02:00
Watson Zeng
85acfd2e27 arch: arc: irq: bugs fix for fast irq in one register bank config
* The stack pointer (SP) register points to the lowest-used address of
   a downward-growing stack, so memory address [sp] is used, we can't
   modify it.

* In firq_no_switch case, we need to pop sp, which pushed before
   _isr_demux function in firq_nest function.

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2020-07-07 15:10:26 +02:00
Wayne Ren
ea0431d305 arch: arc: fix the trace of isr enter and exit
fix the trace of isr enter and exit

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2020-03-12 13:02:17 -04:00
Wayne Ren
84cdfa271d arch : arc: clean up of assembly codes
* update comments to match latest codes
* add extra comments for some assembly, macros
* use macro to replace duplcated codes
* remove unused codes, lables, symobols

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2020-03-12 13:02:17 -04:00
Anas Nashif
26cecf74c4 arc: remove old macro used for event logger
Leftover macro from the kernel event logger which was replaced by
generic tracing infrastructure.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-01-09 11:21:19 -05:00
Andrew Boie
4f77c2ad53 kernel: rename z_arch_ to arch_
Promote the private z_arch_* namespace, which specifies
the interface between the core kernel and the
architecture code, to a new top-level namespace named
arch_*.

This allows our documentation generation to create
online documentation for this set of interfaces,
and this set of interfaces is worth treating in a
more formal way anyway.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-11-07 15:21:46 -08:00
Mrinal Sen
1246cb8cef debug: tracing: Remove unneeded abstraction
Various C and Assembly modules
make function calls to z_sys_trace_*. These merely call
corresponding functions sys_trace_*. This commit
is to simplify these by making direct function calls
to the sys_trace_* functions from these modules.
Subsequently, the z_sys_trace_* functions are removed.

Signed-off-by: Mrinal Sen <msen@oticon.com>
2019-09-26 06:26:22 -04:00
Wayne Ren
a75b0014fb arc: replace 32-bit instructions with possible 16-bit instructions
replace 32-bit instructions with possible 16-bit instructions to
get better code density

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-09-08 12:36:02 +02:00
Wayne Ren
14db558939 arch: arc: typo fixes and comments clean up
typo fixes and comments clean up

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-01 18:09:35 -07:00
Wayne Ren
908f9ec8f5 arch: arc: add handling for accl regs, r25, r30
* when fpu is configured or mpy_option > 6,
accl regs (r58, r59) will be configured,
they are used by fpu and mac, and are caller
-saved scratch regs, so need to be saved before
jumping to interrupt handlers

* r25 and r30 are also caller-saved scratch reg.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-01 18:09:35 -07:00
Wayne Ren
733c11b11b arch: arc: use IRQ_ACT to check nest interrupt
* use IRQ_ACT to check nest interrupt
* implement an asm macro for nest interrupt check
* no need to use exc_nest_count, remove it

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-07-30 10:16:38 -07:00
Wayne Ren
0318e3a758 arch: arc: remove saved_r0/saved_sp used in firq handling
* do not use a specific variable (saved_r0/saved_sp) to free r0
  /exchange sp, but use stack to do that.

* it will make code scalable, e.g. for SMP, no need to define
  variables for each core

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-07-30 10:16:38 -07:00
Wayne Ren
890b9ebab7 arch: arc: implement z_arch_switch to replace swap
* here use new style z_arch_switch,i.e. CONFIG_USE_SWITCH
to replace old swap mechnism.

* it's also required by SMP support

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-06-28 09:56:03 -04:00
Bradley Bolen
d2ef19bd25 arch: arc: Fix checks of CONFIG_ARC_FIRQ
The compiler generates errors of the form
error: "CONFIG_ARC_FIRQ" is not defined, evaluates to 0 [-Werror=undef]
when -Wundef is used and the config option was turned off.  Change
check to if defined().

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2019-05-20 22:27:56 -04:00
Wayne Ren
b444de8887 arch: arc: optimize the push and pop of fast irq
use macro to replace pop/push instructions

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-04-19 14:37:03 -05:00
Wayne Ren
959abdf1c9 arch: arc: move the call of read_timer_start_xx to _isr_demux
It's simpler and cleaner to move read_timer_start_of_isr to

_isr_demux. But the interrupt latency may be not accurate.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-03-18 08:14:59 -04:00
Wayne Ren
2c28ff0978 arch: arc: fixes the hanlding of CONFIG_EXECUTION_BENCHMARKING
when firq is enabled and there are multiple register banks,
it requires different handling

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-03-18 08:14:59 -04:00
Patrik Flykt
4344e27c26 all: Update reserved function names
Update reserved function names starting with one underscore, replacing
them as follows:
   '_k_' with 'z_'
   '_K_' with 'Z_'
   '_handler_' with 'z_handl_'
   '_Cstart' with 'z_cstart'
   '_Swap' with 'z_swap'

This renaming is done on both global and those static function names
in kernel/include and include/. Other static function names in kernel/
are renamed by removing the leading underscore. Other function names
not starting with any prefix listed above are renamed starting with
a 'z_' or 'Z_' prefix.

Function names starting with two or three leading underscores are not
automatcally renamed since these names will collide with the variants
with two or three leading underscores.

Various generator scripts have also been updated as well as perf,
linker and usb files. These are
   drivers/serial/uart_handlers.c
   include/linker/kobject-text.ld
   kernel/include/syscall_handler.h
   scripts/gen_kobject_list.py
   scripts/gen_syscall_header.py

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-03-11 13:48:42 -04:00
Anas Nashif
483910ab4b systemview: add support natively using tracing hooks
Add needed hooks as a subsystem that can be enabled in any application.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-08-21 05:45:47 -07:00
Anas Nashif
a2248782a2 kernel: event_logger: remove kernel_event_logger
Move to more generic tracing hooks that can be implemented in different
ways and do not interfere with the kernel.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-08-21 05:45:47 -07:00
Adithya Baglody
db0c5ca08b arch: arc: Added benchmark related hooks.
The benchmark application timing_info needs certain hooks to be
present in the kernel to get the accurate measurements. This
patch adds these hook at all the required locations.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-08-20 06:51:25 -07:00
Wayne Ren
0a71b106d1 arch: arc: save user thread's context into privilege stack
disable the U bit of irq.ctrl, so the user thread's context will
be saved into privilege stack when interrupts/exception come.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-02-16 12:20:16 +01:00
Wayne Ren
e91733c78b arch: arc: bug fixes and add user space support in secure mode
* bug fixes
* add user space support in secure mode

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-02-16 12:20:16 +01:00
Wayne Ren
f81dee0b2b arch: arc: add user space support for arc
* add the implementation of syscall
  * based on 'trap_s' intruction, id = 3
* add the privilege stack
  * the privilege stack is allocted with thread stack
  * for the kernel thread, the privilege stack is also a
    part of thread stack, the start of stack can be configured
    as stack guard
  * for the user thread, no stack guard, when the user stack is
    overflow, it will fall into kernel memory area which requires
    kernel privilege, privilege violation will be raised
* modify the linker template and add MPU_ADDR_ALIGN
* add user space corresponding codes in mpu
* the user sp aux reg will be part of thread context
* When user thread is interruptted for the 1st time, the context is
  saved in user stack (U bit of IRQ_CTLR is set to 1). When nest
  interrupt comes, the context is saved in thread's privilege stack
* the arc_mpu_regions.c is moved to board folder, as it's board
  specific
* the above codes have been tested through tests/kernel/mem_protect/
  userspace for MPU version 2

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-02-16 12:20:16 +01:00
Wayne Ren
52e4c197f3 arch: arc: Add FIRQ option
Add FIRQ option and change the _isr_wrapper. Currently, firq is
enabled by default, but in some arc configuration, firq can be
disabled.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2017-12-13 12:05:33 -05:00
Anas Nashif
780324b8ed cleanup: rename fiber/task -> thread
We still have many places talking about tasks and threads, replace those
with thread terminology.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-10-30 18:41:15 -04:00
Wayne Ren
f8d061faf7 arch: arc: add nested interrupt support
* add nested interrupt support for interrupts
   + use a varibale exc_nest_count to trace nest interrupt and exception
   + regular interrupts can be nested by regular interrupts and fast
interrupts
   + fast interrupt's priority is the highest, cannot be nested
* remove the firq stack and exception stack
   + remove the coressponding kconfig option
   + all interrupts (normal and fast) and exceptions will be handled
     in the same stack (_interrupt stack)
   + the pros are, smaller memory footprint (no firq stack), simpler
     stack management, simpler codes, etc.. The cons are, possible
     10-15 instructions overhead for the case where fast irq nests
     regular irq
* add the case of ARC in test/kernel/gen_isr_table

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-08-10 12:47:15 -04:00
Anas Nashif
397d29db42 linker: move all linker headers to include/linker
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-18 09:24:04 -05:00
Michael R Rosen
b5d4a25a11 arc: fix balign position to properly 4byte align global vars
The .balign directives were not working correctly in their
previous positions as the directive was applying to the section
before the variable's section, causing in some builds the
variables to be misaligned, and accesses to them causing faults.
With the alignments after the section declaration, the variables
will now be aligned as specified. Any future variable declarations
should use this form instead to ensure proper alignment.

Signed-off-by: Michael R Rosen <michael.r.rosen@intel.com>
2017-06-12 23:33:31 -04:00
Andrew Boie
35fcb2736c arc: enable gen_isr_tables mechanism
Change-Id: I5897e110f554377796bfe38dd5c0f8652c29e5be
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-15 04:54:47 +00:00
Benjamin Walsh
ee659ae1a1 build: add _ASMLANGUAGE to all asm files
This avoids asm files from having to explicitly define the _ASMLANGUAGE
symbol themselves.

Change-Id: I71f5a169f75d7443a58a0365a41c55b20dae3029
Signed-off-by: Benjamin Walsh <walsh.benj@gmail.com>
2017-01-24 13:34:51 +00:00
David B. Kinder
ac74d8b652 license: Replace Apache boilerplate with SPDX tag
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.

Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.

Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file.  Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.

Jira: ZEP-1457

Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-19 03:50:58 +00:00
Benjamin Walsh
3c39e55ab1 arc: fix unaligned variables resulting in unaligned k_cpu_sleep_mode
Force-align all variables defined via asm .word to ensure 4-byte
alignment.

The straddled_tick_on_idle_enter variable was a bool, which resolved in
an one-byte quantity. Changing it to a 32-bit integer. It would have
occupied 4 bytes anyway with alignment.

Fixes ZEP-1549.

Change-Id: If5e0aa1a75dbc73d896b44616f059d221fe191c6
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2017-01-13 01:36:08 +00:00
Benjamin Walsh
f6ca7de09c kernel/arch: consolidate tTCS and TNANO definitions
There was a lot of duplication between architectures for the definition
of threads and the "nanokernel" guts. These have been consolidated.

Now, a common file kernel/unified/include/kernel_structs.h holds the
common definitions. Architectures provide two files to complement it:
kernel_arch_data.h and kernel_arch_func.h. The first one contains at
least the struct _thread_arch and struct _kernel_arch data structures,
as well as the struct _callee_saved and struct _caller_saved register
layouts. The second file contains anything that needs what is provided
by the common stuff in kernel_structs.h. Those two files are only meant
to be included in kernel_structs.h in very specific locations.

The thread data structure has been separated into three major parts:
common struct _thread_base and struct k_thread, and arch-specific struct
_thread_arch. The first and third ones are included in the second.

The struct s_NANO data structure has been split into two: common struct
_kernel and arch-specific struct _kernel_arch. The latter is included in
the former.

Offsets files have also changed: nano_offsets.h has been renamed
kernel_offsets.h and is still included by the arch-specific offsets.c.
Also, since the thread and kernel data structures are now made of
sub-structures, offsets have to be added to make up the full offset.
Some of these additions have been consolidated in shorter symbols,
available from kernel/unified/include/offsets_short.h, which includes an
arch-specific offsets_arch_short.h. Most of the code include
offsets_short.h now instead of offsets.h.

Change-Id: I084645cb7e6db8db69aeaaf162963fe157045d5a
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-11-12 07:04:52 -05:00
Andrew Boie
8871cf0994 arc: remove support for legacy kernels
Change-Id: Id3d8285dc39428752758ee47fb1b826f05b1f3e0
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-11-04 11:45:14 -07:00
Dmitriy Korovkin
dc76dbf2ef unified: Add tickless idle support for ARC
Change-Id: I89684e7bee379be0a18f64e4f2c39ae132fe7e6d
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-10-22 01:27:01 +00:00