Some tester commands require to response with current settings.
This patch is needed to properly track the changes in these settings.
Change-Id: Ib9c919e804decbe26ba6ab2a23f1c30d812f98ab
Signed-off-by: Mariusz Skamra <mariusz.skamra@tieto.com>
We are seeing on some platforms that the VMA alignment
does not match the LMA alignment for this section, resulting
in problems when copying into RAM by __csSet(); any copied
sections afterwards end up misaligned in RAM.
While the true fix for this is under investigation, force
4-byte alignment for VMA and LMA.
Change-Id: I627d9e7a3446cbc09dc310a156d8b3268e61c91d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
PCI legacy bridge is a device connected to PCI bus and
allowing to program the routes from interrupt pins to IRQ
numbers.
Change-Id: I129719d71f958bbf5ad8c5c9949dcea93d94b89d
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
In some cases an MDEF file is not needed, especially when using
private objects. Check if the MDEF file actually exists and define
before trying to use it.
Change-Id: I69c78e6d30bc0df0397e5ae354f91b774fcb737c
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Zephyr does not have a MAINTAINERS files, so remove the comment
about checking the file when reporting false positives to avoid
confusion.
Change-Id: I915dba009902a68d5e621603d22b7df57d84a1b1
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Created config file for checkpatch ".checkpatch.conf"
Change-Id: Ic2d72eed38b333d4b05d2d0c8953cbe2795d2429
Signed-off-by: Javier B Perez Hernandez <javier.b.perez.hernandez@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Introduce a new variant for the Zephyr SDK, do not call it
Yocto SDK anymore.
Keeping the yocto variant for now to avoid breaking developer
setup.
Change-Id: I545693eb4be4cec910096ca2ba7e3f38803b4c8d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Kconfig can't set the default for a choice, so it has to be done
using select.
Change-Id: I1d952eb48a7bcda79b4f8ff475110c7430be7b4e
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
do not use microkernel or nanokernel as the output binaries,
instead, use zephyr globally.
Also change the documentation to reflect this.
Change-Id: I8405761d1a0392c90cdfeec5c67d72eb4e5a76ff
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
PCI information and integration of designware's gpio controller
with shared irq.
Change-Id: I80c7fed35ff328e06d87ebad3e2f68fdd6f5672e
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This application can be used to list the PCI devices through the
console.
Change-Id: I3409ab9025b1f18a42b4cdd594fb095ebeac96f3
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Since the console is not yet setup, there will be nothing to be printed
out. Also, it adds a dedicated init function which is only useful for
it. Instead, debugging PCI enumeration can be simply done in application
side.
Change-Id: Ia8384caa97d43f0bc4300ecf36bc11d1b8bd5581
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
PCI enumeration is not mandatory to enable as static information can be
provided. Plus, it does not integrate yet properly with shared IRQ as
well as setting dedicated IOAPIC paremeter for certain drivers.
Change-Id: I221b2a8a2179993a264e5f3eb93cda0e121d9abe
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
As long as PCI_ENUMERATION does not work for all IP block, let's provide
pre-configured base address registers for ns16550 on Galileo.
Once PCI_ENUMERATION will be fixed, such pre-configured settings will
not be used at runtime.
Change-Id: I514b3a5759e3af04132c7801f37033108a7b279b
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Providing the right settings through Galileo's Kconfig.
Change-Id: Ia5339eb90cb98d7dde3be0493bcfd9a6b6db60ed
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Add Kconfig option to specify how interrupt is triggered for SPI.
Also enabling such support for Galileo platform.
Change-Id: Id3112d100089197940f826b827493174d0f22669
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This is specific to Galileo board where its SPI port 0 needs to setup
the CS pin through a GPIO pin.
Change-Id: I9df6f7144a96bcd10f61fc7d057f89caa0e599d1
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Perform configuration of the shared IRQ has to be done earlier,
as the config code masks the interrupt by default. If configuration
is done after shared_irq_enable() is called, the interrupt is
effectively masked. So move the init level a bit earlier.
Change-Id: Ic7f059628e3cf122d323513e171c7d1a09e5d4a6
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The IOAPIC driver resets all interrupt vectors, so any configuration
has to be done after that. Move the HPET IRQ config to later init
level so we are sure that the configuration is being done.
Change-Id: Id169461cce15252f7fb77e9c07961300233f3344
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
With the typos, IRQ triggering conditions are not set correctly.
Change-Id: I0698ce69c3368411a2f91a32ac27608e9f1de252
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Fix previous rebasing errors (before merging) where deleted code
was reintroduced back. This causes the default configuration
in Kconfig to be ignored.
Change-Id: I29b246b1459136521d764127bf02e6d8e5aff30c
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This expands the Galileo pinmux driver to configure the GPIOs
on the DesignWare IP block, and the core/resume wells on
the legacy bridge.
Change-Id: Ia1df4b6fd3b104f08563fe9eab93f01efbb53b66
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This enables all the GPIO blocks, and pin muxes on Galileo Gen2
board. GPIO and I2C are now sharing one interrupt line so both
can now get interrupt driven events.
Change-Id: I31a4823abba84539ce5d1cc84e85b7dc335cf831
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
If using with shared IRQ, this function will be called by
the shared IRQ driver. So we need to check and bail out
early if the interrupt is not coming from the GPIO
controller.
Change-Id: I4ae925f5fb9a5c32d03a180edc8460e978ec0aac
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
If using with shared IRQ, this function will be called by
the shared IRQ driver. So we need to check and bail out
early if the interrupt is not coming from the I2C controller.
Change-Id: I3c3ae3c22aa5cf312de5c22b35765749d6c5929d
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Debugging should only enabled in the application using this
platform, not for everyone.
Change-Id: If5c17d0a87ac1d15d19ece7de93102eb2461c324
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
