Enable icount mode for hifive1 platform, The icount shift value is
selectd based on cpu clock frequency of this platform. The virtual
cpu will execute one instruction every 2^shift ns of virtual time.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Enable icount mode for qemu_riscv64 platform, The icount shift value
is selectd based on cpu clock frequency of this platform. The virtual
cpu will execute one instruction every 2^shift ns of virtual time.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Enable icount mode for qemu_riscv32 platform, The icount shift value
is selectd based on cpu clock frequency of this platform. The virtual
cpu will execute one instruction every 2^shift ns of virtual time.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Enable icount mode for qemu_cortex_a53 platform, The icount shift
value is selectd based on cpu clock frequency of this platform.
The virtual cpu will execute one instruction every 2^shift ns of
virtual time.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Enable icount mode for qemu_cortex_m3 platform, The icount shift value
is selectd based on cpu clock frequency of this platform. The virtual
cpu will execute one instruction every 2^shift ns of virtual time.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Enable icount mode for qemu_cortex_m0 platform, The icount shift value
is selectd based on cpu clock frequency of this platform. The virtual
cpu will execute one instruction every 2^shift ns of virtual time.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Enable icount mode for qemu_x86 platform, The icount shift value is
selectd based on cpu clock frequency of this platform. The virtual
cpu will execute one instruction every 2^shift ns of virtual time.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Add cpu time for QEMUHandler because the guest virtual time
in QEMU icount mode isn't host time and it's maintained by
counting guest instructions, we use QEMU process CPU time to
mostly simulate the time of guest OS.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Sometimes QEMU can't handle SIGTERM signal correctly and just
run as normal, in that case kill -9 QEMU process directly and
leave sanitycheck judge the testing result by console output.
For failures caused by other reasons, terminate all releated
processes to avoid CI waits 2 hours and reports timeout.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
In Qemu icount mode, busy wait will cause lots of wall time and it's
very easy to get sanitycheck timeout(this case will be successful if
given enough timeout value for sanitycheck), so reduce test interval
to save execution time.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
This CPU-bound test on qemu_riscv32 platform is very slow when
QEMU icount mode enabled, taking upwards of several minutes.
There's little value here, this is a unit test of library code
and we have coverage of the RISC-V 32 bit arch via hifive1.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Remove the existing qemu icount configuration because icount mode
will be controlled by Kconfig QEMU_ICOUNT so that none suitable
cases(especially networking cases) can exclude icount configuration
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Change adds abort of ongoing write operation in ep_ctx_reset. This is
required to keep the state of Zephyr driver consistent with state of
nrfx driver. This fixes a bug where nrfx_usbd was stuck in busy state.
Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
If interrupt is previously enabled and triggering condition
changes, it might fire callback based on previous condition.
To avoid this issue, disable interrupt before trying to
change settings, and enable afterwards.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
We modify the content around the Release Team formation,
and maintenance, describing in detail how maintainers
may be added to the team. Add a comment about Release
Managers that stresses that they must be members of the
team. Add details on how the TSC shall ensure a functional
release team. Add details on how the release team will
be picking release managers (cadence and selection process).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We add a section that clarifies how the project
roles may be removed. We stress that the rules
will apply to elected project roles that the TSC
may define in the future.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We need to clarify how Maintainers may become voting
TSC member, and direct this to the Charter guidelines.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Ensures that TLS from when the thread was in supervisor mode
is erased, rather than rely on the arch code to do it.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The length field for the MCUBOOT slot partitions in Nordic platforms
has always had an extra leading zero suggesting it's a 40-bit value,
being stored in a 32-bit field. Remove the incorrect leading zero to
reduce misunderstanding of the field.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
x86-32 thread objects require special alignment since they
contain a buffer that is passed to fxsave/fxrstor instructions.
This fell over if the dummy thread is created in a stack frame.
Implement a custom swap to main for x86 which still uses a
dummy thread, but in an unused part of the interrupt stack
with proper alignment.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
- simplify dummy thread initialization to a kswap.h
inline function
- use the same inline function for both early boot and
SMP setup
- add a note on necessity of the dummy thread even if
a custom swap to main is implemented
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Fix extended advertiser not using correct set random address command
to set private (NRPA) address when privacy feature has been disabled.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
This this covers two small aspects of DTS functionality: first ensuring
the legacy generation script continues to generally function and second
that FLASH_AREA id's are the same between the old and new generator.
This test will be removed when the legacy generator is removed.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Set LEGACY_DEVICETREE_MACROS to default to no since we are deprecating
the old macro style and all in tree users are now converted.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert with a combo of scripts and by hand fixups:
git grep -l DT_FLASH_AREA_.*_ID | \
xargs sed -i -r 's/DT_FLASH_AREA_(.*)_ID/FLASH_AREA_ID(\L\1)/'
git grep -l DT_FLASH_AREA_.*_OFFSET | \
xargs sed -i -r 's/DT_FLASH_AREA_(.*)_OFFSET/FLASH_AREA_OFFSET(\L\1)/'
git grep -l DT_FLASH_AREA_.*_SIZE | \
xargs sed -i -r 's/DT_FLASH_AREA_(.*)_SIZE/FLASH_AREA_SIZE(\L\1)/'
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add DT_NODE_BY_FIXED_PARTITION_LABEL that given a "label" in any
fixed-partitions map will return the node_id for that partition node.
Add DT_NODE_HAS_FIXED_PARTITION_LABEL that will test if a given
fixed-partitions "label" is valid.
Add DT_FIXED_PARTITION_ID that will return an unique ordinal value for
the partition give a node_id to the partition.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
If we have a fixed-partition on a flash device that is for example on
a spi controller we will not get a binding match currently. This is
because we expect a match between both the compatible and the fact that
fixed-partition node is a decendant of the spi bus.
To address this we treat fixed-partitions as if they are on no bus.
This has the effect of causing a binding match as well as ensuring that
when we process the fixed-partition node we will do anything special to
it because of the bus it happens to be under (for example SPI CS_GPIO
processing).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Setup node.compats right after we create the Node. This allows access
to the compats information in _bus_node.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The macro iterates through the list of child nodes in a DT_DRV_COMPAT
instance and invokes provided macro for each node.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Clean up the board specific samples:
- Do not hard-code the i2c0 device label in the line follower sample.
- Miscellaneous docs cleanups.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Align the docs and source code with other changes done to the basic
samples.
Use numbers 0 and 1 to refer to the LEDs consistently. This matches
the generic devicetree aliases used by Zephyr, instead of using USR1
and USR2, which are specific to 96b_carbon.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Align the sample with changes made to other basic samples.
Move away from 'pwm-0' as a devicetree alias, requiring applications
to define a 'pwm-servo' alias. We are getting rid of the aliases that
just bounce through to node labels as soon as we can, might as well
get the applications ready now.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Align the sample and its documentation with the other basic samples.
Adjust the fade algorithm so that it looks better and takes less time
to verify by taking 2.5 seconds instead of 10.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The difference between "blinky" and "blink_led" is not clear.
This rename makes it more obvious that "blinky_pwm", well,
blinks an LED using PWM.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
