Port all users of 'set_conf_file' to use the built-in rules
instead. This follows the convention-over-configuration principle to
make the system as a whole simpler and more consistent.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
In-tree, all usage of 'set_conf_file' is implementing the same
pattern (with some inconsequential differences).
To reduce copy-paste and get closer to dropping support for
'set_conf_file', we include this pattern into the built-in set of
patterns.
'set_conf_file' is causing issues for future extensions,
e.g. multi-image support, and is also the source of a lot of
duplicated code.
Note support for 'set_conf_file' is not dropped, it is only marked as
deprecated.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
The return of hwinfo_get_device_id is a signed size and it returns a
negative number in case of error. This test was using an unsigned
variable invalidating the errror check.
CID 190929
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Zephyr Continuous Integration made the choice of rebasing pull requests
on its fast moving master branch before testing them. Unfortunately the
Shippable interface assumes the other choice[*] and highlights the SHA1
of the pull request _before_ rebasing which is very misleading. For now
the only way to realize this disconnect is to scrutinize the build logs
and/or this source code (or tribal knowledge).
To mitigate and reduce a bit this confusion, run a short:
git log -n 5 --oneline --decorate
before and after rebase.
Making it worse, Shippable sub-runs are not pegged to a common base
version. For instance the reason why shippable sub-run 35578.1 passed
while all other 35578.x sub runs failed is very likely because PR #13803
was merged to master in the mean time. This commit would have been able
to prove that.
[*] In an ideal world with infinite time and resources, Continuous
Integration would test pull requests BOTH alone and combined with the
moving tip.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
On (at least) Fedora "pytest" is python2 and python2 only.
Also update remote name in sample invocation from "upstream" to "origin"
because that's how west sets things up by default (and this script
requires west)
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
MISRA-C says that char type should not be used in arithmetically as the
data doesn't represent numbers.
MISRA-C rules 10.1 and 10.2
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Variable evt_prop could be used without being initialized. This problem
was spotted by coverity.
CID 190970
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
- PR #13722 moved 3 gen_*.py to /arch/x86/ without updating CODEOWNERS
- PR #13745 forgot a trailing slash in /dts/bindings/can
- PR #13675 forgot a trailing slash in /samples/boards/intel_s1000_crb
No idea why github doesn't keep reporting these every time and
impossible to tell as CI hides most of its logs.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Console subsystem doesn't depend on older consoles-in-drivers, the
only common thing between them is CONFIG_UART_CONSOLE_ON_DEV_NAME
setting, so make it so (by depending on either UART_CONSOLE or
CONSOLE_SUBSYS.
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
Potentially overflowing expression 1U << register_demand
I changed to (u64_t)1U << register_demand
To avoid overflow, I casted 1U to type u64_t.
Coverity-CID: 190996
Fixes: #13829
Signed-off-by: Maksim Masalski <maxxliferobot@gmail.com>
The newer series of timer drivers will compare counters vs. the last
tick boundary to compute a number of ticks to announce to the kernel.
In the case of CONFIG_TICKLESS=n, this actually represents a change of
behavior from our old scheme where "ticks" always reflected the number
of interrupts received.
The distinction only matters when an interrupt is delayed more than a
full tick, of course. But that actually makes a difference to some
timekeeping code. Restore the old behavior.
This also has the benefit of further reducing code size when !TICKLESS
and improving performance of the ISR by removing the division
(remember Cortex M0 has no hardware divide!).
Fixes#12409
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
PAE page tables (the only kind we support) have 512
entries per page directory, not 1024.
Fixes: #13838
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
(Chunk 2 of 3 - this patch was split across pull requests to address
CI build time limitations)
Zephyr has always been a uniprocessor system, and its kernel tests are
rife with assumptions and outright dependence on single-CPU operation
(for example: "low priority threads will never run until this high
priority thread blocks" -- not true if there's another processor to
run it!)
About 1/3 of our tests fail right now on x86_64 when dual processor
operation is made default. Most of those can probably be recovered on
a case-by-case basis with simple changes (and a few of them might
represent real bugs in SMP!), but for now let's make sure the full
test suite passes by turning the second CPU off. There's still plenty
of SMP coverage in the remaining cases.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
GPIO_INT_ACTIVE_LOW is 0 which means it cannot be simply AND-ed.
So fix the condition.
Fixes#13880
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit removes the #ifdefs for ARM platforms in
tests/kernel/fatal/main.c, as all the tests suite can be
executed for platforms supporting the ARM and the NXP MPU.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit introduces a generic arch/arm function to evaluate
thread stack corruption. The function shall be used upon
occurrence of MemManage and Bus Faults.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit adds an explanatory note in the places
where we manually adjust the PSP after stacking Bus
and MemManage errors, stressing that this is due to
the fact that interrupt tail-chaining cannot always
be guaranteed by the processor.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
The commit removes a redundant check for imprecise bus fault,
when a precise bus fault has occurred, now that we have
re-worked the BusFault handler to iterate through all possible
bus errors.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit reworks the logic, based on which we assess
thread stack corruptions upon BusFault exceptions triggered
by the NXP MPU module. BusFaults rely on calling external
function to assess whether a thread stack corruption due to
overflow has occurred. Upon detection of stack corruption,
the current stack pointer is manually adjusted upwards, to
prevent un-stacking errors from firing up upon returning from
the exception.
Additionally, the commit allows to be checking for all different
types of BusFault occurrences that are reported through BFSR,
without stopping after having spotted the first BusFault type.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit reworks the logic, based on which we assess
thread stack corruptions upon MemManageFault exceptions.
Furthermore, it takes out all kernel-related logic and relies
on calling external function 'evaluate_thread_stack_corruption'
to assess whether a thread stack overflow has occurred. Upon
detection of stack corruption, the current stack pointer is
manually adjusted upwards, to prevent un-stacking errors from
firing up upon returning from the exception.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit improves the debug message on UsageFaults
related to Stack overflow, stating that the context
area is not valid. An inline comment is added, with
more detailed explanation.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Implements sys_arch_reboot() on the openisa_rv32m1 soc to enable zephyr
micropython on the rv32m1_vega board.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Commit 0cc362f873 ("tests/kernel: Simplify timer spinning") was
added to work around a qemu bug with dropped interrupts on x86_64.
But it turns out that the tick alignment that the original
implementation provided (fundamentally, it spins waiting on the timer
driver to report tick changes) was needed for correct operation on
nRF52.
The effectively revert that commit (and refactors all the spinning
into a single utility) and replaces it with a workaround targeted to
qemu on x86_64 only. Fixes#11721
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
(Chunk 1 of 3 - this patch was split across pull requests to address
CI build time limitations)
Zephyr has always been a uniprocessor system, and its kernel tests are
rife with assumptions and outright dependence on single-CPU operation
(for example: "low priority threads will never run until this high
priority thread blocks" -- not true if there's another processor to
run it!)
About 1/3 of our tests fail right now on x86_64 when dual processor
operation is made default. Most of those can probably be recovered on
a case-by-case basis with simple changes (and a few of them might
represent real bugs in SMP!), but for now let's make sure the full
test suite passes by turning the second CPU off. There's still plenty
of SMP coverage in the remaining cases.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
MISRA rules (see #11425) forbid recursive algorithms. In the case of
rb_walk(), it's not actually used anywhere but a test right now, so we
can simply disable the API when CONFIG_MISRA_SANE is defined. Mempool
had a (IMHO, fairly clever) tail recursive loop in bfree_recombine()
which can be trivially transformed into an only slightly uglier
iterative version.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
MISRA rules (see #9892) forbid alloca() and family, even though those
features can be valuable performance and memory size optimizations
useful to Zephyr.
Introduce a MISRA_SANE kconfig, which when true enables a gcc error
condition whenever a variable length array is used.
When enabled, the mempool code will use a theoretical-maximum array
size on the stack instead of one tailored to the current pool
configuration.
The rbtree code will do similarly, but because the theoretical maximum
is quite a bit larger (236 bytes on 32 bit platforms) the array is
placed into struct rbtree instead so it can live in static data (and
also so I don't have to go and retune all the test stack sizes!).
Current code only uses at most two of these (one in the scheduler when
SCHED_SCALABLE is selected, and one for dynamic kernel objects when
USERSPACE and DYNAMIC_OBJECTS are set).
This tunable is false by default, but is selected in a single test (a
subcase of tests/kernel/common) for coverage. Note that the I2C and
SPI subsystems contain uncorrected VLAs, so a few platforms need to be
blacklisted with a filter.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Coverity scan found issue with a missing 'break' statement. Fix
push_data by adding the break after handling the 1 byte case.
Coverity CID: 190978
Fixes#13842
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Was apparently an artifact of Python2 to Python3 conversion. Led to
printing of literal '='*110i instead of a line of ='s.
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
When building incrementally, filter-known-issues.py reports a varying
and totally different set of "new" issues than when building from
scratch. Warnings for unrelated upstream code disappearing and
re-appearing are especially confusing. Expand the messages a bit to
clarify.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
This commit extends the arm_irq_vector_table test,
so it can run successfully in nRF9160-based platforms.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit adds the Clock Control Interrupt Service
Routine into the customized vector table, when building
for nRF52X-based platforms. As a result, the interrupts
generated by the clock control will not interfere with
the test.
Fixes#13823.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Minor typo and style fixes in the test logging, stressing
that the test is applicable for Cortex-M MCUs, in general.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
In order to make this test easy to extend for additional
Cortex-M-based platforms, we apply the following minor
refactoring to the test:
- we introduce the _ISR_OFFSET macro to denote the offset
inside the interrupts' vector table (starting from IRQ
line 0) of the first manually installed ISR.
- we move the asserts that ensure the validity of the custom
vector table to build-time and place them in the beginning
of the text, outside source code.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
The MMIO addresses for peripherals are being assigned by BIOS
at boot. Different BIOS versions and number of enabled peripherals
affect how those addresses are assigned. This invalidates
the addresses for UART defined in DTS. Turn on PCI enumeration
so UART addresses are probed at boot to avoid non-usable
UART and black console.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit fixes two Constant Expression Result errors,
in the NXP MPU driver due to incompatible integer types.
Fixes#13836.
Fixes#13865.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
The UARTs on the Apollo Lake SoCs have PLLs that feed the baud rate
generators. This patch allows a user to specify custom M/N values for
those PLLs when custom/high-speed baud rates are required.
I'm not entirely satisfied with the way the PCP values are configured,
because it requires tweaking data in both Kconfig and DeviceTree. For
the time being I've merely taken my cue from another similar feature
(the DLF register support) and have punted on figuring out the "right
way" to expose UART configuration to the application.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
This commit fixes several essential inline comments in the
core assembly code for ARM, improving code readability.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit applies the same fixes, concering the Constant
Expression Result errors identified in the ARMv7-M and the
NXP MPU drivers, into the ARMv8-M MPU implementation.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit fixes two Constant Expression Result errors,
in the ARMv7-M MPU driver due to incompatible integer types.
Fixes#13844.
Fixes#13854.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
The ipv6_handle_ext_hdr_options() can return negative value
but we stored it into unsigned variable and then checked < 0.
Coverity-CID: 190995
Fixes#13830
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
The LI bits checks is useless as the bitshifted value cannot be
larger than SNTP_LI_MAX (3).
Coverity-CID: 190924
Fixes#13888
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>