Currently only 1 is allowed. While we're at it, let's generify the
existing entries, since they could be used by all controllers, not
just QMSI.
Change-Id: Iec5d195fff239931b21a7584eb4b642b40f95be5
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Fix an issue where declaring a device in order to use DEVICE_GET macro
resulted in error: 'static declaration follows non-static declaration'.
Change-Id: I3e851e4d34e905601672e60ded50ed888c4d2a3c
Signed-off-by: Michał Kruszewski <mkru@protonmail.com>
We were missing the cell name in how we create the IRQ define. This was
working fine because the only name we had been using with IRQ which we
would shorten down.
Change-Id: I8449c8ced1a9284982d3d5b07c6acdcf26e965e2
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now both flashing over DFU and JTAG are supported, however JTAG needs a
special connection, so DFU is the current out of the box supported
method for flashing.
Jira: ZEP-1785
Change-Id: I47ffce3b332b99ef6c6afdce2214709a4fa5b946
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This patch fixes an issue where any make target executing the the clean
from the root source directory would remove the dts directory. This is
not necessary and can cause build issues on following make commands.
ZEP-1968
Change-Id: I2cc751d8fd24bd77e425860686b66644ade44eeb
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Currently the entries for STM32 UART ports are at the same level than
the top menuconfig UART_STM32. As a result they are mixed with other
configs in the "Serial Drivers" menu.
Use if/endif grammar to put these entries under a dedicated STM32
submenu.
Change-Id: If28945204b801578d29f8cce7c2370ca3c2737a1
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Add support for GPIO banks I to K that can be found on some high-density
STM32F4 products.
Change-Id: I2cb65ed4d4a2282f7d17478cb1fcdd65dffe71b0
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
The registration of each GPIO bank differs by only few details. These
differences can be factorized in order to create a generic registration
macro.
This has several advantages:
- Less code
- Easier to add new banks
- Less work to add support for new STM32 families
The diff stat speaks for it-self: 26 insertions(+), 92 deletions(-)
Change-Id: I674752fda5ee3caefb815ccf070a1b636b16cf85
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Add several missing clocks that are used by other members of the STM32F4
family. This is needed to add support for various hardware, like UART9
and UART10 on STM32F413.
Change-Id: I6f1a04ddece90a04e31a1710065545179b0e530d
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
It appears that enable bits for BKPSRAM and CCMDATARAM are incorrectly
defined as bit 14 and 16 on AHB1 respectively (when these IPs are present),
where we should use bit 18 and 20 according to the various reference
manuals (STM32F415 for instance).
Change-Id: I44ce59a29c57e306f6a945e46043efbcfce7a92f
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
The PLLN multiplier can range between 50 and 432 on all STM32F4, except
on the STM32F401 where the lower bound is restricted to 192.
Fix the range property and the help text to reflect this reality.
Change-Id: I7b93e84b321f7869aaf611287344cd3e25c893c8
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
The Cortex-M4 of the STM32F4 family has an FPU. Enable the FPU support
by selecting CPU_HAS_FPU.
Change-Id: Iddae9c547df6e010562649eb0997dc61563c8fc4
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
The comment refers to STM32F1 instead of STM32F4.
Change-Id: Ide116b712146f87a6f4d2aaafea8bd181c4d9397
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
The current implementation of stm32_gpio_set() uses the GPIO output data
register to change the state of individual GPIOs. The generated
assembler needs at least 3 instructions: load / modify / store.
This opens a small race window, for example if a thread and an
interrupt both try to change the state of the same GPIO bank.
Use the GPIO bit set/reset register to perform the atomic change without
locking.
This also has the benefit of a more optimised implementation, which can
be useful for GPIO-intensive work. Compare the new version:
08000c98 <stm32_gpio_set>:
8000c98: f001 010f and.w r1, r1, #15
8000c9c: 2301 movs r3, #1
8000c9e: b902 cbnz r2, 8000ca2 <stm32_gpio_set+0xa>
8000ca0: 3110 adds r1, #16
8000ca2: 408b lsls r3, r1
8000ca4: 6183 str r3, [r0, #24]
8000ca6: 2000 movs r0, #0
8000ca8: 4770 bx lr
and the old one:
08000c98 <stm32_gpio_set>:
8000c98: 2301 movs r3, #1
8000c9a: f001 010f and.w r1, r1, #15
8000c9e: fa03 f101 lsl.w r1, r3, r1
8000ca2: 6943 ldr r3, [r0, #20]
8000ca4: b10a cbz r2, 8000caa <stm32_gpio_set+0x12>
8000ca6: 4319 orrs r1, r3
8000ca8: e001 b.n 8000cae <stm32_gpio_set+0x16>
8000caa: ea23 0101 bic.w r1, r3, r1
8000cae: 6141 str r1, [r0, #20]
8000cb0: 2000 movs r0, #0
8000cb2: 4770 bx lr
Change-Id: Ie5800d1c345016028d1b9a099f5d74cac35f592a
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
When enabling CONFIG_FP_SHARING on ARM, 64 extra bytes are necessary
on the stack of each task in order to save FPU registers S16 to S31.
In the case of the idle stack, the default value of 256 bytes is too
small. As described in ZEP-1470, when the idle task is scheduled out,
floating point registers are saved, which corrupts the stack frame
(especially the saved PC value). When scheduling the idle task, the
restored PC will jump to nowhere, leading to a Usage Fault.
Increase the size of the idle stack by 64 bytes to fix this issue.
JIRA: ZEP-1470
Change-Id: Ib800cd51e5189dda8bf59332db661c21399db3e3
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Since all interrupts come in on the status line,
we only connect it for the KL2X.
Change-Id: Ia9e0d483fe68464a0eeab08c95a043260e5793b0
Signed-off-by: Gustavo Denardin <gustavo.denardin@gmail.com>
Clear pending IRQ when starting and restore back the RTC1 state when
disabling sys_clock, to avoid issues when soft rebooting the device or
chainloading another Zephyr image (e.g. mcuboot).
Change-Id: I693d9168196ad2cfb8475ecfa2051eac043b1fbd
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
In prep for supporting the older KL2x SoCs that use a different SPI
block, rename the current SPI driver to DSPI to match what the MCUX HAL
defines it as.
Change-Id: I9097580df5fca649ab6fd9a38212fced0b1ea6ed
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch adds the necessary changes to enable use of DTS for
generating required build information.
Change-Id: I0d7aa15488339a425ffe57b6354992851212f7f3
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
This patch adds the base DTS files required to support DTS for the
STM32F103xB based Olimexino STM32 board.
Origin: Original
Change-Id: I2a20d3f3ce8b1d3c20fe92b2ffa584c69fbd96a5
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
The previous file contained erroneous values of the number of IRQs
in these socs.
Change-Id: Ie7d2c19d86e247599f4924b95d9330175140d894
Signed-off-by: Gustavo Denardin <gustavo.denardin@gmail.com>
The ECC DSA test case was updated in TinyCrypt 0.2.6.
Fix the length of the random vector.
Change-Id: I7545a51c6855959afdefe00a1e0b53e5c3001a7c
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
The ECC DH test case was updated in TinyCrypt 0.2.6.
This patch adds two helper arrays for the Monte Carlo routine.
Change-Id: If28292512b351feffc3fe470942cd97b18851a57
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
This adds a test suite for the JSON library, testing both encoding and
decoding of all supported data types, including arrays, nested objects,
and basic types such as booleans, numbers, and strings.
Jira: ZEP-1607
Change-Id: I4f6ad7e2859a142e06d405e0760e91751e01a31f
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Boolean values were being decoded using the descriptor type rather than
the value type.
Jira: ZEP-1607
Change-Id: I0c9324ee705af973ccf738e92785820c3a5fb692
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
The function to ignore spaces was not being called, so some tokens had
whitespace in the beginning. They were correctly lexed, but parsing
could eventually fail.
Jira: ZEP-1607
Change-Id: I796596143895fa0fa652641f56af9a03e7a65b7a
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Comparing *endptr with '\0' will always be true before replacing
*token->end with prev_end.
Jira: ZEP-1607
Change-Id: I224129586e15380d3919bfba3db4fcf38c28cb07
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
It has been suggested in a review to use a simple function with a
switch statement instead of the table trick.
Jira: ZEP-1607
Change-Id: I5290de175021bfa8642334548ece8266d4c137f0
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Roll the loop in an accept_run() function and use it to match "rue" and
"alse" depending on the first character of the token. Use that to lex
"ull" after finding "n" as well. This reduces the code slightly.
Jira: ZEP-1607
Change-Id: Iec8ff6ae2fb79e7fe65d476d1574c5943d23e14f
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Serializing an object in JSON is quite tricky to do by hand, and with
an array of descriptor structs, there's enough information to do that
programatically.
The encoder takes a callback function, so that one can be written to
write bytes to, for instance, a struct net_buf. This way, there's no
guesswork to determine the buffer size, reducing the possibility of
overflowing the stack.
Jira: ZEP-1607
Change-Id: I5ccf1012e46c1db32fcfdf2ecee4a1ef44c927d5
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Parse arrays and nested objects.
Array parsing is limited to items of the same type, and requires an array
with fixed number of elements. Elements can be of any type supported by
the parser, including arrays and objects.
The return value of json_obj_parse() won't be that helpful: the nth bit
will only be set if the object has been fully decoded.
Jira: ZEP-1607
Change-Id: I472e402ae3f36a1bd1505decc0313f74cbfa2e07
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Add more installation details for building zephyr on Windows
including what to do with the ISSM tar.gz file that's
downloaded, proxy settings if behind a firewall, adding tar
to the dependencies (needed to extract the ISSM tar.gz file),
linking to the downloads page for the ARM toolchain, and
fixing command lines to correctly use `make BOARD=`. Verified
instructions work on a Windows 10 system.
Change-Id: I04e5f8e46df7630868568b90388dc65bb9baa4c9
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
