Updates the fxos8700 sample documentation to include board
cross-references and sample output with temperature data.
Change-Id: I8d4e4d8d287806f5480316da09d4072fcf9c05ac
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a fxas21002 sample application that uses the sensor data ready
trigger to periodically print gyroscope data.
Jira: ZEP-1392
Change-Id: Ic9d3803a41f2873aef470a2a73b3f1db44d39b50
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds sensor driver support for the NXP FXAS21002 3-axis gyroscope.
Includes statically configurable range and output data rate, as well as
the sensor data ready trigger.
Datasheet:
http://www.nxp.com/assets/documents/data/en/data-sheets/FXAS21002.pdf
Jira: ZEP-1392
Change-Id: I84587c4d5e76863245e9d045c6abb10b21b2615a
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This patch updates the ARM core to use struct k_thread instead of struct
tcs. Struct tcs has been deprecated with Zephyr 1.6.
Change-Id: I1219add0bbcca4b963ffe02cd4519eca355c7719
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Each controller contains a number of streams. Subsequently each
stream contains a number of channels. Channels are selectable
via the stream's control register.
Change-Id: Ib75d1377cb8fc38f27e4566b275343b2ffb8da65
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Commit c0bd8a0ce4 ("api: dma: dma api update") introduced some new APIs
and deprecated the old ones. Let's move to the new API before the old
calls are completely removed.
Change-Id: I21795fa20124f8101c56b0fceb0f0d9afd96b0f0
Signed-off-by: Lee Jones <lee.jones@linaro.org>
File include/misc/sys_log.h has been moved to include/logging/sys_log.h.
Change-Id: I011ca632396b574ae7e388b47fc2ba3a58fafc7b
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Most controllers (including the QMSI driver currently supported in
Zephyr) use generic register values when configuration 'width' and
'burst'. Thus, let's provide a generic look-up to save every
controller requiring their own one. This should reduce the chance
of needless code duplication.
Change-Id: I49d749775bbf23f4bdcce4fa39685681fdcf6e1e
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Providing a new line, then an attribute on the same line as the
following closing bracket is odd. Move to something more
transitional and in line with regular coding standards.
Change-Id: I08f7cd76ca2f522a8b5b6de2e5baf94e95b5195a
Signed-off-by: Lee Jones <lee.jones@linaro.org>
It is possible to evaluate the TXE bit *before* H/W has had the
opportunity to detect that data is being processed. Therefore
we should hold off on any evaluation until TXE has initially been
set.
Change-Id: Iff26bfbe3ab419734003bf81a4cb357de83908e7
Signed-off-by: Lee Jones <lee.jones@linaro.org>
First step to removing legacy APIs, this will be a wakeup call for this
still using legacy APIs before we completely remove them.
Change-Id: I32db62ff73efaa7eb5ab9ebc4d4fdc4a7c34ae56
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
re-add sample that was dropped by mistake and add a top level Makefile
for building and flashing two cores.
Change-Id: Ie22ac1efa7b5373999997489a2c866de19553128
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Currently only 1 is allowed. While we're at it, let's generify the
existing entries, since they could be used by all controllers, not
just QMSI.
Change-Id: Iec5d195fff239931b21a7584eb4b642b40f95be5
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Fix an issue where declaring a device in order to use DEVICE_GET macro
resulted in error: 'static declaration follows non-static declaration'.
Change-Id: I3e851e4d34e905601672e60ded50ed888c4d2a3c
Signed-off-by: Michał Kruszewski <mkru@protonmail.com>
We were missing the cell name in how we create the IRQ define. This was
working fine because the only name we had been using with IRQ which we
would shorten down.
Change-Id: I8449c8ced1a9284982d3d5b07c6acdcf26e965e2
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now both flashing over DFU and JTAG are supported, however JTAG needs a
special connection, so DFU is the current out of the box supported
method for flashing.
Jira: ZEP-1785
Change-Id: I47ffce3b332b99ef6c6afdce2214709a4fa5b946
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This patch fixes an issue where any make target executing the the clean
from the root source directory would remove the dts directory. This is
not necessary and can cause build issues on following make commands.
ZEP-1968
Change-Id: I2cc751d8fd24bd77e425860686b66644ade44eeb
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Currently the entries for STM32 UART ports are at the same level than
the top menuconfig UART_STM32. As a result they are mixed with other
configs in the "Serial Drivers" menu.
Use if/endif grammar to put these entries under a dedicated STM32
submenu.
Change-Id: If28945204b801578d29f8cce7c2370ca3c2737a1
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Add support for GPIO banks I to K that can be found on some high-density
STM32F4 products.
Change-Id: I2cb65ed4d4a2282f7d17478cb1fcdd65dffe71b0
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
The registration of each GPIO bank differs by only few details. These
differences can be factorized in order to create a generic registration
macro.
This has several advantages:
- Less code
- Easier to add new banks
- Less work to add support for new STM32 families
The diff stat speaks for it-self: 26 insertions(+), 92 deletions(-)
Change-Id: I674752fda5ee3caefb815ccf070a1b636b16cf85
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Add several missing clocks that are used by other members of the STM32F4
family. This is needed to add support for various hardware, like UART9
and UART10 on STM32F413.
Change-Id: I6f1a04ddece90a04e31a1710065545179b0e530d
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
It appears that enable bits for BKPSRAM and CCMDATARAM are incorrectly
defined as bit 14 and 16 on AHB1 respectively (when these IPs are present),
where we should use bit 18 and 20 according to the various reference
manuals (STM32F415 for instance).
Change-Id: I44ce59a29c57e306f6a945e46043efbcfce7a92f
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
The PLLN multiplier can range between 50 and 432 on all STM32F4, except
on the STM32F401 where the lower bound is restricted to 192.
Fix the range property and the help text to reflect this reality.
Change-Id: I7b93e84b321f7869aaf611287344cd3e25c893c8
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
The Cortex-M4 of the STM32F4 family has an FPU. Enable the FPU support
by selecting CPU_HAS_FPU.
Change-Id: Iddae9c547df6e010562649eb0997dc61563c8fc4
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
The comment refers to STM32F1 instead of STM32F4.
Change-Id: Ide116b712146f87a6f4d2aaafea8bd181c4d9397
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
The current implementation of stm32_gpio_set() uses the GPIO output data
register to change the state of individual GPIOs. The generated
assembler needs at least 3 instructions: load / modify / store.
This opens a small race window, for example if a thread and an
interrupt both try to change the state of the same GPIO bank.
Use the GPIO bit set/reset register to perform the atomic change without
locking.
This also has the benefit of a more optimised implementation, which can
be useful for GPIO-intensive work. Compare the new version:
08000c98 <stm32_gpio_set>:
8000c98: f001 010f and.w r1, r1, #15
8000c9c: 2301 movs r3, #1
8000c9e: b902 cbnz r2, 8000ca2 <stm32_gpio_set+0xa>
8000ca0: 3110 adds r1, #16
8000ca2: 408b lsls r3, r1
8000ca4: 6183 str r3, [r0, #24]
8000ca6: 2000 movs r0, #0
8000ca8: 4770 bx lr
and the old one:
08000c98 <stm32_gpio_set>:
8000c98: 2301 movs r3, #1
8000c9a: f001 010f and.w r1, r1, #15
8000c9e: fa03 f101 lsl.w r1, r3, r1
8000ca2: 6943 ldr r3, [r0, #20]
8000ca4: b10a cbz r2, 8000caa <stm32_gpio_set+0x12>
8000ca6: 4319 orrs r1, r3
8000ca8: e001 b.n 8000cae <stm32_gpio_set+0x16>
8000caa: ea23 0101 bic.w r1, r3, r1
8000cae: 6141 str r1, [r0, #20]
8000cb0: 2000 movs r0, #0
8000cb2: 4770 bx lr
Change-Id: Ie5800d1c345016028d1b9a099f5d74cac35f592a
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
When enabling CONFIG_FP_SHARING on ARM, 64 extra bytes are necessary
on the stack of each task in order to save FPU registers S16 to S31.
In the case of the idle stack, the default value of 256 bytes is too
small. As described in ZEP-1470, when the idle task is scheduled out,
floating point registers are saved, which corrupts the stack frame
(especially the saved PC value). When scheduling the idle task, the
restored PC will jump to nowhere, leading to a Usage Fault.
Increase the size of the idle stack by 64 bytes to fix this issue.
JIRA: ZEP-1470
Change-Id: Ib800cd51e5189dda8bf59332db661c21399db3e3
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Since all interrupts come in on the status line,
we only connect it for the KL2X.
Change-Id: Ia9e0d483fe68464a0eeab08c95a043260e5793b0
Signed-off-by: Gustavo Denardin <gustavo.denardin@gmail.com>
