The Sam4x HAL defines __NVIC_PRIO_BITS to 4. Fixes an issue where
interrupt priorities and masking were not being done correctly.
Issue: ZEP-2243
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
A couple of docs were created in previous PRs with board support
information common to a few boards. Move these to a new section
for "Board Support Tools". (I debated about hiding them completely
but decided it would still be useful to have these tool docs appear
in the table of contents, just not embedded with the supported boards
docs.)
Moved these board tools docs over to the doc/ folder and out of
boards/ and removed these pages from the navigation index.
JIRA: ZEP-2285
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Add general release information to the release-notes index page
(currently just a set of links to the release-specific pages).
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Update driver to use DTS-generated #defines for port names,
and not obsolete Kconfig variables.
Signed-off-by: Geoffrey Le Gourriérec <geoffrey.legourrierec@smile.fr>
L4 write access requires 64 bits alignment
while L4 read access does not require any alignment.
To support specific check according to read/write,erase
a parameter is added to stm32_valid_range.
Signed-off-by: Michel Jaouen <michel.jaouen@st.com>
L4 have 64 bits write access.
The cast to 64 bits data address in write_dword
requires 3 right shifts on i (byte index) else the
data taken are wrong for i different from 0
Signed-off-by: Michel Jaouen <michel.jaouen@st.com>
We always have UART_IRQ_FLAGS set to 0, so just call IRQ_CONNECT with a
0 argument for the flags, and remove the UART_IRQ_FLAGS. This is
towards support for using the driver on the TI CC2650. (we add a
comment about that as well).
Signed-off-by: Geoffrey Le Gourriérec <geoffrey.legourrierec@smile.fr>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The porting of the TI CC2650 SoC introduces the need to
write a specific configuration area (CCFG) at the end of the
flash. It is read by the bootloader ROM of the SoC.
For now, this is a quick hack and not a generic solution;
similar needs may arise with other hardware.
Signed-off-by: Geoffrey Le Gourriérec <geoffrey.legourrierec@smile.fr>
Clearing fields in the region descriptor attributes doesn't always have
the expected effect of revoking permissions. In the case of bus master
supervisor mode fields (MxSM), setting to zero actually enables read,
write, and execute access.
When we reworked handling of region descriptor 0, we inadvertently
enabled execution from RAM by clearing the MxSM fields and enabling the
descriptor. This caused samples/mpu_test run to throw a usage fault
instead of an MPU-triggered bus fault.
Fix this by setting all the MxSM fields to 2'b11, which gives supervisor
mode the same access as user mode.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
We need to make sure that __NVIC_PRIO_BITS & CONFIG_NUM_IRQ_PRIO_BITS
are set to the same value. Add a simple build time check to ensure
this is the case. This is to catch future cases of issues like
ZEP-2243. This is a stop gap til we resolve ZEP-2262, which covers use
of both __NVIC_PRIO_BITS & CONFIG_NUM_IRQ_PRIO_BITS.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
