This driver allows multiple drivers to share a common interrupt
line. This functionality is required on system that conform to the PC
interrupt structure. In the context of Zephyr this is needed for
SOC's that have their I/O IP blocks behind a PCI interface. Due to the
limited number of interrupt lines provided by the PCI interface
multiple IP blocks may be configured to share an interrupt line.
Drivers that share interrupts must be modified to *not* register their
own interrupt service routine as part of their configuration/initialization
but instead bind to the correct instance of this driver by name, then
register their interrupt service routine with this driver.
Change-Id: I57b517b97ebeabce484ba53c8f940da993cb391d
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Corrected minor grammar issues related to platform config description
Change-Id: I6960366ae088957dbff588adabc01adb15385066
Signed-off-by: Gerardo A. Aceves <gerardo.aceves@intel.com>
The first 32 entries are for well-known exceptions
Change-Id: I3342c48af6e7f687065fafd0c2af4dabc04d421e
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Revises microkernel initialization code by incorporating the existing
_k_kernel_init() and main() routines into _main(). This optimizes kernel
initialization a bit, and allows application code to use main()
if desired -- for example, as the entry point to an application task.
The change also eliminates the need for sysgen to generate a routine
whose content is always the same.
This change preserves the existing order of operations done during
kernel initialization, and leaves further improvements for later.
Change-Id: Ie03d8a6f38f8a311f398667ed977fd8478719d70
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
The polling I2C write function guarantees the write operation
is completed. It is to make sure each write has been commited.
Change-Id: I37cd3b8a65c605837b1fae3ccd1c2b0235c07a37
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The polling I2C write function guarantees the write operation
is completed. Given that the initialization routine goes through
I2C write consecutively, we want to make sure each write
has been committed.
Also adds code to configure the I2C controller before transfer.
Change-Id: I2c8888e940edd1cb9fb01f03234a731ac991dfcf
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This implementation will wait to write, and wait for transfer
to complete before returning from the function. Currently has
a default timeout of 100ms to prevent being stuck in the loop
waiting for hardware to be ready.
Change-Id: I0340fc6fed100f1d31c0306c5b0ab09689364f63
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
There are instances where interrupts cannot be used for I2C transfer.
So add an API to do trasnfer in polling manner.
Change-Id: Ic030ef9469542aae9975aa7da55c578a2a6c5c93
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The GPIO ports on the legacy bridge have to be access by
I/O port read/write, instead of direct memory access.
Choices in Kconfig cannot have default values in Kconfig,
so it has to be done in defconfig instead.
Change-Id: I479f3776edf5690f73d8e857ce6683285db092c0
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add I/O port access to MMIO-based GPIO driver, in addition to
the existing direct memory access. This extends the driver,
so that it can address the registers through I/O read/write.
Change-Id: I53c74ad76472ac043764e33bfbb77a2bedc427fe
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The interrupt selectionss are no longer specific to a particular
controller (e.g. I2C_DW_0), but apply to all controllers on
the platform.
[DL: Extracted these changes into their own patch, instead of
being squashed with others. Also modified the Kconfig
options to move them into proper position.]
Change-Id: Idc7ac9769e947447b868dccf772a95dbb5fc8021
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
This adds the default config option to enable the I2C controller,
for both nanokernel and microkernel.
Note that choices in Kconfig cannot have default values in Kconfig,
so it has to be done in defconfig instead.
Change-Id: I2ac0c880629db68e5b9a6bf61e49939ab7418a89
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add a Kconfig option to enable NANO_TIMERS for PCAL9535A.
Without enabling nano timers, compilation may fail.
Change-Id: If96358a17b9522f9323f3480b4716c3dfd82a3de
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The I2C controller should have been already setup before this driver.
Since the only use right now is on Gelileo and I2C_DW driver. it is
safe to remove the i2c_configure() call now as the driver has default
configuration at boot.
Change-Id: Ia384e28871bf76dcfec899860f93da4bf0948ba6
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds the Kconfig option to specify default configuration
for the I2C controller during driver initialization.
During boot, the controller needs to be configured before
communication to slave devices can start. After boot,
an app can re-configure the controller if needed.
Change-Id: I7bf252f75a31943ae444e4d914f3a9a1a3f3d91f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Adds the correct use of Doxygen grouping
for in-code documentation.
Change-Id: I25d2e9259e27808da8a032f91dfeff4711bc1f4b
Signed-off-by: Gerardo A. Aceves <gerardo.aceves@intel.com>
Change BOOTLOADER_UNKNOWN to be a top level option the depends on
X86_32.
Change-Id: I1a92324038b53234730cc7324f43413f8ac18827
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Remove the hard dependencies on EXPERIMENTAL symbol. Mark all the
symbols the relied on EXPERIMENTAL as EXPERIMENTAL in their prompt
Change-Id: I2779b0ed0776b3d510a8e2e44b35b83d7ad2377c
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Begining of interrupt (BOI) is only supported on systems with a 8259
interrupt controller all modern x86 systems use APIC interrupt
controller.
Change-Id: Ife2b3b1971bbebeda597bfa1f96005f79cd7e959
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Zephyr requires that the processor be in 32 bit protected mode on
entry.
Change-Id: I71792eeb154281881e8516a7a8a2291a52f83fc6
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Cleanup help text to remove references to non-existant features
Change-Id: I360cdf3de4d6132f1ffdde627004b730b3392299
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
BOOT_A20_ENABLE relies on the kernel being on a system that has a full
PC BIOS and requires that the A20 line be enabled to boot
correctly. None of the supported platforms satisfy either requirment.
Change-Id: I05805a050f5531de0348b60a4f0cb974e464b279
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
This avoids the case where the system has multiple threads using
floating point and the threads were not properly configured to use
floating point. The misconfigured threads will only take the fault on
first use of a floating point instruction.
Change-Id: I2be9f9f145bc4e7659e07154021ccc237774897b
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Allow the user to see the configure option without relying on
FP_SHARING being set.
Change-Id: I7e802c18a1c1087f7672925b18ae32dcc20787da
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
The default for x86 floating point support in Zephyr is *no* this
option is redundant and more that a little confusing.
Change-Id: I41fad33467321c483a4df028230ecbb28b4486f9
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
SSE instructions are controlled by the FLOAT and SSE config variables
this option is redundant
Change-Id: Iab43d21315655a00daeac24994ee29a8e1c70207
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
This option is no longer used in any configuration
Change-Id: I2f9be9f286cff3f38722ae1fe807661a1f99cdcd
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
The projects depend on the options enabled by ENHANCED_SECURITY select
required options explicitly. Forcing selection based on
ENHANCED_SECURITY is redundant.
Change-Id: I4473996355e67c99be91413b55d7c6685d9263b2
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
The default for all architectures for ENHANCED_SECURITY is 'no' now
remove redundant config option.
Change-Id: Ib49b0bc7ea02aa2214fe45194393def8e021be01
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
The default for all architecures for ENHANCED_SECURITY is no remove
redundant config from arm project configs
Change-Id: I3915da20e0ee8298d69865ad5b07f9d5c6d59200
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
The default for all architecures for ENHANCED_SECURITY is no remove
redundant config from arc project configs
Change-Id: I14257a9f111790d506b106ef184e859b595cd009
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
ENHANCED_SECURITY is being used to enable security options the
projects that require security options explicitly enable these options
the dependency is not required.
Change-Id: Iec96e32bd7a5faa78672d355aad368f48b0ee087
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Change the default for ENHANCED_SECURITY to no in preparation for the
option to be removed.
Change-Id: Ic46730b187f361226064a3e205f48433b0bebdd7
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
All supported platforms have descending stack (growth direction is
down). To avoid confusion just remove not needed stack direction
defines.
If new platform with stack direction up is added is should be
configured by adding Kconfig option eg STACK_GROWS_UP and
CONFIG_STACK_GROWS_UP should be used in code that depends on
stack growth direction.
Change-Id: I786ff1ab28d8f8bad3f6d1bbe64defc0e81d1707
Signed-off-by: Szymon Janc <ext.szymon.janc@tieto.com>
The inconsistent and extended use of |codename| and |project| has been
corrected.
A sentence had to be changed dramatically to keep clarity.
Change-Id: I1e18a8c40298a46af002ddb226bb16ea0b508414
Signed-off-by: Rodrigo Caballero <rodrigo.caballero.abraham@intel.com>
There has been some confusion around the usage model of the init
system. Add a comment block to hopefully limit the confusion. This
should not be construed to replace the documentation that has yet to
be written for the init subsystem.
Change-Id: I4df67f056b29b88ce6f0b8c2376deaf022cb8d84
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
There are devices that need are part of the architecture core the need
to be initialized prior to devices that are integrated around a core
to make up a complete SOC. Namely the interrupt controller in the SOC
must be configured in order to allow the integrated IP blocks drivers
to initialize correctly.
Change-Id: I0a91e08f98516a7b7dd402ffc6494a071f1326b2
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
This macro is legacy from an early implementation of the init system
before the pure level was split into early and late phases remove it
now to avoid confusion going forward.
Change-Id: I6720874c840c9e14888fd6f411a8182e7420ca29
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Updated the SDK location in quick start documentation to the new Zephyr SDK 0.6
hosted in 01.org.
Change-Id: I8a362a27076b81fc867756497fc2cae5b360f4c5
Signed-off-by: Javier B Perez Hernandez <javier.b.perez.hernandez@linux.intel.com>
