This demonstrates the ADC driver added in the previous commit. The
sample reads A0 as well as two built-in channels - one that reports
the internal 1.2 reference volatage and one that reports half the
analog supply voltage.
Signed-off-by: Michael Hope <michaelh@juju.nz>
The CH32V003 has a 8 channel, 10 bit onboard ADC. Add an immediate
mode driver and the appropriate pinctrl bindings. Note that the
CH32V003 GPIO pins have both a floating input and an analogue input
mode, and the pinctrl is needed to put the pin in analogue mode.
Signed-off-by: Michael Hope <michaelh@juju.nz>
Remove redundant register updates in pinctrl_configure_pins, and replace
the improper (and inefficient) use of bitwise OR assignment (|=) with
direct assignments when writing to the write-only BSHR registers
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Create and select the proper module device tree file which loads the
correct radio config for the MGM240P module.
Signed-off-by: Tamas Jozsi <tamas.jozsi@silabs.com>
Add device tree and support files for the Nano Matter board
based on the Silicon Labs MGM240SD22VNA chip.
Signed-off-by: Tamas Jozsi <tamas.jozsi@silabs.com>
Enable connecting native sim to a physical board running hci_uart
without usage of Bumble or other intermediary steps, but rather using
common h4 hardware driver.
Most commonly used port is USB CDC-ACM, as by default for most nRF
boards.
Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
In some cases UART drivers might have too high init priorities
so HCI must be initialized even later if used with those.
One example is zephyr,native-tty-uart.
Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
Ensure that the various configuration and conversion tables are marked
as const to save on RAM usage.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Align code with the comment :) There apparently was a copy-paste issue
from the clock_control_on code.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Include rpi_pico.overlay from the rpi_pico_rp2040_w.overlay in order to
have `pico/rp2040/w` board to work out of the box.
Signed-off-by: John Lin <john.lin@beechwoods.com>
Prevent out-of-bounds access in nxp_pint_pin_enable by fixing the
comparison to use >= instead of >.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
This enables the clock_control driver build on bl60x.
It is currently deferred init, due to being incompatible
with current SDK-based boot, to avoid later giant PR.
Signed-off-by: Camille BAUD <mail@massdriver.space>
The current CMakeLists.txt uses hardcoded flash addresses for the
bootloader and application, which may not match the slot defined
in the DTS file. This can lead to inconsistencies when flashing
and running images.
This update introduces support for using CONFIG_FLASH_LOAD_OFFSET
and applies CONFIG_BUILD_OUTPUT_ADJUST_LMA if specified,
ensuring that the final image address aligns with the DTS
and runtime expectations.
Note: For ESP32-C6, a custom workaround is included since the
LPCORE does not support MCUboot images.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Updated buffer length variables to be size_t as they need to be able to
represent the maximum buffer size which is 4092.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Add several more luma-only formats also known as grayscale, of variable
bit depth, 0-padded to fit 16-bits per pixel: Y10, Y12, Y14, Y16
Signed-off-by: Josuah Demangeon <me@josuah.net>
This is an X86 specific option and should not appear as generic debug
option.
Fixeszephyrproject-rtos/zephyr#52929
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Introduce an index field to the video buffer structure to help track
individual buffers throughout the workflow.
This is particularly useful in scenarios where buffers are wrapped
in a pool, such as in GStreamer. The index allows efficient
identification of the currently dequeued buffer without needing to
iterate through the entire pool and compare buffer addresses.
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
Document the change of semantics of video_format.pitch field,
modified in commit 33dcbe37cfd3593e8c6e9cfd218dd31fdd533598.
Signed-off-by: Josuah Demangeon <me@josuah.net>
In case of the st,stm32-ospi-nor compatible
new property and node definitions will requires new macro
to get the external NOR flash base address and size
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This change defines the "st,stm32-ospi-nor" compatible Node
in conformance to the DTS specifications
Includes the size property (in Bits) of the external memory device
Signed-off-by: Francois Ramu <francois.ramu@st.com>
New property of the st,stm32-ospi-nor compatible gives
the external NOR flash in bits.
The property of the st,stm32-ospi compatible gives
the external NOR flash base address
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The st,stm32-ospi compatible is defining the reg property
with the register address and size at first index
followed by the external mem base address and max allocated size.
For the stm32H7, stm32L4plus, stm32L5, stm32U5 series.
ospi1 is addressing max 256 MBytes from 0x90000000
ospi2 is addressing max 256 MBytes from 0x70000000
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Update the description of the bindings to match the
xspi-nor-flash node properties: size in expressed in Bits
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Adds support for checking modules for disallow Kconfig's in boards
and SoCs, which have been defined in a Zephyr module file
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
On windows the Magic.from_file method fails to convert a PathLike to its
representation.
Pass using os.fspath.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Main changes since v2.6:
* ext_2G4_phy_v1: Runtime performance optimizations
* ext_2G4_libPhyComv1: Add BT LE HDT support
* ext_2G4_channel_Indoorv1: Add BT LE HDT support
Note: Like before, bsim remains fully backwards compatible
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Update the HW models module to:
968d55ff22579080466bf2f482596dd6e35361c6
Including the following:
968d55f 54LM20: Also build CRACEN RNG
2c6d49d CRACEN RNG: Add model of the new version of the IP
914b475 54LM20: Add first version
fb68cc6 grtc hal replacement: Remove pointless macro use
ef2f63e Fix wrong NRF_UARTE register reference
63a2e85 README: Clarify the models are not perfect, and correct links
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Current code would have systematically tried to add the FS_O_CREATE flag
when opening a file in read mode. This effectively made it impossible to
open files to read them on read-only file systems.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Replace the slew-rate based method of delaying signals with a more
appropriate I/O delay. Also update the comment to better describe
what we are now doing.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Modify the STM32 pinctrl driver and SoC-specific pinctrl macros
to introduce support of the st,stm32n6-pinctrl variant.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Use the new and appropriate "st,stm32n6-pinctrl" compatible for the pinctrl
in DTSI for STM32N6 series.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Add a new binding for the pinctrl controller of STM32N6 series.
The specificity of this series is the "I/O retime" feature not present on
other series. This new binding exposes pinctrl properties to configure this
feature.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Fix typo in errno which isn't caught when building since ENONET
is also a valid code, despite not being defined (nor allowed?)
in Zephyr proper.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
SphinxLint doesn't need to report trailing whitespace errors as it's
already checked by checkpatch.pl.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
