Commit graph

4 commits

Author SHA1 Message Date
Daniel Leung f7a42a70f8 gpio: intel_apl: rework driver for pin_mask callback
To avoid confusion, callbacks using ordinal pin numbers
is going to be reverted. So the driver has to be re-worked
to expose multiple devices so each device has 32 pins.

Also fixes #12765

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-06 07:18:15 -05:00
Kumar Gala f210d11970 boards: Remove including soc.h in board.h
We should let drivers or board code include soc.h directly so we can keep
board.h to local info for board specific code.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-14 06:44:02 -06:00
Daniel Leung d328a4fede boards/x86: up_squared: add GPIO dts configuration
This adds the necessary dts entires to enable GPIO controller
on the UP Squared board.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-09-19 21:36:16 -04:00
Daniel Leung 04d1a38b45 boards: x86: add support for UP Squared (Pentium/Celeron)
This adds a primitive board configuration for the UP Squared board
containing Apollo Lake based Pentinum and Celeron SoC. This has
been tested on model UPS-APLP4-A10-0432.

This starts from the minnowboard configuration, and document
from galileo.

Origin: Original

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-07-17 16:27:52 -04:00