Use the new pin and interrupt configuration API.
NOTE: Because hardware is not available this has been build-tested
only.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the new pin and interrupt configuration API.
NOTE: Because hardware is not available this has been build-tested
only.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update devicetree sources and bindings, switch to new GPIO API. Use
devicetree property name to identify interrupt signal.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Convert to the new API, using raw access since there is no Device-Tree
definitions for this particular sample.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Conver to the new GPIO API, using raw access since there is no DT
definitions for this particular usage of the pins.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Use the new pin and interrupt configuration API. Update all
devicetree bindings to add INT signal active level. Document active
level.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update sample overlays. Add GPIO flags to configuration state.
Refactor to split out setup/handle/process phases. Switch to new API
replacing callback dis/enable with interrupt dis/enable.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the GPIO_ACTIVE_LOW to signal that the button pins are active low,
instead of the deprecated GPIO_INT_ACTIVE_LOW.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Converts the sdhc spi driver to the new gpio api. Updates device trees
for the olimexino_stm32 and nrf52840_blip boards to set appropriate
active high/low polarity for the spi chip select pin.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add the common config structure as a prefix of the driver-specific
config structure. This driver uses fixups to define a common name
based on the SOC series; until aliases for the new properties are
added the code assumes all pins are supported.
Since pin ordinal validation is now done directly in gpio API,
remove checks inside the driver itself.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the mask parameter to initialize it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the hard-coded device-specific pin count to
initialize it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The offset and the number of pins were swapped causing an error when a
64-position left shift was generated to calculate the pin mask.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it. Not all aliases appear to be present, but using instances breaks
because the ports used by different boards do not always start with
the first.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure. The devicetree binding does not inherit from
gpio-controller, so the required property is not available there. A
hard-coded value of 32 pins has been implemented to make the driver
function.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure. This driver uses fixups to define a common name
based on the SOC; until aliases for the new properties are added the
code assumes all pins are supported.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add a config structure for each port and use the devicetree GPIO pin
count to initialize it. Simplify device initialization by using
instance number as only variation point.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Replace the common data structure with the common config structure as
a prefix of the driver-specific config structure and use the
devicetree GPIO pin counts to initialize it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Extend the driver data structure with a field that identifies the pins
supported by the device. Document the fields and who is responsible
for maintaining them.
Update all configuration functions for specific pins to return an
error if the pin is not supported.
Update all set/get functions for specific pins to assert if the pin is
not supported.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Almost all drivers support 32 pins, though some support less.
Eventually this should be specified in every SOC binding, but until
then provide a default so GPIO drivers can be updated to use this.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Several declarations provided a const pointer to mutable data. Change
all declarations that are not used to change the invert field to be
pointers to const data.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
