Rename them to SYSTEM_CLOCK_DISABLE and sys_clock_disable to put
the symbols in the proper namespace and to align with the rest of
the timer APIs.
Change-Id: I341cdb1bd6cc01e5662d8526c293d4e0acd6ec24
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
This test can only be executed on x86.
Change-Id: I4fe60dbee9dcb11f983855b507f53c2b9fbb54d0
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Introduces the following routines to provide safe access to memory:
_mem_probe()
_mem_safe_read()
_mem_safe_write()
_mem_safe_write_to_text_section()
Those routines will return an error if the memory is not accessible rather
than potentially crash.
This implementation is based on the image's boundaries; thus it allows
read/write access to the data/bss/init sections and read access only to
the text/rodata sections. All other memory is considered invalid, even
if addressable. This includes the leftover from the RAM at the end of
the image, since there is no support for using it (e.g. there is no
dynamic allocator).
Change-Id: I6093688ecfd9b00d61be0fd453ada7bb8915c897
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
CONFIG_RAM_SIZE
CONFIG_ROM_SIZE
Available to x86 based platform configurations.
Change-Id: I3dda770a9063e3c717023b1a83761f32caa2c590
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Adds the following standard symbols to the arc linker scripts:
_image_rom_start
_image_rom_end
_image_ram_start
_image_ram_end
Change-Id: Ib1dfa1dcb85140193557e72536145e74eb3ebb91
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Standardizes on using symbol names _image_text_start and
_image_text_end instead of __text_start and __text_end.
Change-Id: I160ed6b4f117483fcffdfa04ce10bd6a5151704a
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
These symbols have more meaningful names when trying to figure out where
the ROM/RAM starts/ends, rather than relying on e.g. __data_rom_start for
the end of the ROM (__data_rom_start is the beginning of the data in
ROM, thus is not part of the image).
Change-Id: I4aa0354ee414fd0d46d0f40952e091ba090e7bce
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
the iamcu toolchain is based on 5.2.1, update the variable so we
can point to the right path of headers/libraries.
Change-Id: Ia1634efc6fb6a37eb3456d9b7bd3c30e03c40b4e
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
ioapic_mkstub applies only when an IOAPIC is available in the platform.
Change-Id: I40294e4c11ef04739a1ce2146d125f3c5478013d
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
The Kconfig documentation index file is auto-generated. Adding it
to list of files ignored by git so that it isn't added by accident
in the future.
Change-Id: I763a3d3d9382bec843e1e4ddfc198f756bb5cb80
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Eliminates issues with compilers that have different C calling
conventions.
Change-Id: I9318edd5eea6b6bacdf3da2c28e0e29315d5cdf5
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Eliminates issues with compilers that expect different C
calling conventions.
Change-Id: Ic70a15926380671a7b9c058b53400b10b5c870a7
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This doesn't make any assumptions on calling conventions or
the structure of the stack, and should thus be portable to
compilers that implement different C calling conventions.
In order for the rewritten functions to take up the same code
size as the pure-asm counterparts, -fomit-frame-pointer has
been specified for each of them, otherwise an extra 4 bytes
is used for every function.
The generated assembly code by these new functions has been
verified in GDB to be the same as the old ones, except a few
trivial things like particular registers used.
Change-Id: I9a896cbfc3e7f4c2497d749140729d28b32f1c9d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This allows the customary syntax for declaring named arguments,
such as:
asm ("mov %[out],%[in]" : [out] "=r" (x) : [in] "r" (y));
Since :[ is comple-error-inducingly invalid syntax in other cases,
this won't create unintentional leniency for normal uses of [
Originally from https://lkml.org/lkml/2010/11/16/145 by Dave Martin
Change-Id: Iead3fdb147ba2f6cbd108f19dd348bb72a7e6b6f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
sys_io.h documents the functions but does not include the
actual implementation. Make it include nanokernel.h which
would then pick the right arch.h where the sys_io are implemented.
Change-Id: I275d03cfc0d7e14cb603e37211e7a618d53616bd
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This patch updates the ISR initialization code to reflect recent
changes in the underlying Zephyr ISR infrastructure. It also adds
assertions to detect failures to lookup device bindings during
initialization.
Change-Id: I4bf1955da44a97f8c2652b96a390804c5cea73e3
Signed-off-by: Michael LeMay <michael.lemay@intel.com>
Since it is now possible to send both events and semaphores from
a fiber or ISR without having to use a command packet set, there
is no longer any need to reference the command packet include file.
Change-Id: Ibf2d96bc8ef0fd2a3db6f896c7a1201ab9b85bf7
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
The microkernel server now relies on the fact that the command packets,
events, and semaphores passed to it via its command stack are 32 bit
aligned. This change explicitly ensures this alignment, rather than
leaving it to the compiler's discretion.
Change-Id: Ied7a0a0b4cc504c924520b72ef2b207b49470448
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Update semaphore documentation to remove mention of command
packet sets, which no longer exist.
Change-Id: I19303f7f497b7d8299723d01c91ae4f4513162f0
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Revises microkernel semaphore sub-system to allow ISRs and fibers
to give a semaphore without having to define a command packet set.
The microkernel server now supports a 3rd command type on its
command stack, allowing a semaphore to be given in a similar manner
to the one used for the existing "give event" command type.
Change-Id: Ibd7fb1a77949792f72acd20a9ee304d6eabd62f7
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
This was only needed on legacy platforms which are no longer
supported.
Change-Id: I4a3312f3698c4fc8bbf0df4610af7b69a9056f80
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
- ROR interrupt needs to be acked by resetting the bit to 0
- Rx threshold seems buggy on that controller and setting it above 1
generates unreliable transmission as sometimes it does not trigger any
interrupt though the rx fifo is just full.
Change-Id: I4949c1fe7b42c70973efd4e0dafd14c6171f13f6
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This had bit-rotted to the point where it was breaking the build
and was only needed on legacy platforms that are no longer
supported.
Change-Id: I4fcfc38bacac58761fba475701e0c27d7b8b7a27
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
We generally call this in interrupt code, and since it's just a register
write, get rid of all the function call overhead.
Change-Id: I251fa3cee0841fcdd8eecc7941d4d3782d112e66
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This option is not building and currently not supported, removing
it because there does not seem to be a use case for it.
Change-Id: Idb8ffedf83f43cffc68a01573c6f2d1a90fc40fb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This reverts commit 58fd0778c6dcc6bd3148b5d07615cd7bd777f456.
Change-Id: Ibffe036d2e182652b3c966c10ed405c9386f823c
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
We are interested in supporting some XIP x86 platforms which are
unable to fetch CPU instructions from system RAM. This requires
refactoring our dynamic IRQ/exc code which currently synthesizes
assembly language instructions to create IRQ stubs on-the-fly.
Instead, a new approach is taken. Given that the configuration at
build time specifies the number of required stubs, use this
to generate a build time a set of tiny stub functions which simply
push a 'stub id' and then call common dynamic interrupt code.
The handler function and handler argument is saved in a table keyed by
this stub id.
CONFIG_EOI_HANDLER_SUPPORTED removed, the code hasn't been conditionally
compiled for some time and in all cases we call _loapic_eoi() when
finished with an interrupt.
Some other out-of-date verbiage in comments related to supporting
non-APIC removed.
Previously, when dynamic exceptions were created a pointer would
be passed in by the caller reserving ram for the stub code. Since
this is no longer feasible, two new Kconfig options have been added.
CONFIG_NUM_DYNAMIC_EXC_STUBS and CONFIG_NUM_DYNAMIC_EXC_NO_ERR_STUBS
control how many stubs are created for exceptions that push
an error code, and no error code, respectively.
SW Interrupts are no longer triggered by "int <vector>" hard-coded
assembly instructions. Instead this is done by sending a self-directed
inter-processor interrupt from the LOAPIC, using a new API
loapic_int_vect_trigger(). In this way we get rid of dynamically
generated code in irq_test_common.h.
All interrupts call _loapic_eoi() when finished, since this is now
the right thing to do for all IRQs, including SW interrupts.
_irq_handler_set() for x86 no longer requires the old function pointer
to be supplied.
Change-Id: I78993d3d00dd153c9051c518b417cce8d3acee9e
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
use gpio_dw instead of gpio_<function>_dw to be consistent in the
driver itself and with other drivers.
Change-Id: Ifb0e50c230f142197eb4b01c1bb4ce1c16e4753f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Clang support already existed in the Makefiles but was not complete
and some gcc options did not work with clang. Move those to be conditional
on the compiler used to make clang work.
To build with clang for x86:
make CC=clang -C samples/microkernel/apps/hello_world/
You still need the gcc cross environment for various tools.
For now, only x86 was tested.
Change-Id: I1a50c3a82d79ff3001beb4366961ca810eeb6006
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
We now have BIT defined in a header file globally, so lets use it.
Change-Id: Ie7b87478cb5a9e977ec045efa072d28fab86e78b
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit adds asm implementation for the methods:
sys_io_set_bit
sys_io_clear_bit
sys_io_test_bit
sys_io_test_and_set_bit
sys_io_test_and_clear_bit
Change-Id: I144568e113316fa43d943cdc5457cb17e66839c3
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Add the tags required by doxygen for defining the group of the
kernel event logger.
Change-Id: I96ec6b6604da5a541ce8041e6fa3c324a03ff698
Signed-off-by: Yonattan Louise <yonattan.a.louise.mendoza@intel.com>
In order to have a name according to the functionality of the feature.
This commit rename any text, function and variable related with the
Profiler name to Event logger.
Change-Id: I4f612cbc7c37965c35a64f06cc3ce5e3249d90e5
Signed-off-by: Yonattan Louise <yonattan.a.louise.mendoza@intel.com>
Revises microkernel server command stack processing to allow the
server to support more than 2 types of commands. The lowest 2 bits
of the command now indicate the command's type:
0 - process specified command packet
1 - give specified event (from ISR or fiber)
2 - give specified semaphore (from ISR or fiber)
3 - reserved for future use
Note: Support for type 2 will be provided in a future commit.
Change-Id: I9f83f92a301fb5df3dd479b5d43b187371e11ad8
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
The tick event is now generated by calling the standard API for
signalling an event from an ISR. (This allows the tick event
to be generated properly even if the internal implementation of
the event sub-system changes.)
Change-Id: Ia2be3874358acb0ea2b2d2bbefbe4603fe11da8a
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Detect the presence of CLFLUSH instruction and cache line size at
runtime. It is still possible to set them manually via kconfig options
if the values are known.
Change-Id: I00bda1de4c5c241826ead6f43b887b99a963cc7b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
ARC targets now have access to the address types 'paddr_t' and 'vaddr_t'.
Change-Id: I2cccddbdd76771529e4501aaee6cb2a2b640013e
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
ARM targets now have access to the address types 'paddr_t' and 'vaddr_t'.
Change-Id: Ic7225647f3776d4afa853cf2c4a19699b656866a
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
This makes the types 'paddr_t' and 'vaddr_t' available via nanokernel.h.
Change-Id: I75b81356566e2063979f2ec46f326d606638efa2
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Adds an input hook to be used by the interrupt handler uart_console_isr().
This hook permits the console input to detect a character escape sequence
that can be used to override the console's default input behavior.
This input hook can be set using the following API:
void uart_irq_input_hook_set(struct device *dev,
int (*hook)(struct device *, uint8_t));
The hook returns 1 if the handler should stop processing the character,
and 0 if it should not stop.
Change-Id: I95e7da75e07fb6caaca2d45e80bfc4334a43c0ac
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Remove goals that call scripts we do not have or support.
Change-Id: Ic6f1d2b620e20f7355e1dec0a2454239fad8f123
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
CONFIG_GCOV_KERNEL comes from Linux, we do not use this feature
in Zephyr.
Change-Id: Ibef77ac4b26f2831b2fbba25e2a4d72899d75974
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
These tests ensure the functions manipulate data as expected.
They do not currently test atomicity.
Change-Id: I3646b3a55ffb895c56dbb0d0bc39da5e1138e7a5
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
