Commit graph

372 commits

Author SHA1 Message Date
Alexandre Bourdiol
e520f35453 drivers: flash: stm32wb return in case of control register locked
In case of control register lock, driver should return the error
immediately. Otherwise, error is later overwritten by
'rc = flash_stm32_wait_flash_idle(dev);'

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2020-07-10 11:46:05 +02:00
Vinayak Kariappa Chettimada
eb2a64989b drivers: flash: nrf: Fix flash operation timeout
Fix flash operation timeout due to incorrect use of
secondary ticker to abort any radio in use. Ticker id 0
is reserved for split controller's pipeline preempt timeout.
Using the same ticker id caused the secondary ticker to
not be started if controller is using the same ticker id
for pipeline preempt timeout.

Fixes #26333.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2020-07-09 07:17:41 -04:00
Peter Bigot
9acf7867ec drivers: spi_flash_at45: respect devicetree cs-gpios flags
Forward flags cell from cs-gpios devicetree property into device SPI
configuration.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-07-09 06:07:07 -05:00
Andrei Gansari
0d5e9f9620 drivers: soc_flash_mcux check before reading
LPC55xxx SoCs don't allow reading erased areas, the flash memory
controller (FMC) will trigger an ECC error for that area. To prevent
reading unwritten areas the low level FMC command of margin checking is
used, this will fail if the area to be read is not correctly written
(margin_check) or area is erased (blank_check).
In the case of an erased page, we return dummy data so the application
can program that area.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2020-07-09 11:28:25 +02:00
Alexandre Bourdiol
c8ceca2d53 drivers: STM32 dualcore concurrent register access protection with HSEM
In case of dualcore, STM32H7, STM32W and STM32MP1,
protect concurrent register write access with HSEM.
Done for following drivers:
clock_control, counter, flash, gpio, interrupt_controller

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2020-07-09 11:27:56 +02:00
Simon Glass
9ff7dfce23 flash: Enhance 'flash read' to read a block of data
It is annoying to read just a single word at a time. Update this
command to print any amount of data. This uses byte format at present.

We could perhaps support something like:

   flash read.8
   flash read.16
   flash read.32

to chose the size.

Example output (with line breaks to keep within git-style limit):

$ flash read FLASH_CTRL 0 20
00000000: 20 25 00 20 1d 26 00 08  69 68 00 08 45 26 00 08
   | %. .&.. ih..E&..|
00000010: 00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00
   |........ ........|

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-07 17:19:26 -04:00
Peter Bigot
dc14becd2d drivers: flash: nrf_qspi_nor: record dependency on multithreading
This driver blocks on a semaphore to receive notification when an
operation is complete, so requires CONFIG_MULTITHREADING=y.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-07-07 16:24:38 -04:00
Andreas Sandberg
69f0e3b15f drivers: flash: Add support for STM32L0X
Add support for STM32L0X using the generic STM32 backend. This is
quite a significant change since the L0 series uses a slightly
different flash controller. Refactor the generic backend to better
support different block sizes and the L0's register interface.

Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
2020-07-03 08:05:03 -04:00
Andreas Sandberg
b9da052e51 drivers: flash: Remove redundant code in STM32 drivers
Several STM32 chips have identical chip-specific code that has been
duplicated in different source files. Unify the F0x, F1x, and F3x to
use a single implementation.

Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
2020-07-03 08:05:03 -04:00
Fabio Utzig
b6a14265e7 drivers: flash: at45: fix page-size writing wrap
When writing buffers larger then page-size, there is already a routine
that checks wrap around and adjusts offsets, but this routine was
missing incrementing the data pointer, which would results in
rewriting the same page-size bytes over and over. This adds the proper
increment code.

Signed-off-by: Fabio Utzig <fabio.utzig@nordicsemi.no>
2020-07-02 08:33:40 -04:00
Fabio Utzig
f81c5190ec drivers: flash: at45: fix non-initialized warning
Silence a gcc warning due to possible return of unitialized variable in
erase function. This could only happen if size == 0, which doesn't seem
likely, but initializing the variable to zero should fix the issue.

Signed-off-by: Fabio Utzig <fabio.utzig@nordicsemi.no>
2020-07-02 08:33:40 -04:00
Dominik Ermel
bec0c7f279 drivers/flash/flash_simulator: Fix flash_sim_write
flash_sim_write did not work correctly when simulating flash with
non-0xff erase value.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2020-07-02 08:24:19 -04:00
Jordan Yates
ab509ffc46 flash: spi_nor: Add chip select flags
Adds the chip select devicetree flags to the spi_cs_control instance.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2020-07-01 16:40:03 -05:00
Jordan Yates
57740d89e0 flash: w25qxxdv: Add chip select flags
Adds the chip select devicetree flags to the spi_cs_control instance.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2020-07-01 16:40:03 -05:00
Kumar Gala
4cc93041db drivers: flash: atmel_sam: Fix build error
There is a typo in the function pointer assigned to get_parameters.  It
should be flash_sam_get_parameters.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-06-30 12:51:29 -05:00
Dominik Ermel
849a5432df drivers/flash/fash_simulator: Fix initialization for non-posix
Simulated flash, in non-POSIX compilation path, has been initialized to
incorrect value.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2020-06-29 15:48:45 -04:00
Tomasz Bursztyka
8260736268 drivers: Remove useless device start/end pointers
Commit id a538dcd8f8 got rid of the usage of these pointers so they are
useless now and can be removed in this drivers.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-06-26 11:09:28 -05:00
Andrzej Głąbek
c79620b722 drivers/flash/spi_flash_at45: Fix compilation errors
For some reason, use of the DT_NUM_INST macro in this driver was not
replaced with DT_NUM_INST_STATUS_OKAY. In consequence, this driver
could not be compiled successfully. Furthermore, because this now
undefined macro had been used inside UTIL_LISTIFY, gcc was not even
able to report an error, instead the compilation just "froze".
This patch replaces UTIL_LISTIFY(DT_NUM_INST()) with more appropriate
in this context DT_INST_FOREACH_STATUS_OKAY. It also adds an apparently
missing inclusion of sys/byteorder.h.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-06-25 19:33:41 +02:00
Anas Nashif
ee985d81aa shell: enable modules by default if shell is enabled
If shell is enabled then enable all sub-shells if their dependencies are
satisfied. This was done for some modules and subsystems but was not
consistent.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-06-24 21:37:12 -04:00
Peter Bigot
a538dcd8f8 shell: refactor device_name_get implementation
Several shell modules use cloned code to iterate over all devices and
identify the nth instance that meets some criteria.  The code was
repetitive and included various errors.  Abstract to a helper function
that performs the check consistently.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-23 13:27:14 +02:00
Marcin Niestroj
ba0a791635 flash: shell: align test array on 4 bytes
Some flash controllers support operations only when buffers are word
aligned. An example of such is nRF QSPI, which checks input buffer using
nrfx_is_word_aligned() function inside nrfx_qspi_write().

Align test array on 4 bytes, so we will gain compatibility with more
flash controllers, including nRF QSPI.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-06-22 20:43:59 -04:00
Dominik Ermel
609b645ac7 drivers/flash: Move write_block_size into flash_parameters
With addition of flash_parameters structure, and supporting API call
to retrieve it, it is no longer needed to store write_block_size as
a part of flash_driver_api and it should be part of flash_parameters.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2020-06-22 14:35:03 +02:00
Dominik Ermel
6ea6321586 drivers/flash: Add support for flash_get_parameters to drivers
With addition of flash_get_parameters API call, it is needed to provide
support for the API to flash drivers.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2020-06-22 14:35:03 +02:00
Peter Bigot
f2ac844cf7 drivers: flash: nrf_qspi_nor: optionally support write from NVMC
The Nordic QSPI peripheral uses DMA transfers so data to write must be
located in SRAM.  Add a Kconfig that enables copying data from NVMC to
a stack SRAM buffer so it can be written to flash.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-12 11:13:23 +02:00
Peter Bigot
16573923b3 drivers: flash: nrf_qspi_nor: support write of sub-word lengths
mcumgr and possibly mcuboot write single byte values to update the
state of objects.  Rather than fail to do the write of values too
short for this peripheral detect the situation and write from a stack
buffer that meets the length criteria.

Signed-off-by: Sigvart Hovland <sigvart.m@gmail.com>
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-12 11:13:23 +02:00
Marcin Niestroj
5bf4ee4f6c drivers: flash: nrf_qspi_nor: support specifying only 2 io-pins
Currently user is forced to configure an array of 4 IO pins. This makes
no sense when there are only 2 IO pins connected on board.

Configure 3rd and 4th pin in internal structure as
NRF_QSPI_PIN_NOT_CONNECTED if only 2 were specified in device-tree.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-06-12 11:11:30 +02:00
d0f87fa9d8 drivers: flash: report if the read returns an error
This matches the other commands that log on error.

Signed-off-by: Michael Hope <mlhx@google.com>
2020-06-09 18:57:54 +02:00
Peter Bigot
204612b3b2 drivers: flash: at45: improve diagnostics/behavior of erase
Erase can only succeed if the address is sector-aligned, and the span
to erase is an integer multiple of the sector size.  Validate this
before starting the process of erasing things.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-09 10:30:03 -05:00
Peter Bigot
c11ef527b1 drivers: flash: nrf_qspi_nor: improve diagnostics/behavior of erase
Erase can only succeed if the address is sector-aligned, and the span
to erase is an integer multiple of the sector size.  Validate this
before starting the process of erasing things.

Also reduce the check that the affected region is within the device
span to its minimal equivalent conditions.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-09 10:30:03 -05:00
Peter Bigot
f6cfdf79ba drivers: flash: spi_nor: improve diagnostics/behavior of erase
Erase can only succeed if the address is sector-aligned, and the span
to erase is an integer multiple of the sector size.  Validate this
before starting the process of erasing things.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-09 10:30:03 -05:00
Kumar Gala
a1b77fd589 zephyr: replace zephyr integer types with C99 types
git grep -l 'u\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g"
	git grep -l 's\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g"

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-06-08 08:23:57 -05:00
Peter Bigot
7d84d16aac drivers: flash: nrf_qspi_nor: clean up lock/unlock idioms
Having a completion wait function release a lock internally only when
the operation fails is confusing.  Remove that feature, and make the
lock and unlock operations explicit and paired.

This makes it much more clear how to properly handle transactions that
require multiple calls to the HAL.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-01 16:39:02 +02:00
Peter Bigot
5c80789f32 drivers: flash: nrf_qspi_nor: ensure source buffer is aligned
The stack buffer used to pad small reads must still be aligned to a
word address as the underlying driver uses DMA transfers with that
requirement.  Don't assume the compiler will naturally align it.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-01 16:39:02 +02:00
Peter Bigot
ed7fe169af drivers: flash: nrf_qspi_nor: reject zero length transfers
The check for small transfers inadvertently allowed a transfer of zero
bytes, which should be an error (invalid parameter).

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-06-01 16:39:02 +02:00
Peter Bigot
bfb56c5e20 drivers: flash: nrf_qspi_nor: support read of sub-word lengths
mcuboot and possibly other tools read single byte values to determine
the state of objects.  Rather than fail to do the read of values too
short for this peripheral detect the situation and read into a stack
buffer that meets the length criteria, and on success copy the data
into the provided buffer.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-05-21 17:04:05 +02:00
Martí Bolívar
6e8775ff84 devicetree: remove DT_HAS_NODE_STATUS_OKAY
Several reviewers agreed that DT_HAS_NODE_STATUS_OKAY(...) was an
undesirable API for the following reasons:

- it's inconsistent with the rest of the DT_NODE_HAS_FOO names
- DT_NODE_HAS_FOO_BAR_BAZ(node) was agreed upon as a shorthand
  for macros which are equivalent to
  DT_NODE_HAS_FOO(node) && DT_NODE_HAS_BAR(node) &&
- DT_NODE_HAS_BAZ(node), and DT_HAS_NODE_STATUS_OKAY is an odd duck
- DT_NODE_HAS_STATUS(..., okay) was viewed as more readable anyway
- it is seen as a somewhat aesthetically challenged name

Replace all users with DT_NODE_HAS_STATUS(..., okay), which is
semantically equivalent.

This is mostly done with sed, but a few remaining cases were done by
hand, along with whitespace, docs, and comment changes. These special
cases include the Nordic SOC static assert files.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-05-13 18:24:42 +02:00
Kumar Gala
db725c0ec9 drivers: Replace GPIO_CS Kconfig with devicetree detection
Use DT_INST_SPI_DEV_HAS_CS_GPIOS() in drivers to determine if we should
utilize CS_GPIO base SPI chipselect handling.  This allows us to remove
Kconfig option for this feature.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-09 13:07:05 +02:00
Tomasz Bursztyka
97326c0445 device: Fix structure attributes access
Since struct devconfig was merged earlier into struct device, let's fix
accessing config_info, name, ... attributes everywhere via:

grep -rlZ 'dev->config->' | xargs -0 sed -i 's/dev->config->/dev->/g'

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-05-08 23:07:44 +02:00
Tomasz Bursztyka
8d7bb8ffd8 device: Refactor device structures
When the device driver model got introduced, there were no concept of
SYS_INIT() which can be seen as software service. These were introduced
afterwards and reusing the device infrastructure for simplicity.
However, it meant to allocate a bit too much for something that only
required an initialization function to be called at right time.

Thus refactoring the devices structures relevantly:
- introducing struct init_entry which is a generic init end-point
- struct deviceconfig is removed and struct device owns everything now.
- SYS_INIT() generates only a struct init_entry via calling
  INIT_ENTRY_DEFINE()
- DEVICE_AND_API_INIT() generates a struct device and calls
  INIT_ENTRY_DEFINE()
- init objects sections are in ROM
- device objects sections are in RAM (but will end up in ROM once they
  will be 'constified')

It also generate a tiny memory gain on both ROM and RAM, which is nice.

Perhaps kernel/device.c could be renamed to something more relevant.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-05-08 23:07:44 +02:00
Andrzej Głąbek
8ee12207ff drivers: flash: Add driver for AT45 compatible SPI flash chips
Add a driver that can handle several instances of AT45 family chips,
which are enabled by specifying DT nodes for them with the "compatible"
property set to "atmel,at45" and other required properties like JEDEC
ID, chip capacity, block and page size etc. configured accordingly.

The driver is only capable of using "power of 2" binary page sizes in
those chips and at initialization configures them to work in that mode
(unless it is already done).

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-05-07 14:51:10 +02:00
Adam Serbinski
26be827af8 flash: sam0: set write_block_size=1 when EMULATE_BYTE_PAGES is set
The sam0 has a page size of 64 bytes, making it incompatible with
the nvs driver that specifies a maximum write block size of
32 bytes. When CONFIG_SOC_FLASH_SAM0_EMULATE_BYTE_PAGES is set,
it should report a write block size of 1 byte, which is compatible
with nvs.

Signed-off-by: Adam Serbinski <aserbinski@gmail.com>
2020-05-07 10:06:17 +02:00
Peter Bigot
7e35983977 drivers: flash: spi-nor: correct index into array property value
The dpd-wake-sequence has a value that is an array of three integers,
which was formerly indexed by a suffix on the property name.  This was
updated to new accessors but failed to separate the index from the
property name.  Update the access idiom.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-05-07 00:59:29 -05:00
Kumar Gala
fdd85d5ad7 dts: Rename DT_HAS_NODE macro to DT_HAS_NODE_STATUS_OKAY
Rename DT_HAS_NODE to DT_HAS_NODE_STATUS_OKAY so the semantics are
clear.  As going forward DT_HAS_NODE will report if a NODE exists
regardless of its status.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-06 05:25:41 -05:00
Kumar Gala
50345848b4 drivers: flash: flash_simulator: Convert to new DT macros
Convert flash_simulator to use new DT macros and remove associated
defines in dts_fixup.h.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-30 04:47:44 -05:00
Kumar Gala
7a15afc1d4 drivers: flash: replace DT_FLASH_DEV_NAME with DT macro
Replace DT_FLASH_DEV_NAME with DT_CHOSEN_ZEPHYR_FLASH_CONTROLLER_LABEL.
We now set zephyr,flash-controller in the chosen node of the device
tree to the flash controller device.

NOTE: For a SoCs with on die flash, this points to the controller and
      not the 'soc-nv-flash' node.  Typically the controller is the
      parent of the 'soc-nv-flash' node).

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-27 18:43:20 -05:00
Martí Bolívar
100187cb64 drivers: flash: nordic qspi: finish DT API conversion
Also convert bus node access to the new API.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-04-21 18:31:08 +02:00
Peter A. Bigot
3d8125a47c drivers: flash: nrfx_qspi_nor: fix semaphore errors
The code generally invoked qspi_wait_for_completion() within a locked
region without verifying that an operation was successfully initiated.
This caused a deadlock whenever the operation failed, e.g. because the
data buffer was not 4-byte aligned.  Update that function to take the
result of the operation and either wait for completion or release the
lock, depending on its value.

Also uniformly use the correct type for Nordic HAL error values, and
refactor the erase module so that the correct values are displayed in
the diagnostic when something goes wrong.

Also check the alignment requirements for the flash address and
transfer size, which are highly constrained on this device.  This
driver also requires 4-byte aligned data buffer; this is checked in
the Nordic HAL.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2020-04-20 15:41:35 +02:00
Erwan Gouriou
65eacef644 drivers/flash: stm32: Use stm32 generic compat as driver compatible
Instead of various series compatibles, use single stm32 generic
compatible as reference for stm32 flash driver.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-04-20 03:51:36 -05:00
Kumar Gala
f04490e300 drivers: flash: nrf_qspi_nor: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-15 11:17:32 -05:00
Kumar Gala
8dc6f9f5dd drivers: flash: nrf: Conver to new DT macros
Convert driver from DT_FLASH_BASE_ADDRESS and DT_FLASH_DEV_NAME to use
DT_REG_ADDR and DT_INST_LABEL.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-15 06:22:40 -05:00