A previous re-work of IRQ priorities was led astray by an incorrect
comment. Priority level 1 is not a non-maskable interrupt priority.
In addition, zero latency IRQs are not implemented on ARC.
Timer driver now doesn't specify IRQ_ZERO_LATENCY (as that wouldn't be
correct) and its IRQ priority is now tunable in Kconfig. The default is 0.
IPM driver on both ARC and x86 side were being configured with hard-coded
priority of 2, which wasn't valid for ARC and caused an assertion failure.
The priority level is now tunable with Kconfig and defaults to 1 for ARC.
Issue: ZEP-693
Change-Id: If76dbfee214be7630d787be0bce4549a1ecbcb5b
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
We have already done this on x86 and ARM. The policy is as follows:
* IRQ priority levels starting at 0 all have the same semantics and
do not have special properties. The priority level is either ignored
on arches which do not support programmable priority levels, or lower
priority levels take precedence over higher ones.
* Special-case priorty levels are specified via flags, in which case
the supplied priority level is ignored.
Issue: ZEP-60
Change-Id: Ic603f49299ee1426fb9350ca29d0b8ef96a1d53a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Arches now select whether they want to use the GCC built-ins,
their own assembly implementation, or the generic C code.
At the moment, the SDK compilers only support builtins for ARM
and X86. ZEP-557 opened to investigate further.
Change-Id: I53e411b4967d87f737338379bd482bd653f19422
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Used by ARC, ARM, Nios II. x86 has alternate code done in assembly.
Linker scripts had some alarming comments about data/BSS overlap,
but the beginning of BSS is aligned so this can't happen even if
the end of data isn't.
The common code doesn't use fake pointer values for the number of
words in these sections, don't compute or export them.
Change-Id: I4291c2a6d0222d0a3e95c140deae7539ebab3cc3
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
There are a few problems with the code being repaired here.
1. A seti was used to re-enable all interrupts, even though the
thread being switched to may have had certain interrupt priorities masked.
2. saved status32 already has SC bit if thats wanted, so its ok to just
restore status32 as-is w/o needing to and off anything.
3. the code is difficult to write using kflag and seti because as you
restore registers, there aren't any to use. But we can exploit a
trick where we pretend an interrupt has occured by setting a bit in
AUX_IRQ_ACT, and then use RTIE instruction to restore status32
atomically with branching to return address. Something about the way
this code was written was causing stack corruptings and crashes in an
application that uses a high rate of both FIRQ and Regular interrupts.
Change-Id: Ia7166d51f0e750c07832ab115b7151ce37ee0278
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Since firq utilizes a 2nd register bank, and since all of those
many GPRs can be used, the strategy here is to save extra registers,
such as lp_count, lp_start, lp_end into callee saved registers.
These registers are safe to use because the C-ABI followed by the
compiler will cause these to be spilled to the stack if a C function
wants to use them. By selecting upper GPRs, r23-r25, it is very unlikely
the compiler will spill them. This improvement, therefore, can avoid a
d-cache miss since we are avoding memory altogether when saving these.
The struct firq_regs is no longer needed.
Change-Id: I7c0d061908a90376da7a0101b62e804647a20443
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
It was found that the test latency_measure, when compiled
for microkernel, would fail on the ARC. This because the
trap handler, used by irq_offload, wasn't supporting thread switching.
This submission adds the code to do that, and the code size is
bigger only when CONFIG_MICROKERNEL is defined.
To keep code a bit smaller, there is a trick exploited here where
the AE bit is cleared in the STATUS32 register and in AUX_IRQ_ACT,
bit 1 is set, to make it appear as if the machine has interrupted
at priority 1 level. It then can jump into some common interrupt
exit code for regular interrupts and perform an RTIE instruction
to switch into the new thread.
test/latency_measure/microkernel now passes.
Change-Id: I1872a80bb09a259814540567f51721203201679a
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
The .nd on a branch is WRONG if its an unconditional branch. Not needed.
On conditional branches its a compiler feature that is not yet functional
with ARC targets. Typical code for this compiler can use .d to put
something in the delay slot of an instruction, but using .nd is probably
never wanted.
Change-Id: If1017c468e6e7af269ea73daeb4bc223dcc0059f
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
The ARC CPU comes up from reset with i-cache enabled.
It can have garbage in it from a previous run.
The fix is to check the build register for the i-cache, and if its
present, invalidate it fully, and then disable it.
_icache_setup() is called later to turn it on.
Change-Id: I26fae915153841c61e9530d5af2ddb9d0553275b
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
In fault_s.S, changing the word "save" to "safe".
Change-Id: Ia997082a62bf287f09a72b7f0a00d506bd982770
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Some ARC CPUs can be built with separate instruction bus
and data bus (i.e. Harvard Architecture). Such systems
have only ICCM and DCCM memories. When CONFIG_HARVARD
is defined, the initial stack pointer is set to the
TOP of the DCCM memory. Currently there is no SOC that
existing in Zephyr tree that sets CONFIG_HARVARD, but
this will be coming soon.
Change-Id: I2016d1f472fbdad683a964aa0b65c5263ecfb6cf
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Some ARC targets can have a data-cache. Although there is no special
instruction to clear exceptions during early init, it is necessary to
invalidate the d-cache BEFORE any data is fetched. The ARC on arduino 101
doesn't have d-cache, and will thus skip this d-cache invalidate.
Also, it is important to set the vector table base register to point to
the interrupt vector table EARLY, so that if an exception is encountered,
the correct vector table is found. Set this base only if it is found to be
different from the one compiled in to the code.
These initialization steps assure that proper exception handling
is in place during early init.
Change-Id: Ie8b5928e5813e104680a6d6510c85d32dc8ed8f3
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
The lr and sr instructions cause a pipeline bubble. There is an efficiency
to be gained if pairs of lr or sr instructions are done right next to
each other. This can avoid some stall cycles.
Also, r14 and r15 can be used with isa-16 instructions.
Change-Id: I4165365b49da910db31e0699a1a6e47114962942
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
By using isa-16 instructions, a bit of code-size can be saved,
and code can be a little faster.
Change-Id: I0567d8274372748f579610e2bd4236ce52c5d6c8
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Code size can be reduced by replacing ld and st
with ld_s and st_s (if target registers are r0-r3).
Change-Id: Ia70f0aff07fe41a0cfeff2d59dcdadf7c88e1ae8
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
code-size optimization to use small-variant loads/stores with %r13w
Change-Id: Ic9b2b7744f7d465bccb1e59f64e621985ae7d04d
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
There is a BUG here in that the alias for __start was
aliased to the start of the vector table. Yet, on ARC CPUs,
the vector table CANNOT be the entry point, because there
is no code in a vector table. Only addresses appear in each vector.
Thus, the reset vector, at offset 0 in this table, is a raw address.
The top Makefile in zephyr sets the lable __start to be the entry point
like this: -e __start. Debuggers, for example, use this entry point
to know where the first line of code is.
Also, in KConfig, there were duplicate NSIM blocks. One has been
removed.
Change-Id: I480be7d338a8b45b8ea6ef3f55ac2e6c43829452
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Fibers initialize this back pointer to NULL as they are (by definition)
not microkernel tasks. Microkernel tasks initialize it to their
corresponding 'ktask_t'.
However for nanokernel systems, the back pointer is always NULL. This
is because there is only one task in a nanokernel system (the background
task) and it can not pend on a nanokernel object--it must poll.
Change-Id: I9840fecc44224bef63d09d587d703720cf33ad57
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
We really should have more faith in the compiler, it generates
code to implement this exactly like the arch-specific assembly
versions, and on ARM is actually 4 bytes shorter.
FUNC_NO_FP used to disable the usual C preamble to update the
frame/stack pointers, which is how the sizes are still the same
or less. It's debatable how useful the occasional use of
FUNC_NO_FP is in practice since it hinders debugging and in a
production build frame pointers should be globally disabled, but
we can address that later.
Change-Id: I6c4b64ab3e3a9b6f91d52fa8c92e6e79a986fc77
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Of the 3 related functions;
_thread_essential_set()
_thread_essential_clear()
_is_thread_essential()
The first two are parameter-less and always operate on
"_nanokernel.current". The last one takes a 'thread' parameter but will
operate on _nanokernel.current if the parameter is NULL. All calls to
_is_thread_essential() pass NULL!
This change makes the 3 functions consistent by removing the parameter
to the 3rd function. This should also be marginally more efficient,
though consistency was the motivation. This change corrects the doc
preamble to all 3 functions.
(These functions would probably be better as inlines. Also, the choice
of when to use wrappers seems a bit arbitrary. E.g. there's nothing
for setting/testing the "FIBER" flag.)
Change-Id: Ie3589f8a28b227c6d7a3a31b664d3b3e6e9c6d17
Signed-off-by: Geoff Thorpe <geoff.thorpe@nxp.com>
These C variants of atomic operations can work on any arch,
have platforms select them if they don't have ASM equivalents.
Change-Id: I38eb03bb58beff865681ee56ef7bc0fcded1e906
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Remove hardcoding and make the values configurable. Also make the
Kconfig variables consistent with other architectures.
Change-Id: I69334002303d4d8abaf7363d9134fd5f46ce4eeb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
lp_count register can be store directly to memory, it is actualy done,
and the instruction that precedes it has no effect.
Change-Id: I8b8fee6abd6f08eea38dd1ab5bbe61c25a2a1f7d
Signed-off-by: Alexandre d'Alton <alexandre.dalton@intel.com>
ARC CPU has stack checking feature that allows to trigger an exception
whenever the stack is incorrectly accessed.
This patch implements the stack_top and stack_base register updates on
context switches, and activates the Stack Checking bit of STATUS32
register when the CPU is in the context of a fiber or task.
As GCC accesses the non-yet allocated stack with frame pointer enabled,
this patch also add the omit-frame-pointer gcc flag in order to work
properly.
Change-Id: Ia9e224085a03bd29d682fb8f51f8e712f2ccb556
Signed-off-by: Alexandre d'Alton <alexandre.dalton@intel.com>
Changed names of Kconfig flags, variables, functions, files and
return codes consistent with names used in the RFC. Updated
relevant comments to match the changes.
Origin: Original
Change-Id: Ie7941032d7ad7af61fc02928f74538745e7966e8
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The thread monitor allows to iterate over the thread context
structures for each existing thread (fiber/task) in the system.
Thread context structures do not expose thread entry information
directly. Although all the information can be scavenged from memory
stacks. Besides, accessing the information depends on the stack
implementation for each architecture.
By extending the tcs we allow a direct access to the thread
entry point and its parameters, only when thread monitor is
enabled.
It also allows a task to access its kernel task structure
through the first parameter of the thread.
This allows a debugger application to access the information directly
from the thread context structures list.
Change-Id: I0a435942b80eddffdf405016ac4056eb7aa1239c
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@intel.com>
It is semantically identical to CONFIG_SW_ISR_TABLE.
Change-Id: Iff0c47166ee6fb1fd8a0991a67bc863d45c32559
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The app-facing interface for configuring interrupts was never
formally defined, instead it was defined separately for each arch
in their respective arch-specific header files. Occasionally these
would go out of sync.
Now there is a single irq.h header which defines this interface.
To avoid runtime overhead, these map to _arch_* implementations of
each that must be defined in headers pulled in by arch/cpu.h.
Change-Id: I69afbeff31fd07f981b5b291f3c427296b00a4ef
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Adds extern "C" { } blocks to header files so that they can be
safely used by C++ source files.
Change-Id: Ia4db0c36a5dac5d3de351184a297d2af0df64532
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
We can save a great deal of RAM this way, it only needs to be
in RAM if dynamic interrupts are in use.
At some point this config option broke, probably when static
interrupts were introduced into the system.
To induce build (instead of runtime) errors when irq_connect_dynamic()
is used without putting the table in RAM, the dynamic interrupt
functions are now conditionally compiled.
Change-Id: I4860508746fd375d189390163876c59b6c544c9a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The interrupt API has been redesigned:
- irq_connect() for dynamic interrupts renamed to irq_connect_dynamic().
It will be used in situations where the new static irq_connect()
won't work, i.e. the value of arguments can't be computed at build time
- a new API for static interrupts replaces irq_connect(). it is used
exactly the same way as its dynamic counterpart. The old static irq
macros will be removed
- Separate stub assembly files are no longer needed as the stubs are now
generated inline with irq_connect()
ReST documentation updated for the changed API. Some detail about the
IDT in ROM added, and an oblique reference to the internal-only
_irq_handler_set() API removed; we don't talk about internal APIs in
the official documentation.
Change-Id: I280519993da0e0fe671eb537a876f67de33d3cd4
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The ARC EM family processors do not support native atomic assembly
instructions (LLOCK and SCOND). Therefore, the assembly version
of atomic functions cannot be used. This adds pure C version of
these atomic functions.
Change-Id: Ic64dd31b0367b6dcf3a46f41c0c7ac2c2ce5eb8d
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Modified interrupt handling and idle code to enter and exit tickless
idle mode.
Change-Id: I3461ab6dba30003a4317027fc50a3ba07e830015
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
On ARC the IRQ and exception vectors are just one big array of
function pointers placed at the very beginning of the binary in ROM.
Vectors 0-15 are for CPU exceptions, 16-255 for interrupts.
In Zephyr these have been logically split into an execption table
followed immediately by the IRQ table, specified in the ARC linker.cmd.
However, the exception vector table defined in Zephyr had only 14
entries so the IRQ table was misaligned by 8 bytes. This went undetected
for some time as in the default configuration every entry in the IRQ
table pointed to the common demux function _isr_enter().
This patch correctly ensures that the IRQ table begins at address
0x40000040 instead of 0x40000038 like it had been.
Change-Id: I3b548df0dcabeb9d986ecd6a41e593bd02e3bd73
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Saves an errno per-thread, retrieved via _get_errno(), instead of
changing the value of a global variable during context switches to avoid
a hit to the context switch performance.
Per-arch asm implementations are provided for maximum performance.
Enabled by default, but can be disabled via the CONFIG_ERRNO option.
Change-Id: I81d57a2e318c94c68eee913ae0d4ca3a3609c7a4
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Removed old style file description and documnetation and apply
doxygen synatx.
Change-Id: I3ac9f06d4f574bf3c79c6f6044cec3a7e2f6e4c8
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Uses the "trap_s" exception to simulate entry into IRQ context;
offloaded functions run on the FIRQ stack.
Change-Id: I310ce42b45aca5dabd1d27e486645d23fa0b118f
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The defauls set in architecture Kconfig are not being overwritten
by the platform, so remove those and rely on platform provided
data.
Change-Id: Ia71d9d14dddce94c29b9ca957b4ed3ae8838d96c
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Flags allow passing IRQ triggering option for x86 architecture.
Each platform defines flags for a particular device and then
device driver uses them when registers the interrupt handler.
The change in API means that device drivers and sample
applications need to use the new API.
IRQ triggering configuration is now handled by device drivers
by using flags passed to interrupt registering API:
IRQ_CONNECT_STATIC() or irq_connect()
Change-Id: Ibc4312ea2b4032a2efc5b913c6389f780a2a11d1
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
This was kept around since it used to be necessary for x86, and we
want our APIs to keep partity across arches, but with the x86 IRQ
refactoring this is no longer needed.
Change-Id: Iacd61f4c4d3cc33b4a15bfa083e106ba6d5da942
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The \NOMANUAL tag is a remnant from days of yore and is no longer
needed or useful. Cleaning up the code references to this.
Change-Id: I1b8cc9c9560d1dbb711f05fa63fd23386789875c
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Change-Id: I6da43e41f9c6efee577b70513ec368ae3cce0144
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Moving many of the functions from the old format of inline comments to
the newer doxygen format.
Change-Id: Ib0fe0d8627d7cd90219385a3ab627da8f9637d98
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Change all the Intel and Wind River code license from BSD-3 to Apache 2.
Change-Id: Id8be2c1c161a06ea8a0b9f38e17660e11dbb384b
Signed-off-by: Javier B Perez Hernandez <javier.b.perez.hernandez@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
if printk is disabled, the variables will be unused and we will
get compiler warning.
Change-Id: I5dad791ae89d7a8c98f9e4660da472ef0caacc92
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Also for ARC, rename context_wrapper.S to thread_entry_wrapper.S.
Change-Id: I83318ae352a688996f8436cf3252f6108ec23dc5
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
The term 'context' is vague and overloaded. Its usage for 'an execution
context' is now referred as such, in both comments and some APIs' names.
When the execution context can only be a fiber or a task (i.e. not an
ISR), it is referred to as a 'thread', again in comments and everywhere
in the code.
APIs that had their names changed:
- nano_context_id_t is now nano_thread_id_t
- context_self_get() is now sys_thread_self_get()
- context_type_get() is now sys_execution_context_type_get()
- context_custom_data_set/get() are now
sys_thread_custom_data_set/get()
The 'context' prefix namespace does not have to be reserved by the
kernel anymore.
The Context Control Structure (CCS) data structure is now the Thread
Control Structure (TCS):
- struct ccs is now struct tcs
- tCCS is now tTCS
Change-Id: I7526a76c5b01e7c86333078e2d2e77c9feef5364
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
This commit fixes an issue with INIT_STACKS configuration option.
k_memset is substituted by the libc memset routine to initialize a
block of memory.
Change-Id: Ic3e286d0976f618110b2828f6da76417b868aef0
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
The inline versions are renamed to remove the _inline suffix, and the
non-inline versions are removed from the code base.
Change-Id: Iee2e6adcfb5da1fe0a978a05aa854e10ae82a8b8
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
The inline versions are renamed to remove the _inline suffix, and the
non-inline versions are removed from the code base.
Change-Id: I7314b96c42835f15df4c537ec11ab7961d4ee60f
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Standardize on using the irq_lock/irq_unlock (non-inline) symbols
everywhere.
The non-inline versions provide absolutely no benefits, so they will be
removed in a subsequent commit, and the inline versions will have their
_inline suffix removed.
Change-Id: Ib0b55f450447366468723e065a60adbadf7067a9
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
irq_handler_set, irq_priority_set and irq_disconnect have been made
private by prepending an underscore to their names:
irq_handler_set -> irq_handler_set
irq_priority_set -> irq_priority_set
irq_disconnect -> irq_disconnect
The prototypes have been removed from header files when possible, and
extern statements used in C code where they were called.
_irq_priority_set() for ARM is still in the header file because
IRQ_CONFIG() relies on it.
Change-Id: I2ad585f8156ff80250f6d9eeca4a249a4477fd9d
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
There were some typos and some weird phrasing.
Change-Id: I7b183755058e5ffedca97d434c43f448aafd1926
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
One of many steps in the transform BSPs to platforms work item. At the end
of this work item, there should not be any code in the 'arch/arc' directory.
Change-Id: If72a6a858eb4b0f1521191fca441bed4acc6d8ce
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Remove function name from comment and add @brief instead.
Also capitilize first letter.
Change-Id: Ib708b49bf02e5bc89b0066637a55874e659637e0
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Previous comment style used RETRURNS:, use @return to comply
with javadoc style.
Change-Id: Ib1dffd92da1d97d60063ec5309b08049828f6661
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The change replaces multiple asterisks to ** at
the beginning of comments and adds a space before
the asterisks at the beginning of lines.
Change-Id: I7656bde3bf4d9a31e38941e43b580520432dabc1
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Eliminates unnecessary "offsets" subdirectory, and aligns file
name with gen_offset.h which resides in the same directory.
Change-Id: I8cea3bc54b5ceae3091d4a5c77c59ab826339f75
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Eliminates use of non-standard camelCase file name.
Change-Id: I809de5f72b40adfd49cbc128992de934e3ec66e3
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
The new name better reflects that this file contains all private
nanokernel APIs that are used by various kernel subsystems.
Change-Id: I4c258d582e93753eec9e575fdb5f9f2109417a0f
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
s_NANO contains the timeout queue, and each ccs needs a struct
_nano_timeout object that gets linked in the nanokernel timeout queue.
Change-Id: Iad027eaaebcffe190e95f0b9d068f047062559c2
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
This commit set back .S as the assembly code extension for Kbuild.
Change-Id: Ib0119876bd0bed6617bbfbad2ca6a44e172ab042
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
Eliminates references to the obsolete OS name. In most cases the
name is simply removed, as it isn't necessary.
Change-Id: I32f9e7390e436aec008a9454b72657e129d65152
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Gets rid of references to the obsolete OS name. (Note that removing
the build system comment entirely makes sense, since there are no
other comments for anything else in the file.)
Change-Id: I4473b016c1c85be48ac9ab8d5b8f6a5b11dd58d0
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Introduces nano_internal.h, which will declare all architecture-
independent non-public nanokernel APIs. This file is automatically
incorporated by the various architecture-specific include files
for non-public nanokernel APIs, and will not normally be included
directly by any other files.
Change-Id: I9f3de812a5747cc720fa0ff739007315e8d07dd9
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Gets rid of places where there is no need to include these files
at all, or places where these files are being indirectly included
due to the inclusion of nanokernel.h.
Change-Id: I7b58148af454b977830c00a6b519a78d0595603b
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Instead of initializing the stack (when INIT_STACKS is enabled) in start_task()
and _fiber_start(), do it in _NewContext(). This helps to both reduce code
duplication AND ensure that all contexts get an initialized stack (previously
the background/idle task's was missed).
Change-Id: If2d50309d2be48fac937f5d0ae96b9de185c0fe2
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Since the address of the new context is known before _NewContext() is invoked
(due to it being passed a properly aligned stack), there is no longer any
need for _NewContext to return the pointer to the context.
Furthermore, as a direct result of the properly aligned stack, the pointer to
the new context does not need to be passed as a separate parameter since it
will always match the passed stack pointer.
Change-Id: Ie57a9c4ad17f6f13e8b3f659cd701d4f8950ea97
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Runtime alignment of a context's stack is no longer necessary in _NewContext()
as the memory is aligned (via the __stack tag) before calling _NewContext().
Change-Id: I31b7fd883ea3f1dcdb378e8ff508430bc75afcde
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
This reason code will be used indicate that the kernel failed to allocate a
critical resource (such as a command packet or a timer packet).
Change-Id: I6d4c3d96fc70b2b8cab4027b1b8e4febf4d6c474
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
This is not required since the secure string library routines
have been removed.
Change-Id: I284a21e4167d9bb6f78354d809c563a4c52f619c
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Renaming the directory include/nanokernel to be include/arch, which
better reflects the real nature of the directory and the contents
inside.
Change-Id: I2bc33ebc6715e2f0403227a558279fdf52398ade
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Updating global variable's name to follow a consistent naming convention.
Explicitly moved from __ to _ by direction of Ben Walsh
Change accomplished with the following script:
#!/bin/bash
echo "Searching for ${1} to replace with ${2}"
find ./ \( -name "*.[chs]" -o -name "sysgen.py" -o -name "*.kconf" -o -name "*.arch" \) \
! -path "./host/src/genIdt/*" \
! -path "*/outdir/*" | xargs sed -i 's/\b'${1}'\b/'${2}'/g';
Change-Id: Idd6f7c3c2fdd818f0a794985f3689705cac3c0a2
Signed-off-by: Yonattan Louise <yonattan.a.louise.mendoza@intel.com>
Updating global variable's name to follow a consistent naming convention.
Change accomplished with the following script:
#!/bin/bash
echo "Searching for ${1} to replace with ${2}"
find ./ \( -name "*.[chs]" -o -name "sysgen.py" -o -name "*.kconf" -o -name "*.arch" \) \
! -path "./host/src/genIdt/*" \
! -path "*/outdir/*" | xargs sed -i 's/\b'${1}'\b/'${2}'/g';
Change-Id: I7fc572f869c5f104538cfb3f84b1b36071e54dde
Signed-off-by: Yonattan Louise <yonattan.a.louise.mendoza@intel.com>
Updating global variable's name to follow a consistent naming convention.
Change accomplished with the following script:
#!/bin/bash
echo "Searching for ${1} to replace with ${2}"
find ./ \( -name "*.[chs]" -o -name "sysgen.py" -o -name "*.kconf" -o -name "*.arch" \) \
! -path "./host/src/genIdt/*" \
! -path "*/outdir/*" | xargs sed -i 's/\b'${1}'\b/'${2}'/g';
Change-Id: Icf5900c057f3412d3c7725c07176fe125c374958
Signed-off-by: Yonattan Louise <yonattan.a.louise.mendoza@intel.com>
Renaming camelCase _SpuriousIRQ makes code more readable and
consistent.
Change-Id: I2bda4d107091384811d9f9187f3529960842631e
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Modifies the name of this field to make its purpose clearer,
and to align with coding conventions.
Change-Id: I8de78df1a0459122067d650130e01078afb5af8a
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Revises code that was previously conditional on HOST_TOOLS_SUPPORT
but is now conditional on CONTEXT_MONITOR.
Change-Id: I78a9126c5a66128f5aafe6b4220b3c7c68e01335
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Revises this option to make its purpose clearer, and to align it
with other experimantal monitoring-type configuration options.
Change-Id: I593bb7560b5a0544eb05affaa07b59dd78ea907e
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Updating nano kernel functions to follow a consistent naming convention.
Part of that process is the removal of camelCase naming conventions for the
preferred_underscore_method.
Change accomplished with the following script:
#!/bin/bash
echo "Searching for ${1} to replace with ${2}"
find . -type f \( -iname \*.c -o -iname \*.h -o -iname \*.s -o -iname \*.kconf \) \
-not \( -path host/src/genIdt -prune \) \ \
-not \( -path host/src/gen_tables -prune \) \
-print | xargs sed -i "s/"${1}"/"${2}"/g"
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
