usb: dw: Add Quark SE USB device controller driver
Quark SE USB device (Designware IP) controller driver implements the low level control routines to deal directly with the hardware. Only FIFO mode supported. Change-Id: I086186df017734579f0363ed79effc1481ff32c2 Signed-off-by: Adrian Bradianu <adrian.bradianu@windriver.com> Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com> Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
This commit is contained in:
Adrian Bradianu
Inaky Perez-Gonzalez
parent
6b88a6b945
commit
ff712114ef
9 changed files with 1336 additions and 0 deletions
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@ -220,4 +220,9 @@ config SOC_FLASH_QMSI_SYS_SIZE
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default 0x60000
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endif # SOC_FLASH_QMSI
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if USB
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config USB_DW_IRQ_PRI
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default 3
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endif # USB
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endif # SOC_QUARK_SE
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@ -71,4 +71,6 @@ source "drivers/counter/Kconfig"
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source "drivers/dma/Kconfig"
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source "drivers/usb/Kconfig"
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endmenu
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@ -28,3 +28,4 @@ obj-$(CONFIG_SENSOR) += sensor/
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obj-$(CONFIG_AIO_COMPARATOR) += aio/
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obj-$(CONFIG_PINMUX) += pinmux/
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obj-$(CONFIG_DMA) += dma/
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obj-$(CONFIG_USB) += usb/
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25
drivers/usb/Kconfig
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25
drivers/usb/Kconfig
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@ -0,0 +1,25 @@
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# Kconfig - USB configuration options
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#
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# Copyright (c) 2016 Wind River Systems, Inc.
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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menuconfig USB
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bool "USB"
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default n
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help
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Enable USB drivers.
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source "drivers/usb/device/Kconfig"
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1
drivers/usb/Makefile
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1
drivers/usb/Makefile
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@ -0,0 +1 @@
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obj-$(CONFIG_USB) += device/
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42
drivers/usb/device/Kconfig
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42
drivers/usb/device/Kconfig
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@ -0,0 +1,42 @@
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# Kconfig - USB device configuration options
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#
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# Copyright (c) 2016 Wind River Systems, Inc.
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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if USB
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config USB_DW
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bool
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prompt "Designware USB Device Controller Driver"
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default n
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help
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Designware USB Device Controller Driver.
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config USB_DW_IRQ_PRI
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int "DesignWare USB Driver Interrupt priority"
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depends on USB_DW
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help
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USB interrupt priority.
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config USB_DW_DEBUG
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bool
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prompt "Enable USB debug options for DesignWare USB driver"
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default n
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depends on USB_DW
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help
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This option enables the debug features for DesignWare USB driver
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endif # USB
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3
drivers/usb/device/Makefile
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3
drivers/usb/device/Makefile
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@ -0,0 +1,3 @@
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ccflags-y += -I${srctree}/include/drivers/usb -I${srctree}/include/usb/
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obj-$(CONFIG_USB_DW) += usb_dc_dw.o
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1035
drivers/usb/device/usb_dc_dw.c
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1035
drivers/usb/device/usb_dc_dw.c
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File diff suppressed because it is too large
Load diff
222
drivers/usb/device/usb_dw_registers.h
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222
drivers/usb/device/usb_dw_registers.h
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@ -0,0 +1,222 @@
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/*
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* Copyright (c) 2016 Intel Corporation
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @file
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* @brief Designware USB device controller driver private definitions
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*
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* This file contains the Designware USB device controller driver private
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* definitions.
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*/
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#ifndef __USB_DW_REGISTERS_H__
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#define __USB_DW_REGISTERS_H__
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#include <misc/util.h>
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#include <board.h>
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#if defined(CONFIG_SOC_QUARK_SE)
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#include "qm_soc_regs.h"
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Number of USB controllers */
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enum USB_DW { USB_DW_0 = 0, USB_DW_NUM };
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/* USB IN EP index */
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enum usb_dw_in_ep_idx {
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USB_DW_IN_EP_0 = 0,
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USB_DW_IN_EP_1,
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USB_DW_IN_EP_2,
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USB_DW_IN_EP_3,
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USB_DW_IN_EP_4,
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USB_DW_IN_EP_5,
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USB_DW_IN_EP_NUM
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};
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/* USB OUT EP index */
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enum usb_dw_out_ep_idx {
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USB_DW_OUT_EP_0 = 0,
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USB_DW_OUT_EP_1,
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USB_DW_OUT_EP_2,
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USB_DW_OUT_EP_3,
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USB_DW_OUT_EP_NUM
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};
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/* USB IN EP Register block type */
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struct usb_dw_in_ep_reg {
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volatile uint32_t diepctl;
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uint32_t reserved;
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volatile uint32_t diepint;
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uint32_t reserved1;
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volatile uint32_t dieptsiz;
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volatile uint32_t diepdma;
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volatile uint32_t dtxfsts;
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uint32_t reserved2;
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};
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/* USB OUT EP Register block type */
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struct usb_dw_out_ep_reg {
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volatile uint32_t doepctl;
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uint32_t reserved;
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volatile uint32_t doepint;
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uint32_t reserved1;
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volatile uint32_t doeptsiz;
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volatile uint32_t doepdma;
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uint32_t reserved2;
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uint32_t reserved3;
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};
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/* USB Register block type */
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struct usb_dw_reg {
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volatile uint32_t gotgctl;
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volatile uint32_t gotgint;
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volatile uint32_t gahbcfg;
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volatile uint32_t gusbcfg;
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volatile uint32_t grstctl;
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volatile uint32_t gintsts;
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volatile uint32_t gintmsk;
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volatile uint32_t grxstsr;
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volatile uint32_t grxstsp;
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volatile uint32_t grxfsiz;
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volatile uint32_t gnptxfsiz;
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uint32_t reserved[5];
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volatile uint32_t gsnpsid;
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volatile uint32_t ghwcfg1;
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volatile uint32_t ghwcfg2;
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volatile uint32_t ghwcfg3;
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volatile uint32_t ghwcfg4;
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volatile uint32_t gdfifocfg;
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uint32_t reserved1[43];
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volatile uint32_t dieptxf1;
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volatile uint32_t dieptxf2;
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volatile uint32_t dieptxf3;
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volatile uint32_t dieptxf4;
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volatile uint32_t dieptxf5;
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uint32_t reserved2[442];
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volatile uint32_t dcfg;
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volatile uint32_t dctl;
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volatile uint32_t dsts;
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uint32_t reserved3;
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volatile uint32_t diepmsk;
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volatile uint32_t doepmsk;
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volatile uint32_t daint;
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volatile uint32_t daintmsk;
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uint32_t reserved4[2];
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volatile uint32_t dvbusdis;
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volatile uint32_t dvbuspulse;
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volatile uint32_t dthrctl;
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volatile uint32_t diepempmsk;
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uint32_t reserved5[50];
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struct usb_dw_in_ep_reg in_ep_reg[USB_DW_IN_EP_NUM];
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uint32_t reserved6[80];
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struct usb_dw_out_ep_reg out_ep_reg[USB_DW_OUT_EP_NUM];
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};
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/* USB register offsets and masks */
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#define USB_DW_GRSTCTL_AHB_IDLE BIT(31)
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#define USB_DW_GRSTCTL_TX_FNUM_OFFSET (6)
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#define USB_DW_GRSTCTL_TX_FFLSH BIT(5)
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#define USB_DW_GRSTCTL_C_SFT_RST BIT(0)
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#define USB_DW_GAHBCFG_DMA_EN BIT(5)
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#define USB_DW_GAHBCFG_GLB_INTR_MASK BIT(0)
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#define USB_DW_DCTL_SFT_DISCON BIT(1)
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#define USB_DW_GINTSTS_WK_UP_INT BIT(31)
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#define USB_DW_GINTSTS_OEP_INT BIT(19)
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#define USB_DW_GINTSTS_IEP_INT BIT(18)
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#define USB_DW_GINTSTS_ENUM_DONE BIT(13)
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#define USB_DW_GINTSTS_USB_RST BIT(12)
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#define USB_DW_GINTSTS_USB_SUSP BIT(11)
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#define USB_DW_GINTSTS_RX_FLVL BIT(4)
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#define USB_DW_GINTSTS_OTG_INT BIT(2)
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#define USB_DW_DCFG_DEV_SPD_LS (0x2)
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#define USB_DW_DCFG_DEV_SPD_FS (0x3)
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#define USB_DW_DCFG_DEV_ADDR_MASK (0x7F << 4)
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#define USB_DW_DCFG_DEV_ADDR_OFFSET (4)
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#define USB_DW_DAINT_IN_EP_INT(ep) (1 << (ep))
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#define USB_DW_DAINT_OUT_EP_INT(ep) (0x10000 << (ep))
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#define USB_DW_DEPCTL_EP_ENA BIT(31)
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#define USB_DW_DEPCTL_EP_DIS BIT(30)
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#define USB_DW_DEPCTL_SETDOPID BIT(28)
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#define USB_DW_DEPCTL_SNAK BIT(27)
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#define USB_DW_DEPCTL_CNAK BIT(26)
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#define USB_DW_DEPCTL_STALL BIT(21)
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#define USB_DW_DEPCTL_EP_TYPE_MASK (0x3 << 18)
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#define USB_DW_DEPCTL_EP_TYPE_OFFSET (18)
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#define USB_DW_DEPCTL_EP_TYPE_CONTROL (0)
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#define USB_DW_DEPCTL_EP_TYPE_ISO (0x1)
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#define USB_DW_DEPCTL_EP_TYPE_BULK (0x2)
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#define USB_DW_DEPCTL_EP_TYPE_INTERRUPT (0x3)
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#define USB_DW_DEPCTL_USB_ACT_EP BIT(15)
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#define USB_DW_DEPCTL0_MSP_MASK (0x3)
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#define USB_DW_DEPCTL0_MSP_8 (0x3)
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#define USB_DW_DEPCTL0_MSP_16 (0x2)
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#define USB_DW_DEPCTL0_MSP_32 (0x1)
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#define USB_DW_DEPCTL0_MSP_64 (0)
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#define USB_DW_DEPCTLn_MSP_MASK (0x3FF)
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#define USB_DW_DEPCTL_MSP_OFFSET (0)
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#define USB_DW_DOEPTSIZ_SUP_CNT_MASK (0x3 << 29)
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#define USB_DW_DOEPTSIZ_SUP_CNT_OFFSET (29)
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#define USB_DW_DOEPTSIZ0_PKT_CNT_MASK (0x1 << 19)
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#define USB_DW_DOEPTSIZn_PKT_CNT_MASK (0x3FF << 19)
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#define USB_DW_DIEPTSIZ0_PKT_CNT_MASK (0x3 << 19)
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#define USB_DW_DIEPTSIZn_PKT_CNT_MASK (0x3FF << 19)
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#define USB_DW_DEPTSIZ_PKT_CNT_OFFSET (19)
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#define USB_DW_DEPTSIZ0_XFER_SIZE_MASK (0x7F)
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#define USB_DW_DEPTSIZn_XFER_SIZE_MASK (0x7FFFF)
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#define USB_DW_DEPTSIZ_XFER_SIZE_OFFSET (0)
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#define USB_DW_DIEPINT_XFER_COMPL BIT(0)
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#define USB_DW_DIEPINT_TX_FEMP BIT(7)
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#define USB_DW_DIEPINT_XFER_COMPL BIT(0)
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#define USB_DW_DOEPINT_SET_UP BIT(3)
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#define USB_DW_DOEPINT_XFER_COMPL BIT(0)
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#define USB_DW_DSTS_ENUM_SPD_MASK (0x3)
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#define USB_DW_DSTS_ENUM_SPD_OFFSET (1)
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#define USB_DW_DSTS_ENUM_LS (2)
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#define USB_DW_DSTS_ENUM_FS (3)
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#define USB_DW_GRXSTSR_EP_NUM_MASK (0xF << 0)
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#define USB_DW_GRXSTSR_PKT_STS_MASK (0xF << 17)
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#define USB_DW_GRXSTSR_PKT_STS_OFFSET (17)
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#define USB_DW_GRXSTSR_PKT_CNT_MASK (0x7FF << 4)
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#define USB_DW_GRXSTSR_PKT_CNT_OFFSET (4)
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#define USB_DW_GRXSTSR_PKT_STS_OUT_DATA (2)
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#define USB_DW_GRXSTSR_PKT_STS_OUT_DATA_DONE (3)
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#define USB_DW_GRXSTSR_PKT_STS_SETUP_DONE (4)
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#define USB_DW_GRXSTSR_PKT_STS_SETUP (6)
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#define USB_DW_DTXFSTS_TXF_SPC_AVAIL_MASK (0xFFFF)
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#define USB_DW_CORE_RST_TIMEOUT_US 10000
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#define USB_DW_PLL_TIMEOUT_US 100
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#if defined(CONFIG_SOC_QUARK_SE)
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#define USB_DW_BASE QM_USB_BASE
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#define USB_DW_IRQ QM_IRQ_USB_0
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#else
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#error "Unsupported board"
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#endif
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#define USB_DW_EP_FIFO(ep) (*(uint32_t *)(USB_DW_BASE + 0x1000 * (ep + 1)))
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/* USB register block base address */
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#define USB_DW ((struct usb_dw_reg *)USB_DW_BASE)
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#ifdef __cplusplus
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}
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#endif
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#endif /* __USB_DW_REGISTERS_H__ */
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