ext qmsi: Add USB base and interrupt defines
This commit should be reverted when these changes will become part of QMSI 1.1 release. Change-Id: I4cc91a10515906e3863bb9be59dbead53bd4a938 Signed-off-by: Adrian Bradianu <adrian.bradianu@windriver.com>
This commit is contained in:
parent
fca8eb8608
commit
6b88a6b945
1 changed files with 7 additions and 0 deletions
|
@ -1356,6 +1356,10 @@ extern qm_dma_reg_t *qm_dma[QM_DMA_NUM];
|
|||
#define QM_IRQ_PWM_0_MASK_OFFSET (10)
|
||||
#define QM_IRQ_PWM_0_VECTOR 45
|
||||
|
||||
#define QM_IRQ_USB_0 (10)
|
||||
#define QM_IRQ_USB_0_MASK_OFFSET (11)
|
||||
#define QM_IRQ_USB_0_VECTOR 46
|
||||
|
||||
#define QM_IRQ_SPI_MASTER_0 (2)
|
||||
#define QM_IRQ_SPI_MASTER_0_MASK_OFFSET (3)
|
||||
#define QM_IRQ_SPI_MASTER_0_VECTOR 38
|
||||
|
@ -1477,6 +1481,9 @@ extern qm_dma_reg_t *qm_dma[QM_DMA_NUM];
|
|||
#define OSC0_CFG1_SI_FREQ_SEL_MASK (0x00000300)
|
||||
#define OSC0_CFG1_SI_FREQ_SEL_OFFS (8)
|
||||
|
||||
/** USB register base address */
|
||||
#define QM_USB_BASE (0xB0500000)
|
||||
|
||||
/* USB PLL enable bit*/
|
||||
#define QM_USB_PLL_PDLD BIT(0)
|
||||
/* USB PLL has locked when this bit is 1*/
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue