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drivers/i2s_ll_stm32.c: pass proper PLLR param when setting I2S PLL

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The PLLR parameter in LL_RCC_PLLI2S_ConfigDomain_I2S() API should
be selected among the following list of (already shifted) values:

  *         @arg @ref LL_RCC_PLLI2SR_DIV_2
  *         @arg @ref LL_RCC_PLLI2SR_DIV_3
  *         @arg @ref LL_RCC_PLLI2SR_DIV_4
  *         @arg @ref LL_RCC_PLLI2SR_DIV_5
  *         @arg @ref LL_RCC_PLLI2SR_DIV_6
  *         @arg @ref LL_RCC_PLLI2SR_DIV_7

This commit fixes PR #12609.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
This commit is contained in:
Armando Visconti 2019-01-21 17:22:33 +01:00 • committed by Kumar Gala
commit fe6e3b330c
1 changed files with 4 additions and 1 deletions
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5
drivers/i2s/i2s_ll_stm32.c
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@ -109,6 +109,9 @@ static int i2s_stm32_enable_clock(struct device *dev)
#ifdef CONFIG_I2S_STM32_USE_PLLI2S_ENABLE #ifdef CONFIG_I2S_STM32_USE_PLLI2S_ENABLE
#define PLLI2S_MAX_MS_TIME 1 /* PLLI2S lock time is 300us max */ #define PLLI2S_MAX_MS_TIME 1 /* PLLI2S lock time is 300us max */
static u16_t plli2s_ms_count; static u16_t plli2s_ms_count;
#define _pllr(v) LL_RCC_PLLI2SR_DIV_ ## v
#define pllr(v) _pllr(v)
#endif #endif
static int i2s_stm32_set_clock(struct device *dev, u32_t bit_clk_freq) static int i2s_stm32_set_clock(struct device *dev, u32_t bit_clk_freq)
@ -127,7 +130,7 @@ static int i2s_stm32_set_clock(struct device *dev, u32_t bit_clk_freq)
LL_RCC_PLLI2S_ConfigDomain_I2S(pll_src, LL_RCC_PLLI2S_ConfigDomain_I2S(pll_src,
CONFIG_I2S_STM32_PLLI2S_PLLM, CONFIG_I2S_STM32_PLLI2S_PLLM,
CONFIG_I2S_STM32_PLLI2S_PLLN, CONFIG_I2S_STM32_PLLI2S_PLLN,
CONFIG_I2S_STM32_PLLI2S_PLLR); pllr(CONFIG_I2S_STM32_PLLI2S_PLLR));
LL_RCC_PLLI2S_Enable(); LL_RCC_PLLI2S_Enable();
/* wait until PLLI2S gets locked */ /* wait until PLLI2S gets locked */