Revert71ba2de7
: ext: stm32cube: stm32f4xx: shift I2SR field in PLLI2SCFGR register (ST Bug tracker ID: 50086) Revert9a893202
: ext: stm32cube: stm32f7xx: shift I2SR field in PLLI2SCFGR register (ST Bug tracker ID: 50108) This two commits were introduced to shift the PLLR parameter according to the PLL register field position. After analysis, it appears that function is actually correct, and issue was actually in parameters provided that didn't match the API. (see PR #12609) Signed-off-by: Armando Visconti <armando.visconti@st.com>
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4 changed files with 4 additions and 19 deletions
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@ -44,13 +44,6 @@ Patch List:
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drivers/include/stm32f4xx_hal_conf.h
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ST Bug tracker ID: NA. Not a stm32cube issue
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*Add correct shifting to I2SR field in PLLI2SCFGR register
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The I2SR field should be shifted by RCC_PLLI2SCFGR_PLLI2SR_Pos when the PLLI2SCFGR register
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is read or written.
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Impacted files:
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drivers/include/stm32f4xx_ll_rcc.h
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ST Bug tracker ID: 50086
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*Disable new CAN API and enable Legacy API
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A new CAN API has been delivered on recent F4 stm32cube.
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This new API breaks current CAN driver. Disable the new API and enable the
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@ -5685,7 +5685,7 @@ __STATIC_INLINE void LL_RCC_PLLI2S_ConfigDomain_I2S(uint32_t Source, uint32_t PL
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#else
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MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLM, PLLM);
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#endif /* RCC_PLLI2SCFGR_PLLI2SM */
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MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN | RCC_PLLI2SCFGR_PLLI2SR, PLLN << RCC_PLLI2SCFGR_PLLI2SN_Pos | PLLR << RCC_PLLI2SCFGR_PLLI2SR_Pos);
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MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN | RCC_PLLI2SCFGR_PLLI2SR, PLLN << RCC_PLLI2SCFGR_PLLI2SN_Pos | PLLR);
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}
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/**
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@ -5740,7 +5740,7 @@ __STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetQ(void)
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*/
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__STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetR(void)
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{
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return (uint32_t)(READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
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return (uint32_t)(READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SR));
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}
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#if defined(RCC_PLLI2SCFGR_PLLI2SP)
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@ -49,14 +49,6 @@ Patch List:
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ST Bug tracker ID: 13359
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*Add correct shifting to I2SR field in PLLI2SCFGR register
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The I2SR field should be shifted by RCC_PLLI2SCFGR_PLLI2SR_Pos when the PLLI2SCFGR register
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is read or written.
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Impacted files:
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drivers/include/stm32f7xx_ll_rcc.h
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ST Bug tracker ID: 50108
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*Disable new CAN API and enable Legacy API
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A new CAN API has been delivered on recent F7 stm32cube.
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This new API breaks current CAN driver. Disable the new API and enable the
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@ -4039,7 +4039,7 @@ __STATIC_INLINE void LL_RCC_PLLI2S_ConfigDomain_SPDIFRX(uint32_t Source, uint32_
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__STATIC_INLINE void LL_RCC_PLLI2S_ConfigDomain_I2S(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR)
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{
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MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM, Source | PLLM);
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MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN | RCC_PLLI2SCFGR_PLLI2SR, PLLN << RCC_PLLI2SCFGR_PLLI2SN_Pos | PLLR << RCC_PLLI2SCFGR_PLLI2SR_Pos);
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MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN | RCC_PLLI2SCFGR_PLLI2SR, PLLN << RCC_PLLI2SCFGR_PLLI2SN_Pos | PLLR);
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}
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/**
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@ -4090,7 +4090,7 @@ __STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetQ(void)
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*/
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__STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetR(void)
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{
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return (uint32_t)(READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SR >> RCC_PLLI2SCFGR_PLLI2SR_Pos));
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return (uint32_t)(READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SR));
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}
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#if defined(RCC_PLLI2SCFGR_PLLI2SP)
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