drivers/i2s_ll_stm32.c: pass proper PLLR param when setting I2S PLL
The PLLR parameter in LL_RCC_PLLI2S_ConfigDomain_I2S() API should be selected among the following list of (already shifted) values: * @arg @ref LL_RCC_PLLI2SR_DIV_2 * @arg @ref LL_RCC_PLLI2SR_DIV_3 * @arg @ref LL_RCC_PLLI2SR_DIV_4 * @arg @ref LL_RCC_PLLI2SR_DIV_5 * @arg @ref LL_RCC_PLLI2SR_DIV_6 * @arg @ref LL_RCC_PLLI2SR_DIV_7 This commit fixes PR #12609. Signed-off-by: Armando Visconti <armando.visconti@st.com>
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1 changed files with 4 additions and 1 deletions
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@ -109,6 +109,9 @@ static int i2s_stm32_enable_clock(struct device *dev)
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#ifdef CONFIG_I2S_STM32_USE_PLLI2S_ENABLE
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#define PLLI2S_MAX_MS_TIME 1 /* PLLI2S lock time is 300us max */
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static u16_t plli2s_ms_count;
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#define _pllr(v) LL_RCC_PLLI2SR_DIV_ ## v
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#define pllr(v) _pllr(v)
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#endif
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static int i2s_stm32_set_clock(struct device *dev, u32_t bit_clk_freq)
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@ -127,7 +130,7 @@ static int i2s_stm32_set_clock(struct device *dev, u32_t bit_clk_freq)
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LL_RCC_PLLI2S_ConfigDomain_I2S(pll_src,
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CONFIG_I2S_STM32_PLLI2S_PLLM,
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CONFIG_I2S_STM32_PLLI2S_PLLN,
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CONFIG_I2S_STM32_PLLI2S_PLLR);
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pllr(CONFIG_I2S_STM32_PLLI2S_PLLR));
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LL_RCC_PLLI2S_Enable();
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/* wait until PLLI2S gets locked */
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