michaelh/zephyr
1
0
Fork 0
Code Releases Activity

dts: Rename DT_HAS_NODE macro to DT_HAS_NODE_STATUS_OKAY

Browse source 
Rename DT_HAS_NODE to DT_HAS_NODE_STATUS_OKAY so the semantics are
clear.  As going forward DT_HAS_NODE will report if a NODE exists
regardless of its status.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2020-05-05 13:55:28 -05:00 • committed by Kumar Gala
commit fdd85d5ad7
166 changed files with 883 additions and 872 deletions
Download patch file Download diff file Expand all files Collapse all files

14
boards/arm/96b_argonkey/pinmux.c
View file

@ -14,23 +14,23 @@
/* pin assignments for 96boards Argonkey board */ /* pin assignments for 96boards Argonkey board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32F4_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32F4_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32F4_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32F4_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_I2C1_SCL}, {STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_I2C1_SCL},
{STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_I2C1_SDA}, {STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c2))
{STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_I2C2_SCL}, {STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_I2C2_SCL},
{STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C2_SDA}, {STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C2_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c3))
{STM32_PIN_PA8, STM32F4_PINMUX_FUNC_PA8_I2C3_SCL}, {STM32_PIN_PA8, STM32F4_PINMUX_FUNC_PA8_I2C3_SCL},
{STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_I2C3_SDA}, {STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_I2C3_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS | {STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS |
STM32_OSPEEDR_VERY_HIGH_SPEED}, STM32_OSPEEDR_VERY_HIGH_SPEED},
@ -40,7 +40,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_SPI2_NSS | {STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_SPI2_NSS |
STM32_OSPEEDR_VERY_HIGH_SPEED}, STM32_OSPEEDR_VERY_HIGH_SPEED},
@ -50,7 +50,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI}, {STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2s5)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2s5))
{STM32_PIN_PB0, STM32F4_PINMUX_FUNC_PB0_I2S5_CK}, {STM32_PIN_PB0, STM32F4_PINMUX_FUNC_PB0_I2S5_CK},
{STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_I2S5_SD}, {STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_I2S5_SD},
#endif #endif

4
boards/arm/96b_avenger96/pinmux.c
View file

@ -14,11 +14,11 @@
/* pin assignments for Avenger96 board */ /* pin assignments for Avenger96 board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(uart4)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(uart4))
{ STM32_PIN_PB2, STM32MP1X_PINMUX_FUNC_PB2_UART4_RX }, { STM32_PIN_PB2, STM32MP1X_PINMUX_FUNC_PB2_UART4_RX },
{ STM32_PIN_PD1, STM32MP1X_PINMUX_FUNC_PD1_UART4_TX }, { STM32_PIN_PD1, STM32MP1X_PINMUX_FUNC_PD1_UART4_TX },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(uart7)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(uart7))
{ STM32_PIN_PE7, STM32MP1X_PINMUX_FUNC_PE7_UART7_RX }, { STM32_PIN_PE7, STM32MP1X_PINMUX_FUNC_PE7_UART7_RX },
{ STM32_PIN_PE8, STM32MP1X_PINMUX_FUNC_PE8_UART7_TX }, { STM32_PIN_PE8, STM32MP1X_PINMUX_FUNC_PE8_UART7_TX },
#endif #endif

14
boards/arm/96b_carbon/pinmux.c
View file

@ -14,27 +14,27 @@
/* pin assignments for 96boards Carbon board */ /* pin assignments for 96boards Carbon board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32F4_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32F4_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32F4_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32F4_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart6)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart6))
{STM32_PIN_PC6, STM32F4_PINMUX_FUNC_PC6_USART6_TX}, {STM32_PIN_PC6, STM32F4_PINMUX_FUNC_PC6_USART6_TX},
{STM32_PIN_PC7, STM32F4_PINMUX_FUNC_PC7_USART6_RX}, {STM32_PIN_PC7, STM32F4_PINMUX_FUNC_PC7_USART6_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_I2C1_SCL}, {STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_I2C1_SCL},
{STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_I2C1_SDA}, {STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c2))
{STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_I2C2_SCL}, {STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_I2C2_SCL},
{STM32_PIN_PB3, STM32F4_PINMUX_FUNC_PB3_I2C2_SDA}, {STM32_PIN_PB3, STM32F4_PINMUX_FUNC_PB3_I2C2_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -42,7 +42,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_SPI2_NSS}, {STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */

4
boards/arm/96b_meerkat96/pinmux.c
View file

@ -11,7 +11,7 @@ static int meerakt96_pinmux_init(struct device *dev)
{ {
ARG_UNUSED(dev); ARG_UNUSED(dev);
#if DT_HAS_NODE(DT_NODELABEL(gpio1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(gpio1))
/* GPIO1_IO04 Mux Config */ /* GPIO1_IO04 Mux Config */
IOMUXC_LPSR_SW_MUX_CTL_PAD_GPIO1_IO04 = 0; IOMUXC_LPSR_SW_MUX_CTL_PAD_GPIO1_IO04 = 0;
IOMUXC_LPSR_SW_PAD_CTL_PAD_GPIO1_IO04 = 0; IOMUXC_LPSR_SW_PAD_CTL_PAD_GPIO1_IO04 = 0;
@ -26,7 +26,7 @@ static int meerakt96_pinmux_init(struct device *dev)
IOMUXC_LPSR_SW_PAD_CTL_PAD_GPIO1_IO07 = 0; IOMUXC_LPSR_SW_PAD_CTL_PAD_GPIO1_IO07 = 0;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(uart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(uart1))
IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA = IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA =
IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA_MUX_MODE(0); IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA_MUX_MODE(0);
IOMUXC_SW_MUX_CTL_PAD_UART1_TX_DATA = IOMUXC_SW_MUX_CTL_PAD_UART1_TX_DATA =

10
boards/arm/96b_neonkey/pinmux.c
View file

@ -14,23 +14,23 @@
/* pin assignments for 96boards Neonkey board */ /* pin assignments for 96boards Neonkey board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32F4_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32F4_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32F4_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32F4_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_I2C1_SCL}, {STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_I2C1_SCL},
{STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_I2C1_SDA}, {STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c2))
{STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_I2C2_SCL}, {STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_I2C2_SCL},
{STM32_PIN_PB3, STM32F4_PINMUX_FUNC_PB3_I2C2_SDA}, {STM32_PIN_PB3, STM32F4_PINMUX_FUNC_PB3_I2C2_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c3))
{STM32_PIN_PA8, STM32F4_PINMUX_FUNC_PA8_I2C3_SCL}, {STM32_PIN_PA8, STM32F4_PINMUX_FUNC_PA8_I2C3_SCL},
{STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_I2C3_SDA}, {STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_I2C3_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */

26
boards/arm/96b_stm32_sensor_mez/pinmux.c
View file

@ -14,31 +14,31 @@
/* pin assignments for 96b_stm32_sensor_mez board */ /* pin assignments for 96b_stm32_sensor_mez board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32F4_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32F4_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32F4_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32F4_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PD5, STM32F4_PINMUX_FUNC_PD5_USART2_TX}, {STM32_PIN_PD5, STM32F4_PINMUX_FUNC_PD5_USART2_TX},
{STM32_PIN_PD6, STM32F4_PINMUX_FUNC_PD6_USART2_RX}, {STM32_PIN_PD6, STM32F4_PINMUX_FUNC_PD6_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart3))
{STM32_PIN_PD8, STM32F4_PINMUX_FUNC_PD8_USART3_TX}, {STM32_PIN_PD8, STM32F4_PINMUX_FUNC_PD8_USART3_TX},
{STM32_PIN_PD9, STM32F4_PINMUX_FUNC_PD9_USART3_RX}, {STM32_PIN_PD9, STM32F4_PINMUX_FUNC_PD9_USART3_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(uart4)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(uart4))
{STM32_PIN_PC10, STM32F4_PINMUX_FUNC_PC10_UART4_TX}, {STM32_PIN_PC10, STM32F4_PINMUX_FUNC_PC10_UART4_TX},
{STM32_PIN_PC11, STM32F4_PINMUX_FUNC_PC11_UART4_RX}, {STM32_PIN_PC11, STM32F4_PINMUX_FUNC_PC11_UART4_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_I2C1_SCL}, {STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_I2C1_SCL},
{STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_I2C1_SDA}, {STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c2))
{STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_I2C2_SCL}, {STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_I2C2_SCL},
{STM32_PIN_PC12, STM32F4_PINMUX_FUNC_PC12_I2C2_SDA}, {STM32_PIN_PC12, STM32F4_PINMUX_FUNC_PC12_I2C2_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS | {STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS |
STM32_OSPEEDR_VERY_HIGH_SPEED}, STM32_OSPEEDR_VERY_HIGH_SPEED},
@ -48,7 +48,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_SPI2_NSS | {STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_SPI2_NSS |
STM32_OSPEEDR_VERY_HIGH_SPEED}, STM32_OSPEEDR_VERY_HIGH_SPEED},
@ -58,7 +58,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI}, {STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi4)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi4))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PE11, STM32F4_PINMUX_FUNC_PE11_SPI4_NSS | {STM32_PIN_PE11, STM32F4_PINMUX_FUNC_PE11_SPI4_NSS |
STM32_OSPEEDR_VERY_HIGH_SPEED}, STM32_OSPEEDR_VERY_HIGH_SPEED},
@ -68,19 +68,19 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PE13, STM32F4_PINMUX_FUNC_PE13_SPI4_MISO}, {STM32_PIN_PE13, STM32F4_PINMUX_FUNC_PE13_SPI4_MISO},
{STM32_PIN_PE14, STM32F4_PINMUX_FUNC_PE14_SPI4_MOSI}, {STM32_PIN_PE14, STM32F4_PINMUX_FUNC_PE14_SPI4_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2s2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2s2))
{STM32_PIN_PC7, STM32F4_PINMUX_FUNC_PC7_I2S2_CK}, {STM32_PIN_PC7, STM32F4_PINMUX_FUNC_PC7_I2S2_CK},
{STM32_PIN_PC1, STM32F4_PINMUX_FUNC_PC1_I2S2_SD}, {STM32_PIN_PC1, STM32F4_PINMUX_FUNC_PC1_I2S2_SD},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm3))
{ STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_PWM3_CH1 }, { STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_PWM3_CH1 },
{ STM32_PIN_PC8, STM32F4_PINMUX_FUNC_PC8_PWM3_CH3 }, { STM32_PIN_PC8, STM32F4_PINMUX_FUNC_PC8_PWM3_CH3 },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm4)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm4))
{ STM32_PIN_PD14, STM32F4_PINMUX_FUNC_PD14_PWM4_CH3 }, { STM32_PIN_PD14, STM32F4_PINMUX_FUNC_PD14_PWM4_CH3 },
{ STM32_PIN_PD15, STM32F4_PINMUX_FUNC_PD15_PWM4_CH4 }, { STM32_PIN_PD15, STM32F4_PINMUX_FUNC_PD15_PWM4_CH4 },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm9)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm9))
{ STM32_PIN_PE5, STM32F4_PINMUX_FUNC_PE5_PWM9_CH1 }, { STM32_PIN_PE5, STM32F4_PINMUX_FUNC_PE5_PWM9_CH1 },
{ STM32_PIN_PE6, STM32F4_PINMUX_FUNC_PE6_PWM9_CH2 }, { STM32_PIN_PE6, STM32F4_PINMUX_FUNC_PE6_PWM9_CH2 },
#endif #endif

8
boards/arm/96b_wistrio/pinmux.c
View file

@ -14,19 +14,19 @@
#include <pinmux/stm32/pinmux_stm32.h> #include <pinmux/stm32/pinmux_stm32.h>
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32L1X_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32L1X_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32L1X_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32L1X_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32L1X_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32L1X_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA15, STM32L1X_PINMUX_FUNC_PA15_USART2_RX}, {STM32_PIN_PA15, STM32L1X_PINMUX_FUNC_PA15_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32L1X_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32L1X_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32L1X_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32L1X_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
{STM32_PIN_PA5, STM32L1X_PINMUX_FUNC_PA5_SPI1_SCK | {STM32_PIN_PA5, STM32L1X_PINMUX_FUNC_PA5_SPI1_SCK |
STM32_OSPEEDR_VERY_HIGH_SPEED}, STM32_OSPEEDR_VERY_HIGH_SPEED},
{STM32_PIN_PA6, STM32L1X_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32L1X_PINMUX_FUNC_PA6_SPI1_MISO},

8
boards/arm/adafruit_feather_stm32f405/pinmux.c
View file

@ -14,15 +14,15 @@
/* pin assignments for Feather STM32F405 board */ /* pin assignments for Feather STM32F405 board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart3))
{STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_USART3_TX}, {STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_USART3_TX},
{STM32_PIN_PB11, STM32F4_PINMUX_FUNC_PB11_USART3_RX}, {STM32_PIN_PB11, STM32F4_PINMUX_FUNC_PB11_USART3_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_I2C1_SCL}, {STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_I2C1_SCL},
{STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_I2C1_SDA}, {STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA15, STM32F4_PINMUX_FUNC_PA15_SPI1_NSS | {STM32_PIN_PA15, STM32F4_PINMUX_FUNC_PA15_SPI1_NSS |
STM32_OSPEEDR_VERY_HIGH_SPEED}, STM32_OSPEEDR_VERY_HIGH_SPEED},
@ -32,7 +32,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PB5, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PB5, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
{STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_SPI2_SCK}, {STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI}, {STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI},

2
boards/arm/atsame54_xpro/pinmux.c
View file

@ -111,7 +111,7 @@ static int board_pinmux_init(struct device *dev)
pinmux_pin_set(muxa, 24, PINMUX_FUNC_H); pinmux_pin_set(muxa, 24, PINMUX_FUNC_H);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(gmac)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(gmac))
pinmux_pin_set(muxa, 14, PINMUX_FUNC_L); /* PA14 = GTXCK */ pinmux_pin_set(muxa, 14, PINMUX_FUNC_L); /* PA14 = GTXCK */
pinmux_pin_set(muxa, 17, PINMUX_FUNC_L); /* PA17 = GTXEN */ pinmux_pin_set(muxa, 17, PINMUX_FUNC_L); /* PA17 = GTXEN */
pinmux_pin_set(muxa, 18, PINMUX_FUNC_L); /* PA18 = GTX0 */ pinmux_pin_set(muxa, 18, PINMUX_FUNC_L); /* PA18 = GTX0 */

10
boards/arm/b_l072z_lrwan1/pinmux.c
View file

@ -14,15 +14,15 @@
/* pin assignments for STMicroelectronics B-L072Z-LRWAN1 Discovery board */ /* pin assignments for STMicroelectronics B-L072Z-LRWAN1 Discovery board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32L0_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32L0_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32L0_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32L0_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32L0_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32L0_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32L0_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32L0_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA15, STM32L0_PINMUX_FUNC_PA15_SPI1_NSS}, {STM32_PIN_PA15, STM32L0_PINMUX_FUNC_PA15_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -30,7 +30,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA6, STM32L0_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32L0_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32L0_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32L0_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32L0_PINMUX_FUNC_PB12_SPI2_NSS}, {STM32_PIN_PB12, STM32L0_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -38,7 +38,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB14, STM32L0_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32L0_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32L0_PINMUX_FUNC_PB15_SPI2_MOSI}, {STM32_PIN_PB15, STM32L0_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32L0_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32L0_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32L0_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32L0_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif

14
boards/arm/black_f407ve/pinmux.c
View file

@ -14,35 +14,35 @@
/* pin assignments for black_f407ve board */ /* pin assignments for black_f407ve board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_USART1_TX}, {STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_USART1_TX},
{STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_USART1_RX}, {STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm2))
{STM32_PIN_PA0, STM32F4_PINMUX_FUNC_PA0_PWM2_CH1}, {STM32_PIN_PA0, STM32F4_PINMUX_FUNC_PA0_PWM2_CH1},
#endif #endif
#ifdef CONFIG_USB_DC_STM32 #ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM}, {STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM},
{STM32_PIN_PA12, STM32F4_PINMUX_FUNC_PA12_OTG_FS_DP}, {STM32_PIN_PA12, STM32F4_PINMUX_FUNC_PA12_OTG_FS_DP},
#endif /* CONFIG_USB_DC_STM32 */ #endif /* CONFIG_USB_DC_STM32 */
#if DT_HAS_NODE(DT_NODELABEL(can1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(can1))
{STM32_PIN_PD0, STM32F4_PINMUX_FUNC_PD0_CAN1_RX}, {STM32_PIN_PD0, STM32F4_PINMUX_FUNC_PD0_CAN1_RX},
{STM32_PIN_PD1, STM32F4_PINMUX_FUNC_PD1_CAN1_TX}, {STM32_PIN_PD1, STM32F4_PINMUX_FUNC_PD1_CAN1_TX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(can2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(can2))
{STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_CAN2_RX}, {STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_CAN2_RX},
{STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_CAN2_TX}, {STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_CAN2_TX},
#endif /* CONFIG_CAN_2 */ #endif /* CONFIG_CAN_2 */
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
{STM32_PIN_PB3, STM32F4_PINMUX_FUNC_PB3_SPI1_SCK}, {STM32_PIN_PB3, STM32F4_PINMUX_FUNC_PB3_SPI1_SCK},
{STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_SPI1_MISO}, {STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_SPI1_MISO},
{STM32_PIN_PB5, STM32F4_PINMUX_FUNC_PB5_SPI1_MOSI}, {STM32_PIN_PB5, STM32F4_PINMUX_FUNC_PB5_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
{STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_SPI2_SCK}, {STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_SPI2_SCK},
{STM32_PIN_PC2, STM32F4_PINMUX_FUNC_PC2_SPI2_MISO}, {STM32_PIN_PC2, STM32F4_PINMUX_FUNC_PC2_SPI2_MISO},
{STM32_PIN_PC3, STM32F4_PINMUX_FUNC_PC3_SPI2_MOSI}, {STM32_PIN_PC3, STM32F4_PINMUX_FUNC_PC3_SPI2_MOSI},

14
boards/arm/black_f407zg_pro/pinmux.c
View file

@ -14,35 +14,35 @@
/* pin assignment for black_f407zg_pro board */ /* pin assignment for black_f407zg_pro board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_USART1_TX}, {STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_USART1_TX},
{STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_USART1_RX}, {STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm2))
{STM32_PIN_PA0, STM32F4_PINMUX_FUNC_PA0_PWM2_CH1}, {STM32_PIN_PA0, STM32F4_PINMUX_FUNC_PA0_PWM2_CH1},
#endif #endif
#ifdef CONFIG_USB_DC_STM32 #ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM}, {STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM},
{STM32_PIN_PA12, STM32F4_PINMUX_FUNC_PA12_OTG_FS_DP}, {STM32_PIN_PA12, STM32F4_PINMUX_FUNC_PA12_OTG_FS_DP},
#endif /* CONFIG_USB_DC_STM32 */ #endif /* CONFIG_USB_DC_STM32 */
#if DT_HAS_NODE(DT_NODELABEL(can1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(can1))
{STM32_PIN_PD0, STM32F4_PINMUX_FUNC_PD0_CAN1_RX}, {STM32_PIN_PD0, STM32F4_PINMUX_FUNC_PD0_CAN1_RX},
{STM32_PIN_PD1, STM32F4_PINMUX_FUNC_PD1_CAN1_TX}, {STM32_PIN_PD1, STM32F4_PINMUX_FUNC_PD1_CAN1_TX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(can2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(can2))
{STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_CAN2_RX}, {STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_CAN2_RX},
{STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_CAN2_TX}, {STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_CAN2_TX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
{STM32_PIN_PB3, STM32F4_PINMUX_FUNC_PB3_SPI1_SCK}, {STM32_PIN_PB3, STM32F4_PINMUX_FUNC_PB3_SPI1_SCK},
{STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_SPI1_MISO}, {STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_SPI1_MISO},
{STM32_PIN_PB5, STM32F4_PINMUX_FUNC_PB5_SPI1_MOSI}, {STM32_PIN_PB5, STM32F4_PINMUX_FUNC_PB5_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
{STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_SPI2_SCK}, {STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_SPI2_SCK},
{STM32_PIN_PC2, STM32F4_PINMUX_FUNC_PC2_SPI2_MISO}, {STM32_PIN_PC2, STM32F4_PINMUX_FUNC_PC2_SPI2_MISO},
{STM32_PIN_PC3, STM32F4_PINMUX_FUNC_PC3_SPI2_MOSI}, {STM32_PIN_PC3, STM32F4_PINMUX_FUNC_PC3_SPI2_MOSI},

22
boards/arm/colibri_imx7d_m4/pinmux.c
View file

@ -11,13 +11,13 @@ static int colibri_imx7d_m4_pinmux_init(struct device *dev)
{ {
ARG_UNUSED(dev); ARG_UNUSED(dev);
#if DT_HAS_NODE(DT_NODELABEL(gpio1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(gpio1))
/* GPIO1_IO02 Mux Config */ /* GPIO1_IO02 Mux Config */
IOMUXC_LPSR_SW_MUX_CTL_PAD_GPIO1_IO02 = 0; IOMUXC_LPSR_SW_MUX_CTL_PAD_GPIO1_IO02 = 0;
IOMUXC_LPSR_SW_PAD_CTL_PAD_GPIO1_IO02 = 0; IOMUXC_LPSR_SW_PAD_CTL_PAD_GPIO1_IO02 = 0;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(gpio2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(gpio2))
/* GPIO2_IO26 Mux Config */ /* GPIO2_IO26 Mux Config */
IOMUXC_SW_MUX_CTL_PAD_EPDC_GDRL = 5; IOMUXC_SW_MUX_CTL_PAD_EPDC_GDRL = 5;
IOMUXC_SW_PAD_CTL_PAD_EPDC_GDRL = IOMUXC_SW_PAD_CTL_PAD_EPDC_GDRL =
@ -26,7 +26,7 @@ static int colibri_imx7d_m4_pinmux_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_EPDC_GDRL_HYS_MASK; IOMUXC_SW_PAD_CTL_PAD_EPDC_GDRL_HYS_MASK;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(uart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(uart2))
IOMUXC_SW_MUX_CTL_PAD_UART2_RX_DATA = IOMUXC_SW_MUX_CTL_PAD_UART2_RX_DATA =
IOMUXC_SW_MUX_CTL_PAD_UART2_RX_DATA_MUX_MODE(0); IOMUXC_SW_MUX_CTL_PAD_UART2_RX_DATA_MUX_MODE(0);
IOMUXC_SW_MUX_CTL_PAD_UART2_TX_DATA = IOMUXC_SW_MUX_CTL_PAD_UART2_TX_DATA =
@ -48,7 +48,7 @@ static int colibri_imx7d_m4_pinmux_init(struct device *dev)
IOMUXC_UART2_RX_DATA_SELECT_INPUT_DAISY(3); IOMUXC_UART2_RX_DATA_SELECT_INPUT_DAISY(3);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
IOMUXC_SW_MUX_CTL_PAD_I2C1_SCL = IOMUXC_SW_MUX_CTL_PAD_I2C1_SCL =
IOMUXC_SW_MUX_CTL_PAD_I2C1_SCL_MUX_MODE(0) | IOMUXC_SW_MUX_CTL_PAD_I2C1_SCL_MUX_MODE(0) |
IOMUXC_SW_MUX_CTL_PAD_I2C1_SCL_SION_MASK; IOMUXC_SW_MUX_CTL_PAD_I2C1_SCL_SION_MASK;
@ -72,7 +72,7 @@ static int colibri_imx7d_m4_pinmux_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_I2C1_SDA_HYS_MASK; IOMUXC_SW_PAD_CTL_PAD_I2C1_SDA_HYS_MASK;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c2))
IOMUXC_SW_MUX_CTL_PAD_I2C2_SCL = IOMUXC_SW_MUX_CTL_PAD_I2C2_SCL =
IOMUXC_SW_MUX_CTL_PAD_I2C2_SCL_MUX_MODE(0) | IOMUXC_SW_MUX_CTL_PAD_I2C2_SCL_MUX_MODE(0) |
IOMUXC_SW_MUX_CTL_PAD_I2C2_SCL_SION_MASK; IOMUXC_SW_MUX_CTL_PAD_I2C2_SCL_SION_MASK;
@ -96,7 +96,7 @@ static int colibri_imx7d_m4_pinmux_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_I2C2_SDA_HYS_MASK; IOMUXC_SW_PAD_CTL_PAD_I2C2_SDA_HYS_MASK;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c3))
IOMUXC_SW_MUX_CTL_PAD_I2C3_SCL = IOMUXC_SW_MUX_CTL_PAD_I2C3_SCL =
IOMUXC_SW_MUX_CTL_PAD_I2C3_SCL_MUX_MODE(0) | IOMUXC_SW_MUX_CTL_PAD_I2C3_SCL_MUX_MODE(0) |
IOMUXC_SW_MUX_CTL_PAD_I2C3_SCL_SION_MASK; IOMUXC_SW_MUX_CTL_PAD_I2C3_SCL_SION_MASK;
@ -120,7 +120,7 @@ static int colibri_imx7d_m4_pinmux_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_I2C3_SDA_HYS_MASK; IOMUXC_SW_PAD_CTL_PAD_I2C3_SDA_HYS_MASK;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c4)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c4))
IOMUXC_SW_MUX_CTL_PAD_ENET1_RGMII_TD2 = IOMUXC_SW_MUX_CTL_PAD_ENET1_RGMII_TD2 =
IOMUXC_SW_MUX_CTL_PAD_ENET1_RGMII_TD2_MUX_MODE(3) | IOMUXC_SW_MUX_CTL_PAD_ENET1_RGMII_TD2_MUX_MODE(3) |
IOMUXC_SW_MUX_CTL_PAD_ENET1_RGMII_TD2_SION_MASK; IOMUXC_SW_MUX_CTL_PAD_ENET1_RGMII_TD2_SION_MASK;
@ -144,7 +144,7 @@ static int colibri_imx7d_m4_pinmux_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_ENET1_RGMII_TD3_HYS_MASK; IOMUXC_SW_PAD_CTL_PAD_ENET1_RGMII_TD3_HYS_MASK;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm1))
IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO08 = IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO08 =
IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO08_MUX_MODE(7); IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO08_MUX_MODE(7);
IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO08 = IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO08 =
@ -154,7 +154,7 @@ static int colibri_imx7d_m4_pinmux_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO08_HYS_MASK; IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO08_HYS_MASK;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm2))
IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO09 = IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO09 =
IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO09_MUX_MODE(7); IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO09_MUX_MODE(7);
IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO09 = IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO09 =
@ -164,7 +164,7 @@ static int colibri_imx7d_m4_pinmux_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO09_HYS_MASK; IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO09_HYS_MASK;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm3))
IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO10 = IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO10 =
IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO10_MUX_MODE(7); IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO10_MUX_MODE(7);
IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO10 = IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO10 =
@ -174,7 +174,7 @@ static int colibri_imx7d_m4_pinmux_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO10_HYS_MASK; IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO10_HYS_MASK;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm4)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm4))
IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO11 = IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO11 =
IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO11_MUX_MODE(7); IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO11_MUX_MODE(7);
IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO11 = IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO11 =

16
boards/arm/disco_l475_iot1/pinmux.c
View file

@ -14,40 +14,40 @@
/* pin assignments for Disco L475 IOT1 board */ /* pin assignments for Disco L475 IOT1 board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PB6, STM32L4X_PINMUX_FUNC_PB6_USART1_TX}, {STM32_PIN_PB6, STM32L4X_PINMUX_FUNC_PB6_USART1_TX},
{STM32_PIN_PB7, STM32L4X_PINMUX_FUNC_PB7_USART1_RX}, {STM32_PIN_PB7, STM32L4X_PINMUX_FUNC_PB7_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(uart4)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(uart4))
{STM32_PIN_PA0, STM32L4X_PINMUX_FUNC_PA0_UART4_TX}, {STM32_PIN_PA0, STM32L4X_PINMUX_FUNC_PA0_UART4_TX},
{STM32_PIN_PA1, STM32L4X_PINMUX_FUNC_PA1_UART4_RX}, {STM32_PIN_PA1, STM32L4X_PINMUX_FUNC_PA1_UART4_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32L4X_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32L4X_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32L4X_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32L4X_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c2))
/* I2C2 is used for NFC, STSAFE, ToF & MEMS sensors */ /* I2C2 is used for NFC, STSAFE, ToF & MEMS sensors */
{STM32_PIN_PB10, STM32L4X_PINMUX_FUNC_PB10_I2C2_SCL}, {STM32_PIN_PB10, STM32L4X_PINMUX_FUNC_PB10_I2C2_SCL},
{STM32_PIN_PB11, STM32L4X_PINMUX_FUNC_PB11_I2C2_SDA}, {STM32_PIN_PB11, STM32L4X_PINMUX_FUNC_PB11_I2C2_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c3))
{STM32_PIN_PC0, STM32L4X_PINMUX_FUNC_PC0_I2C3_SCL}, {STM32_PIN_PC0, STM32L4X_PINMUX_FUNC_PC0_I2C3_SCL},
{STM32_PIN_PC1, STM32L4X_PINMUX_FUNC_PC1_I2C3_SDA}, {STM32_PIN_PC1, STM32L4X_PINMUX_FUNC_PC1_I2C3_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
{STM32_PIN_PA5, STM32L4X_PINMUX_FUNC_PA5_SPI1_SCK}, {STM32_PIN_PA5, STM32L4X_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi3))
/* SPI3 is used for BT/WIFI, Sub GHZ communication */ /* SPI3 is used for BT/WIFI, Sub GHZ communication */
{STM32_PIN_PC10, STM32L4X_PINMUX_FUNC_PC10_SPI3_SCK}, {STM32_PIN_PC10, STM32L4X_PINMUX_FUNC_PC10_SPI3_SCK},
{STM32_PIN_PC11, STM32L4X_PINMUX_FUNC_PC11_SPI3_MISO | \ {STM32_PIN_PC11, STM32L4X_PINMUX_FUNC_PC11_SPI3_MISO | \
STM32_OSPEEDR_VERY_HIGH_SPEED}, STM32_OSPEEDR_VERY_HIGH_SPEED},
{STM32_PIN_PC12, STM32L4X_PINMUX_FUNC_PC12_SPI3_MOSI}, {STM32_PIN_PC12, STM32L4X_PINMUX_FUNC_PC12_SPI3_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm2))
{STM32_PIN_PA15, STM32L4X_PINMUX_FUNC_PA15_PWM2_CH1}, {STM32_PIN_PA15, STM32L4X_PINMUX_FUNC_PA15_PWM2_CH1},
#endif #endif
#ifdef CONFIG_USB_DC_STM32 #ifdef CONFIG_USB_DC_STM32

4
boards/arm/dragino_lsn50/pinmux.c
View file

@ -14,11 +14,11 @@
/* pin assignments for Dragino LSN50 board */ /* pin assignments for Dragino LSN50 board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PB6, STM32L0_PINMUX_FUNC_PB6_USART1_TX}, {STM32_PIN_PB6, STM32L0_PINMUX_FUNC_PB6_USART1_TX},
{STM32_PIN_PB7, STM32L0_PINMUX_FUNC_PB7_USART1_RX}, {STM32_PIN_PB7, STM32L0_PINMUX_FUNC_PB7_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32L0_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32L0_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32L0_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32L0_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif

10
boards/arm/frdm_k22f/pinmux.c
View file

@ -33,17 +33,17 @@ static int frdm_k22f_pinmux_init(struct device *dev)
device_get_binding(CONFIG_PINMUX_MCUX_PORTE_NAME); device_get_binding(CONFIG_PINMUX_MCUX_PORTE_NAME);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(uart0)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(uart0))
#error "No UART0 is used" #error "No UART0 is used"
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(uart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(uart1))
/* UART1 RX, TX */ /* UART1 RX, TX */
pinmux_pin_set(porte, 0, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(porte, 0, PORT_PCR_MUX(kPORT_MuxAlt3));
pinmux_pin_set(porte, 1, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(porte, 1, PORT_PCR_MUX(kPORT_MuxAlt3));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(uart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(uart2))
/* UART2 RX, TX */ /* UART2 RX, TX */
pinmux_pin_set(portd, 2, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portd, 2, PORT_PCR_MUX(kPORT_MuxAlt3));
pinmux_pin_set(portd, 3, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portd, 3, PORT_PCR_MUX(kPORT_MuxAlt3));
@ -64,7 +64,7 @@ static int frdm_k22f_pinmux_init(struct device *dev)
pinmux_pin_set(porta, 2, PORT_PCR_MUX(kPORT_MuxAsGpio)); pinmux_pin_set(porta, 2, PORT_PCR_MUX(kPORT_MuxAsGpio));
pinmux_pin_set(portd, 5, PORT_PCR_MUX(kPORT_MuxAsGpio)); pinmux_pin_set(portd, 5, PORT_PCR_MUX(kPORT_MuxAsGpio));
#if DT_HAS_NODE(DT_NODELABEL(spi0)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi0))
/* SPI0 CS0, SCK, SOUT, SIN */ /* SPI0 CS0, SCK, SOUT, SIN */
pinmux_pin_set(portd, 4, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(portd, 4, PORT_PCR_MUX(kPORT_MuxAlt2));
pinmux_pin_set(portd, 1, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(portd, 1, PORT_PCR_MUX(kPORT_MuxAlt2));
@ -73,7 +73,7 @@ static int frdm_k22f_pinmux_init(struct device *dev)
pinmux_pin_set(portc, 11, PORT_PCR_MUX(kPORT_MuxAsGpio)); pinmux_pin_set(portc, 11, PORT_PCR_MUX(kPORT_MuxAsGpio));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c0)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c0))
/* I2C0 SCL, SDA */ /* I2C0 SCL, SDA */
pinmux_pin_set(portb, 2, PORT_PCR_MUX(kPORT_MuxAlt2) pinmux_pin_set(portb, 2, PORT_PCR_MUX(kPORT_MuxAlt2)
| PORT_PCR_ODE_MASK); | PORT_PCR_ODE_MASK);

18
boards/arm/frdm_k64f/pinmux.c
View file

@ -33,13 +33,13 @@ static int frdm_k64f_pinmux_init(struct device *dev)
device_get_binding(CONFIG_PINMUX_MCUX_PORTE_NAME); device_get_binding(CONFIG_PINMUX_MCUX_PORTE_NAME);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(uart0)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(uart0))
/* UART0 RX, TX */ /* UART0 RX, TX */
pinmux_pin_set(portb, 16, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portb, 16, PORT_PCR_MUX(kPORT_MuxAlt3));
pinmux_pin_set(portb, 17, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portb, 17, PORT_PCR_MUX(kPORT_MuxAlt3));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(uart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(uart2))
/* UART2 RX, TX */ /* UART2 RX, TX */
pinmux_pin_set(portd, 0, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portd, 0, PORT_PCR_MUX(kPORT_MuxAlt3));
pinmux_pin_set(portd, 1, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portd, 1, PORT_PCR_MUX(kPORT_MuxAlt3));
@ -47,7 +47,7 @@ static int frdm_k64f_pinmux_init(struct device *dev)
pinmux_pin_set(portd, 3, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portd, 3, PORT_PCR_MUX(kPORT_MuxAlt3));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(uart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(uart3))
/* UART3 RX, TX */ /* UART3 RX, TX */
pinmux_pin_set(portc, 16, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portc, 16, PORT_PCR_MUX(kPORT_MuxAlt3));
pinmux_pin_set(portc, 17, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portc, 17, PORT_PCR_MUX(kPORT_MuxAlt3));
@ -101,7 +101,7 @@ static int frdm_k64f_pinmux_init(struct device *dev)
pinmux_pin_set(portb, 9, PORT_PCR_MUX(kPORT_MuxAsGpio)); pinmux_pin_set(portb, 9, PORT_PCR_MUX(kPORT_MuxAsGpio));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi0)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi0))
/* SPI0 CS0, SCK, SOUT, SIN */ /* SPI0 CS0, SCK, SOUT, SIN */
pinmux_pin_set(portd, 0, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(portd, 0, PORT_PCR_MUX(kPORT_MuxAlt2));
pinmux_pin_set(portd, 1, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(portd, 1, PORT_PCR_MUX(kPORT_MuxAlt2));
@ -109,7 +109,7 @@ static int frdm_k64f_pinmux_init(struct device *dev)
pinmux_pin_set(portd, 3, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(portd, 3, PORT_PCR_MUX(kPORT_MuxAlt2));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c0)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c0))
/* I2C0 SCL, SDA */ /* I2C0 SCL, SDA */
pinmux_pin_set(porte, 24, PORT_PCR_MUX(kPORT_MuxAlt5) pinmux_pin_set(porte, 24, PORT_PCR_MUX(kPORT_MuxAlt5)
| PORT_PCR_ODE_MASK); | PORT_PCR_ODE_MASK);
@ -117,18 +117,18 @@ static int frdm_k64f_pinmux_init(struct device *dev)
| PORT_PCR_ODE_MASK); | PORT_PCR_ODE_MASK);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(adc1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(adc1))
/* ADC1_SE14 */ /* ADC1_SE14 */
pinmux_pin_set(portb, 10, PORT_PCR_MUX(kPORT_PinDisabledOrAnalog)); pinmux_pin_set(portb, 10, PORT_PCR_MUX(kPORT_PinDisabledOrAnalog));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(ftm3)) && \ #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(ftm3)) && \
DT_NODE_HAS_COMPAT(DT_NODELABEL(ftm3), nxp_kinetis_ftm_pwm) DT_NODE_HAS_COMPAT(DT_NODELABEL(ftm3), nxp_kinetis_ftm_pwm)
pinmux_pin_set(portc, 8, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portc, 8, PORT_PCR_MUX(kPORT_MuxAlt3));
pinmux_pin_set(portc, 9, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portc, 9, PORT_PCR_MUX(kPORT_MuxAlt3));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(enet)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(enet))
pinmux_pin_set(porta, 5, PORT_PCR_MUX(kPORT_MuxAlt4)); pinmux_pin_set(porta, 5, PORT_PCR_MUX(kPORT_MuxAlt4));
pinmux_pin_set(porta, 12, PORT_PCR_MUX(kPORT_MuxAlt4)); pinmux_pin_set(porta, 12, PORT_PCR_MUX(kPORT_MuxAlt4));
pinmux_pin_set(porta, 13, PORT_PCR_MUX(kPORT_MuxAlt4)); pinmux_pin_set(porta, 13, PORT_PCR_MUX(kPORT_MuxAlt4));
@ -149,7 +149,7 @@ static int frdm_k64f_pinmux_init(struct device *dev)
pinmux_pin_set(portc, 19, PORT_PCR_MUX(kPORT_MuxAlt4)); pinmux_pin_set(portc, 19, PORT_PCR_MUX(kPORT_MuxAlt4));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(flexcan0)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(flexcan0))
/* FlexCAN0 RX, TX */ /* FlexCAN0 RX, TX */
pinmux_pin_set(portb, 18, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(portb, 18, PORT_PCR_MUX(kPORT_MuxAlt2));
pinmux_pin_set(portb, 19, PORT_PCR_MUX(kPORT_MuxAlt2) | pinmux_pin_set(portb, 19, PORT_PCR_MUX(kPORT_MuxAlt2) |

8
boards/arm/frdm_k82f/pinmux.c
View file

@ -33,7 +33,7 @@ static int frdm_k82f_pinmux_init(struct device *dev)
device_get_binding(CONFIG_PINMUX_MCUX_PORTE_NAME); device_get_binding(CONFIG_PINMUX_MCUX_PORTE_NAME);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(ftm3)) && \ #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(ftm3)) && \
DT_NODE_HAS_COMPAT(DT_NODELABEL(ftm3), nxp_kinetis_ftm_pwm) DT_NODE_HAS_COMPAT(DT_NODELABEL(ftm3), nxp_kinetis_ftm_pwm)
/* Red, green, blue LEDs as PWM channels */ /* Red, green, blue LEDs as PWM channels */
pinmux_pin_set(portc, 8, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portc, 8, PORT_PCR_MUX(kPORT_MuxAlt3));
@ -53,7 +53,7 @@ static int frdm_k82f_pinmux_init(struct device *dev)
/* FXOS8700 INT1 */ /* FXOS8700 INT1 */
pinmux_pin_set(portc, 13, PORT_PCR_MUX(kPORT_MuxAsGpio)); pinmux_pin_set(portc, 13, PORT_PCR_MUX(kPORT_MuxAsGpio));
#if DT_HAS_NODE(DT_NODELABEL(i2c3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c3))
/* I2C3 SDA, SCL */ /* I2C3 SDA, SCL */
pinmux_pin_set(porta, 1, PORT_PCR_MUX(kPORT_MuxAlt4) pinmux_pin_set(porta, 1, PORT_PCR_MUX(kPORT_MuxAlt4)
| PORT_PCR_ODE_MASK); | PORT_PCR_ODE_MASK);
@ -61,7 +61,7 @@ static int frdm_k82f_pinmux_init(struct device *dev)
| PORT_PCR_ODE_MASK); | PORT_PCR_ODE_MASK);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
/* SPI1 SCK, SOUT, SIN, PCS0 */ /* SPI1 SCK, SOUT, SIN, PCS0 */
pinmux_pin_set(porte, 1, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(porte, 1, PORT_PCR_MUX(kPORT_MuxAlt2));
pinmux_pin_set(porte, 2, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(porte, 2, PORT_PCR_MUX(kPORT_MuxAlt2));
@ -72,7 +72,7 @@ static int frdm_k82f_pinmux_init(struct device *dev)
pinmux_pin_set(porte, 3, PORT_PCR_MUX(kPORT_MuxAsGpio)); pinmux_pin_set(porte, 3, PORT_PCR_MUX(kPORT_MuxAsGpio));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpuart4)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpuart4))
/* LPUART4 RX, TX */ /* LPUART4 RX, TX */
pinmux_pin_set(portc, 14, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portc, 14, PORT_PCR_MUX(kPORT_MuxAlt3));
pinmux_pin_set(portc, 15, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portc, 15, PORT_PCR_MUX(kPORT_MuxAlt3));

6
boards/arm/frdm_kl25z/pinmux.c
View file

@ -33,7 +33,7 @@ static int frdm_kl25z_pinmux_init(struct device *dev)
device_get_binding(CONFIG_PINMUX_MCUX_PORTE_NAME); device_get_binding(CONFIG_PINMUX_MCUX_PORTE_NAME);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(uart0)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(uart0))
/* UART0 RX, TX */ /* UART0 RX, TX */
pinmux_pin_set(porta, 1, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(porta, 1, PORT_PCR_MUX(kPORT_MuxAlt2));
pinmux_pin_set(porta, 2, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(porta, 2, PORT_PCR_MUX(kPORT_MuxAlt2));
@ -52,7 +52,7 @@ static int frdm_kl25z_pinmux_init(struct device *dev)
pinmux_pin_set(porta, 14, PORT_PCR_MUX(kPORT_MuxAsGpio)); pinmux_pin_set(porta, 14, PORT_PCR_MUX(kPORT_MuxAsGpio));
pinmux_pin_set(porta, 15, PORT_PCR_MUX(kPORT_MuxAsGpio)); pinmux_pin_set(porta, 15, PORT_PCR_MUX(kPORT_MuxAsGpio));
#if DT_HAS_NODE(DT_NODELABEL(i2c0)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c0))
/* I2C0 SCL, SDA */ /* I2C0 SCL, SDA */
pinmux_pin_set(porte, 24, PORT_PCR_MUX(kPORT_MuxAlt5) pinmux_pin_set(porte, 24, PORT_PCR_MUX(kPORT_MuxAlt5)
| PORT_PCR_PS_MASK); | PORT_PCR_PS_MASK);
@ -60,7 +60,7 @@ static int frdm_kl25z_pinmux_init(struct device *dev)
| PORT_PCR_PS_MASK); | PORT_PCR_PS_MASK);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(adc0)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(adc0))
/* ADC0_SE12 */ /* ADC0_SE12 */
pinmux_pin_set(portb, 2, PORT_PCR_MUX(kPORT_PinDisabledOrAnalog)); pinmux_pin_set(portb, 2, PORT_PCR_MUX(kPORT_PinDisabledOrAnalog));
#endif #endif

8
boards/arm/frdm_kw41z/pinmux.c
View file

@ -32,7 +32,7 @@ static int frdm_kw41z_pinmux_init(struct device *dev)
pinmux_pin_set(porta, 19, PORT_PCR_MUX(kPORT_MuxAsGpio)); pinmux_pin_set(porta, 19, PORT_PCR_MUX(kPORT_MuxAsGpio));
pinmux_pin_set(porta, 18, PORT_PCR_MUX(kPORT_MuxAsGpio)); pinmux_pin_set(porta, 18, PORT_PCR_MUX(kPORT_MuxAsGpio));
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
/* I2C1 SCL, SDA */ /* I2C1 SCL, SDA */
pinmux_pin_set(portc, 2, PORT_PCR_MUX(kPORT_MuxAlt3) pinmux_pin_set(portc, 2, PORT_PCR_MUX(kPORT_MuxAlt3)
| PORT_PCR_PS_MASK); | PORT_PCR_PS_MASK);
@ -40,7 +40,7 @@ static int frdm_kw41z_pinmux_init(struct device *dev)
| PORT_PCR_PS_MASK); | PORT_PCR_PS_MASK);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(adc0)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(adc0))
/* ADC0_SE3 */ /* ADC0_SE3 */
pinmux_pin_set(portb, 2, PORT_PCR_MUX(kPORT_PinDisabledOrAnalog)); pinmux_pin_set(portb, 2, PORT_PCR_MUX(kPORT_PinDisabledOrAnalog));
#endif #endif
@ -49,13 +49,13 @@ static int frdm_kw41z_pinmux_init(struct device *dev)
pinmux_pin_set(portc, 4, PORT_PCR_MUX(kPORT_MuxAsGpio)); pinmux_pin_set(portc, 4, PORT_PCR_MUX(kPORT_MuxAsGpio));
pinmux_pin_set(portc, 5, PORT_PCR_MUX(kPORT_MuxAsGpio)); pinmux_pin_set(portc, 5, PORT_PCR_MUX(kPORT_MuxAsGpio));
#if DT_HAS_NODE(DT_NODELABEL(lpuart0)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpuart0))
/* UART0 RX, TX */ /* UART0 RX, TX */
pinmux_pin_set(portc, 6, PORT_PCR_MUX(kPORT_MuxAlt4)); pinmux_pin_set(portc, 6, PORT_PCR_MUX(kPORT_MuxAlt4));
pinmux_pin_set(portc, 7, PORT_PCR_MUX(kPORT_MuxAlt4)); pinmux_pin_set(portc, 7, PORT_PCR_MUX(kPORT_MuxAlt4));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi0)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi0))
/* SPI0 CS0, SCK, SOUT, SIN */ /* SPI0 CS0, SCK, SOUT, SIN */
pinmux_pin_set(portc, 16, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(portc, 16, PORT_PCR_MUX(kPORT_MuxAlt2));
pinmux_pin_set(portc, 17, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(portc, 17, PORT_PCR_MUX(kPORT_MuxAlt2));

6
boards/arm/google_kukui/pinmux.c
View file

@ -13,15 +13,15 @@
#include <pinmux/stm32/pinmux_stm32.h> #include <pinmux/stm32/pinmux_stm32.h>
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32F0_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32F0_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32F0_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32F0_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32F0_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32F0_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32F0_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32F0_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c2))
{STM32_PIN_PA11, STM32F0_PINMUX_FUNC_PA11_I2C2_SCL}, {STM32_PIN_PA11, STM32F0_PINMUX_FUNC_PA11_I2C2_SCL},
{STM32_PIN_PA12, STM32F0_PINMUX_FUNC_PA12_I2C2_SDA}, {STM32_PIN_PA12, STM32F0_PINMUX_FUNC_PA12_I2C2_SDA},
#endif #endif

12
boards/arm/hexiwear_k64/pinmux.c
View file

@ -30,7 +30,7 @@ static int hexiwear_k64_pinmux_init(struct device *dev)
device_get_binding(CONFIG_PINMUX_MCUX_PORTE_NAME); device_get_binding(CONFIG_PINMUX_MCUX_PORTE_NAME);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(ftm3)) && \ #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(ftm3)) && \
DT_NODE_HAS_COMPAT(DT_NODELABEL(ftm3), nxp_kinetis_ftm_pwm) DT_NODE_HAS_COMPAT(DT_NODELABEL(ftm3), nxp_kinetis_ftm_pwm)
/* Red, green, blue LEDs as PWM channels */ /* Red, green, blue LEDs as PWM channels */
pinmux_pin_set(portc, 8, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portc, 8, PORT_PCR_MUX(kPORT_MuxAlt3));
@ -43,7 +43,7 @@ static int hexiwear_k64_pinmux_init(struct device *dev)
pinmux_pin_set(portd, 0, PORT_PCR_MUX(kPORT_MuxAsGpio)); pinmux_pin_set(portd, 0, PORT_PCR_MUX(kPORT_MuxAsGpio));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c0)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c0))
/* I2C0 SCL, SDA - heart rate, light, humidity */ /* I2C0 SCL, SDA - heart rate, light, humidity */
pinmux_pin_set(portb, 0, PORT_PCR_MUX(kPORT_MuxAlt2) pinmux_pin_set(portb, 0, PORT_PCR_MUX(kPORT_MuxAlt2)
| PORT_PCR_ODE_MASK); | PORT_PCR_ODE_MASK);
@ -59,7 +59,7 @@ static int hexiwear_k64_pinmux_init(struct device *dev)
gpio_pin_configure(gpiob, 12, GPIO_OUTPUT_LOW); gpio_pin_configure(gpiob, 12, GPIO_OUTPUT_LOW);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
/* I2C1 SCL, SDA - accel/mag, gyro, pressure */ /* I2C1 SCL, SDA - accel/mag, gyro, pressure */
pinmux_pin_set(portc, 10, PORT_PCR_MUX(kPORT_MuxAlt2) pinmux_pin_set(portc, 10, PORT_PCR_MUX(kPORT_MuxAlt2)
| PORT_PCR_ODE_MASK); | PORT_PCR_ODE_MASK);
@ -72,19 +72,19 @@ static int hexiwear_k64_pinmux_init(struct device *dev)
/* FXOS8700 INT2 */ /* FXOS8700 INT2 */
pinmux_pin_set(portd, 13, PORT_PCR_MUX(kPORT_MuxAsGpio)); pinmux_pin_set(portd, 13, PORT_PCR_MUX(kPORT_MuxAsGpio));
#if DT_HAS_NODE(DT_NODELABEL(uart0)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(uart0))
/* UART0 RX, TX */ /* UART0 RX, TX */
pinmux_pin_set(portb, 16, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portb, 16, PORT_PCR_MUX(kPORT_MuxAlt3));
pinmux_pin_set(portb, 17, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portb, 17, PORT_PCR_MUX(kPORT_MuxAlt3));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(uart4)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(uart4))
/* UART4 RX, TX - BLE */ /* UART4 RX, TX - BLE */
pinmux_pin_set(porte, 24, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(porte, 24, PORT_PCR_MUX(kPORT_MuxAlt3));
pinmux_pin_set(porte, 25, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(porte, 25, PORT_PCR_MUX(kPORT_MuxAlt3));
#endif #endif
#if defined(CONFIG_MAX30101) && DT_HAS_NODE(DT_NODELABEL(gpioa)) #if defined(CONFIG_MAX30101) && DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(gpioa))
struct device *porta = struct device *porta =
device_get_binding(CONFIG_PINMUX_MCUX_PORTA_NAME); device_get_binding(CONFIG_PINMUX_MCUX_PORTA_NAME);

6
boards/arm/hexiwear_kw40z/pinmux.c
View file

@ -22,13 +22,13 @@ static int hexiwear_kw40z_pinmux_init(struct device *dev)
device_get_binding(CONFIG_PINMUX_MCUX_PORTC_NAME); device_get_binding(CONFIG_PINMUX_MCUX_PORTC_NAME);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpuart0)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpuart0))
/* UART0 RX, TX */ /* UART0 RX, TX */
pinmux_pin_set(portc, 6, PORT_PCR_MUX(kPORT_MuxAlt4)); pinmux_pin_set(portc, 6, PORT_PCR_MUX(kPORT_MuxAlt4));
pinmux_pin_set(portc, 7, PORT_PCR_MUX(kPORT_MuxAlt4)); pinmux_pin_set(portc, 7, PORT_PCR_MUX(kPORT_MuxAlt4));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
/* I2C1 SCL, SDA */ /* I2C1 SCL, SDA */
pinmux_pin_set(portc, 6, PORT_PCR_MUX(kPORT_MuxAlt3) pinmux_pin_set(portc, 6, PORT_PCR_MUX(kPORT_MuxAlt3)
| PORT_PCR_PS_MASK); | PORT_PCR_PS_MASK);
@ -36,7 +36,7 @@ static int hexiwear_kw40z_pinmux_init(struct device *dev)
| PORT_PCR_PS_MASK); | PORT_PCR_PS_MASK);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(adc0)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(adc0))
/* ADC0_SE1 */ /* ADC0_SE1 */
pinmux_pin_set(portb, 1, PORT_PCR_MUX(kPORT_PinDisabledOrAnalog)); pinmux_pin_set(portb, 1, PORT_PCR_MUX(kPORT_PinDisabledOrAnalog));
#endif #endif

10
boards/arm/lpcxpresso54114/pinmux.c
View file

@ -23,7 +23,7 @@ static int lpcxpresso_54114_pinmux_init(struct device *dev)
device_get_binding(CONFIG_PINMUX_MCUX_LPC_PORT1_NAME); device_get_binding(CONFIG_PINMUX_MCUX_LPC_PORT1_NAME);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(flexcomm0)) && \ #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(flexcomm0)) && \
DT_NODE_HAS_COMPAT(DT_NODELABEL(flexcomm0), nxp_lpc_usart) DT_NODE_HAS_COMPAT(DT_NODELABEL(flexcomm0), nxp_lpc_usart)
/* USART0 RX, TX */ /* USART0 RX, TX */
const u32_t port0_pin0_config = ( const u32_t port0_pin0_config = (
@ -51,7 +51,7 @@ static int lpcxpresso_54114_pinmux_init(struct device *dev)
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(gpio0)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(gpio0))
const u32_t port0_pin29_config = ( const u32_t port0_pin29_config = (
IOCON_PIO_FUNC0 | IOCON_PIO_FUNC0 |
IOCON_PIO_MODE_PULLUP | IOCON_PIO_MODE_PULLUP |
@ -94,7 +94,7 @@ static int lpcxpresso_54114_pinmux_init(struct device *dev)
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(gpio1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(gpio1))
const u32_t port1_pin10_config = ( const u32_t port1_pin10_config = (
IOCON_PIO_FUNC0 | IOCON_PIO_FUNC0 |
IOCON_PIO_MODE_PULLUP | IOCON_PIO_MODE_PULLUP |
@ -108,7 +108,7 @@ static int lpcxpresso_54114_pinmux_init(struct device *dev)
pinmux_pin_set(port1, 10, port1_pin10_config); pinmux_pin_set(port1, 10, port1_pin10_config);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(flexcomm4)) && \ #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(flexcomm4)) && \
DT_NODE_HAS_COMPAT(DT_NODELABEL(flexcomm4), nxp_lpc_i2c) DT_NODE_HAS_COMPAT(DT_NODELABEL(flexcomm4), nxp_lpc_i2c)
/* PORT0 PIN25 is configured as FC4_RTS_SCL_SSEL1 */ /* PORT0 PIN25 is configured as FC4_RTS_SCL_SSEL1 */
pinmux_pin_set(port0, 25, IOCON_PIO_FUNC1 | pinmux_pin_set(port0, 25, IOCON_PIO_FUNC1 |
@ -129,7 +129,7 @@ static int lpcxpresso_54114_pinmux_init(struct device *dev)
IOCON_PIO_I2CFILTER_EN); IOCON_PIO_I2CFILTER_EN);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(flexcomm5)) && \ #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(flexcomm5)) && \
DT_NODE_HAS_COMPAT(DT_NODELABEL(flexcomm5), nxp_lpc_spi) DT_NODE_HAS_COMPAT(DT_NODELABEL(flexcomm5), nxp_lpc_spi)
/* PORT0 PIN18 is configured as FC5_TXD_SCL_MISO */ /* PORT0 PIN18 is configured as FC5_TXD_SCL_MISO */
pinmux_pin_set(port0, 18, IOCON_PIO_FUNC1 | pinmux_pin_set(port0, 18, IOCON_PIO_FUNC1 |

2
boards/arm/lpcxpresso55s16/pinmux.c
View file

@ -95,7 +95,7 @@ static int lpcxpresso_55s16_pinmux_init(struct device *dev)
pinmux_pin_set(port1, DT_GPIO_PIN(DT_ALIAS(led2), gpios), led2_config); pinmux_pin_set(port1, DT_GPIO_PIN(DT_ALIAS(led2), gpios), led2_config);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(flexcomm0)) && \ #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(flexcomm0)) && \
DT_NODE_HAS_COMPAT(DT_NODELABEL(flexcomm0), nxp_lpc_usart) DT_NODE_HAS_COMPAT(DT_NODELABEL(flexcomm0), nxp_lpc_usart)
/* USART0 RX, TX */ /* USART0 RX, TX */
const u32_t port0_pin29_config = ( const u32_t port0_pin29_config = (

6
boards/arm/lpcxpresso55s69/pinmux.c
View file

@ -23,7 +23,7 @@ static int lpcxpresso_55s69_pinmux_init(struct device *dev)
device_get_binding(CONFIG_PINMUX_MCUX_LPC_PORT1_NAME); device_get_binding(CONFIG_PINMUX_MCUX_LPC_PORT1_NAME);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(flexcomm0)) && \ #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(flexcomm0)) && \
DT_NODE_HAS_COMPAT(DT_NODELABEL(flexcomm0), nxp_lpc_usart) DT_NODE_HAS_COMPAT(DT_NODELABEL(flexcomm0), nxp_lpc_usart)
/* USART0 RX, TX */ /* USART0 RX, TX */
const u32_t port0_pin29_config = ( const u32_t port0_pin29_config = (
@ -89,7 +89,7 @@ static int lpcxpresso_55s69_pinmux_init(struct device *dev)
pinmux_pin_set(port1, DT_GPIO_PIN(DT_ALIAS(sw2), gpios), sw2_config); pinmux_pin_set(port1, DT_GPIO_PIN(DT_ALIAS(sw2), gpios), sw2_config);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(flexcomm4)) && \ #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(flexcomm4)) && \
DT_NODE_HAS_COMPAT(DT_NODELABEL(flexcomm4), nxp_lpc_i2c) DT_NODE_HAS_COMPAT(DT_NODELABEL(flexcomm4), nxp_lpc_i2c)
/* PORT1 PIN20 is configured as FC4_TXD_SCL_MISO_WS */ /* PORT1 PIN20 is configured as FC4_TXD_SCL_MISO_WS */
pinmux_pin_set(port1, 20, IOCON_PIO_FUNC5 | pinmux_pin_set(port1, 20, IOCON_PIO_FUNC5 |
@ -118,7 +118,7 @@ static int lpcxpresso_55s69_pinmux_init(struct device *dev)
IOCON_PIO_OPENDRAIN_DI); IOCON_PIO_OPENDRAIN_DI);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(hs_lspi)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(hs_lspi))
/* PORT0 PIN26 is configured as HS_SPI_MOSI */ /* PORT0 PIN26 is configured as HS_SPI_MOSI */
pinmux_pin_set(port0, 26, IOCON_PIO_FUNC9 | pinmux_pin_set(port0, 26, IOCON_PIO_FUNC9 |
IOCON_PIO_MODE_PULLUP | IOCON_PIO_MODE_PULLUP |

78
boards/arm/mec1501modular_assy6885/pinmux.c
View file

@ -12,22 +12,22 @@
#include "soc.h" #include "soc.h"
struct pinmux_ports_t { struct pinmux_ports_t {
#if DT_HAS_NODE(DT_NODELABEL(pinmux_000_036)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_000_036))
struct device *porta; struct device *porta;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_040_076)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_040_076))
struct device *portb; struct device *portb;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_100_136)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_100_136))
struct device *portc; struct device *portc;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_140_176)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_140_176))
struct device *portd; struct device *portd;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_200_236)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_200_236))
struct device *porte; struct device *porte;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_240_276)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_240_276))
struct device *portf; struct device *portf;
#endif #endif
}; };
@ -35,50 +35,50 @@ struct pinmux_ports_t {
static void i2c_pinmux(struct pinmux_ports_t *p, uint8_t port_sel) static void i2c_pinmux(struct pinmux_ports_t *p, uint8_t port_sel)
{ {
switch (port_sel) { switch (port_sel) {
#if DT_HAS_NODE(DT_NODELABEL(pinmux_000_036)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_000_036))
case 0: case 0:
pinmux_pin_set(p->porta, MCHP_GPIO_003, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->porta, MCHP_GPIO_003, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(p->porta, MCHP_GPIO_004, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->porta, MCHP_GPIO_004, MCHP_GPIO_CTRL_MUX_F1);
break; break;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_100_136)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_100_136))
case 1: case 1:
pinmux_pin_set(p->portc, MCHP_GPIO_130, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->portc, MCHP_GPIO_130, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(p->portc, MCHP_GPIO_131, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->portc, MCHP_GPIO_131, MCHP_GPIO_CTRL_MUX_F1);
break; break;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_140_176)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_140_176))
case 2: case 2:
pinmux_pin_set(p->portd, MCHP_GPIO_154, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->portd, MCHP_GPIO_154, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(p->portd, MCHP_GPIO_155, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->portd, MCHP_GPIO_155, MCHP_GPIO_CTRL_MUX_F1);
break; break;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_000_036)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_000_036))
case 3: case 3:
pinmux_pin_set(p->porta, MCHP_GPIO_007, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->porta, MCHP_GPIO_007, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(p->porta, MCHP_GPIO_010, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->porta, MCHP_GPIO_010, MCHP_GPIO_CTRL_MUX_F1);
break; break;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_140_176)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_140_176))
case 4: case 4:
pinmux_pin_set(p->portd, MCHP_GPIO_143, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->portd, MCHP_GPIO_143, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(p->portd, MCHP_GPIO_144, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->portd, MCHP_GPIO_144, MCHP_GPIO_CTRL_MUX_F1);
break; break;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_140_176)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_140_176))
case 5: case 5:
pinmux_pin_set(p->portd, MCHP_GPIO_141, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->portd, MCHP_GPIO_141, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(p->portd, MCHP_GPIO_142, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->portd, MCHP_GPIO_142, MCHP_GPIO_CTRL_MUX_F1);
break; break;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_100_136)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_100_136))
#if DT_HAS_NODE(DT_NODELABEL(pinmux_140_176)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_140_176))
case 6: case 6:
pinmux_pin_set(p->portc, MCHP_GPIO_132, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->portc, MCHP_GPIO_132, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(p->portd, MCHP_GPIO_140, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->portd, MCHP_GPIO_140, MCHP_GPIO_CTRL_MUX_F1);
@ -86,7 +86,7 @@ static void i2c_pinmux(struct pinmux_ports_t *p, uint8_t port_sel)
#endif #endif
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_000_036)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_000_036))
case 7: case 7:
pinmux_pin_set(p->porta, MCHP_GPIO_012, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->porta, MCHP_GPIO_012, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(p->porta, MCHP_GPIO_013, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->porta, MCHP_GPIO_013, MCHP_GPIO_CTRL_MUX_F1);
@ -103,32 +103,32 @@ static int board_pinmux_init(struct device *dev)
ARG_UNUSED(dev); ARG_UNUSED(dev);
struct pinmux_ports_t pinmux_ports; struct pinmux_ports_t pinmux_ports;
#if DT_HAS_NODE(DT_NODELABEL(pinmux_000_036)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_000_036))
struct device *porta = struct device *porta =
device_get_binding(DT_LABEL(DT_NODELABEL(pinmux_000_036))); device_get_binding(DT_LABEL(DT_NODELABEL(pinmux_000_036)));
pinmux_ports.porta = porta; pinmux_ports.porta = porta;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_040_076)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_040_076))
struct device *portb = struct device *portb =
device_get_binding(DT_LABEL(DT_NODELABEL(pinmux_040_076))); device_get_binding(DT_LABEL(DT_NODELABEL(pinmux_040_076)));
pinmux_ports.portb = portb; pinmux_ports.portb = portb;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_100_136)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_100_136))
struct device *portc = struct device *portc =
device_get_binding(DT_LABEL(DT_NODELABEL(pinmux_100_136))); device_get_binding(DT_LABEL(DT_NODELABEL(pinmux_100_136)));
pinmux_ports.portc = portc; pinmux_ports.portc = portc;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_140_176)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_140_176))
struct device *portd = struct device *portd =
device_get_binding(DT_LABEL(DT_NODELABEL(pinmux_140_176))); device_get_binding(DT_LABEL(DT_NODELABEL(pinmux_140_176)));
pinmux_ports.portd = portd; pinmux_ports.portd = portd;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_200_236)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_200_236))
struct device *porte = struct device *porte =
device_get_binding(DT_LABEL(DT_NODELABEL(pinmux_200_236))); device_get_binding(DT_LABEL(DT_NODELABEL(pinmux_200_236)));
pinmux_ports.porte = porte; pinmux_ports.porte = porte;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_240_276)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_240_276))
struct device *portf = struct device *portf =
device_get_binding(DT_LABEL(DT_NODELABEL(pinmux_240_276))); device_get_binding(DT_LABEL(DT_NODELABEL(pinmux_240_276)));
pinmux_ports.portf = portf; pinmux_ports.portf = portf;
@ -158,7 +158,7 @@ static int board_pinmux_init(struct device *dev)
pinmux_pin_set(portf, MCHP_GPIO_250, MCHP_GPIO_CTRL_MUX_F0); pinmux_pin_set(portf, MCHP_GPIO_250, MCHP_GPIO_CTRL_MUX_F0);
/* See table 2-4 from the data sheet for pin multiplexing*/ /* See table 2-4 from the data sheet for pin multiplexing*/
#if DT_HAS_NODE(DT_NODELABEL(uart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(uart1))
/* Set muxing, for UART 1 TX/RX and power up */ /* Set muxing, for UART 1 TX/RX and power up */
mchp_pcr_periph_slp_ctrl(PCR_UART1, MCHP_PCR_SLEEP_DIS); mchp_pcr_periph_slp_ctrl(PCR_UART1, MCHP_PCR_SLEEP_DIS);
@ -191,23 +191,23 @@ static int board_pinmux_init(struct device *dev)
#ifdef CONFIG_I2C_XEC #ifdef CONFIG_I2C_XEC
#if DT_HAS_NODE(DT_INST(0, microchip_xec_i2c)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(0, microchip_xec_i2c))
i2c_pinmux(&pinmux_ports, DT_PROP(DT_INST(0, microchip_xec_i2c), port_sel)); i2c_pinmux(&pinmux_ports, DT_PROP(DT_INST(0, microchip_xec_i2c), port_sel));
#endif #endif
#if DT_HAS_NODE(DT_INST(1, microchip_xec_i2c)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(1, microchip_xec_i2c))
i2c_pinmux(&pinmux_ports, DT_PROP(DT_INST(1, microchip_xec_i2c), port_sel)); i2c_pinmux(&pinmux_ports, DT_PROP(DT_INST(1, microchip_xec_i2c), port_sel));
#endif #endif
#if DT_HAS_NODE(DT_INST(2, microchip_xec_i2c)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(2, microchip_xec_i2c))
i2c_pinmux(&pinmux_ports, DT_PROP(DT_INST(2, microchip_xec_i2c), port_sel)); i2c_pinmux(&pinmux_ports, DT_PROP(DT_INST(2, microchip_xec_i2c), port_sel));
#endif #endif
#if DT_HAS_NODE(DT_INST(3, microchip_xec_i2c)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(3, microchip_xec_i2c))
i2c_pinmux(&pinmux_ports, DT_PROP(DT_INST(3, microchip_xec_i2c), port_sel)); i2c_pinmux(&pinmux_ports, DT_PROP(DT_INST(3, microchip_xec_i2c), port_sel));
#endif #endif
#if DT_HAS_NODE(DT_INST(4, microchip_xec_i2c)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(4, microchip_xec_i2c))
i2c_pinmux(&pinmux_ports, DT_PROP(DT_INST(4, microchip_xec_i2c), port_sel)); i2c_pinmux(&pinmux_ports, DT_PROP(DT_INST(4, microchip_xec_i2c), port_sel));
#endif #endif
@ -249,47 +249,47 @@ static int board_pinmux_init(struct device *dev)
#endif #endif
#ifdef CONFIG_PWM_XEC #ifdef CONFIG_PWM_XEC
#if DT_HAS_NODE(DT_INST(0, microchip_xec_pwm)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(0, microchip_xec_pwm))
mchp_pcr_periph_slp_ctrl(PCR_PWM0, MCHP_PCR_SLEEP_DIS); mchp_pcr_periph_slp_ctrl(PCR_PWM0, MCHP_PCR_SLEEP_DIS);
pinmux_pin_set(portb, MCHP_GPIO_053, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(portb, MCHP_GPIO_053, MCHP_GPIO_CTRL_MUX_F1);
#endif #endif
#if DT_HAS_NODE(DT_INST(1, microchip_xec_pwm)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(1, microchip_xec_pwm))
mchp_pcr_periph_slp_ctrl(PCR_PWM1, MCHP_PCR_SLEEP_DIS); mchp_pcr_periph_slp_ctrl(PCR_PWM1, MCHP_PCR_SLEEP_DIS);
pinmux_pin_set(portb, MCHP_GPIO_054, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(portb, MCHP_GPIO_054, MCHP_GPIO_CTRL_MUX_F1);
#endif #endif
#if DT_HAS_NODE(DT_INST(2, microchip_xec_pwm)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(2, microchip_xec_pwm))
mchp_pcr_periph_slp_ctrl(PCR_PWM2, MCHP_PCR_SLEEP_DIS); mchp_pcr_periph_slp_ctrl(PCR_PWM2, MCHP_PCR_SLEEP_DIS);
pinmux_pin_set(portb, MCHP_GPIO_055, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(portb, MCHP_GPIO_055, MCHP_GPIO_CTRL_MUX_F1);
#endif #endif
#if DT_HAS_NODE(DT_INST(3, microchip_xec_pwm)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(3, microchip_xec_pwm))
mchp_pcr_periph_slp_ctrl(PCR_PWM3, MCHP_PCR_SLEEP_DIS); mchp_pcr_periph_slp_ctrl(PCR_PWM3, MCHP_PCR_SLEEP_DIS);
pinmux_pin_set(portb, MCHP_GPIO_056, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(portb, MCHP_GPIO_056, MCHP_GPIO_CTRL_MUX_F1);
#endif #endif
#if DT_HAS_NODE(DT_INST(4, microchip_xec_pwm)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(4, microchip_xec_pwm))
mchp_pcr_periph_slp_ctrl(PCR_PWM4, MCHP_PCR_SLEEP_DIS); mchp_pcr_periph_slp_ctrl(PCR_PWM4, MCHP_PCR_SLEEP_DIS);
pinmux_pin_set(porta, MCHP_GPIO_011, MCHP_GPIO_CTRL_MUX_F2); pinmux_pin_set(porta, MCHP_GPIO_011, MCHP_GPIO_CTRL_MUX_F2);
#endif #endif
#if DT_HAS_NODE(DT_INST(5, microchip_xec_pwm)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(5, microchip_xec_pwm))
mchp_pcr_periph_slp_ctrl(PCR_PWM5, MCHP_PCR_SLEEP_DIS); mchp_pcr_periph_slp_ctrl(PCR_PWM5, MCHP_PCR_SLEEP_DIS);
pinmux_pin_set(porta, MCHP_GPIO_002, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(porta, MCHP_GPIO_002, MCHP_GPIO_CTRL_MUX_F1);
#endif #endif
#if DT_HAS_NODE(DT_INST(6, microchip_xec_pwm)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(6, microchip_xec_pwm))
mchp_pcr_periph_slp_ctrl(PCR_PWM6, MCHP_PCR_SLEEP_DIS); mchp_pcr_periph_slp_ctrl(PCR_PWM6, MCHP_PCR_SLEEP_DIS);
pinmux_pin_set(porta, MCHP_GPIO_014, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(porta, MCHP_GPIO_014, MCHP_GPIO_CTRL_MUX_F1);
#endif #endif
#if DT_HAS_NODE(DT_INST(7, microchip_xec_pwm)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(7, microchip_xec_pwm))
mchp_pcr_periph_slp_ctrl(PCR_PWM7, MCHP_PCR_SLEEP_DIS); mchp_pcr_periph_slp_ctrl(PCR_PWM7, MCHP_PCR_SLEEP_DIS);
pinmux_pin_set(porta, MCHP_GPIO_015, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(porta, MCHP_GPIO_015, MCHP_GPIO_CTRL_MUX_F1);
#endif #endif
#if DT_HAS_NODE(DT_INST(8, microchip_xec_pwm)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(8, microchip_xec_pwm))
mchp_pcr_periph_slp_ctrl(PCR_PWM8, MCHP_PCR_SLEEP_DIS); mchp_pcr_periph_slp_ctrl(PCR_PWM8, MCHP_PCR_SLEEP_DIS);
pinmux_pin_set(porta, MCHP_GPIO_035, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(porta, MCHP_GPIO_035, MCHP_GPIO_CTRL_MUX_F1);
#endif #endif
@ -379,7 +379,7 @@ static int board_pinmux_init(struct device *dev)
#endif #endif
#ifdef CONFIG_SPI_XEC_QMSPI #ifdef CONFIG_SPI_XEC_QMSPI
#if DT_HAS_NODE(DT_INST(0, microchip_xec_qmspi)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(0, microchip_xec_qmspi))
mchp_pcr_periph_slp_ctrl(PCR_QMSPI, MCHP_PCR_SLEEP_DIS); mchp_pcr_periph_slp_ctrl(PCR_QMSPI, MCHP_PCR_SLEEP_DIS);
#if DT_PROP(DT_INST(0, microchip_xec_qmspi), port_sel) == 0 #if DT_PROP(DT_INST(0, microchip_xec_qmspi), port_sel) == 0
@ -409,7 +409,7 @@ static int board_pinmux_init(struct device *dev)
#endif #endif
#endif /* DT_PROP(DT_INST(0, microchip_xec_qmspi), port_sel) == 0 */ #endif /* DT_PROP(DT_INST(0, microchip_xec_qmspi), port_sel) == 0 */
#endif /* DT_HAS_NODE(DT_INST(0, microchip_xec_qmspi)) */ #endif /* DT_HAS_NODE_STATUS_OKAY(DT_INST(0, microchip_xec_qmspi)) */
#endif /* CONFIG_SPI_XEC_QMSPI */ #endif /* CONFIG_SPI_XEC_QMSPI */
#ifdef CONFIG_SYS_PM_DEBUG #ifdef CONFIG_SYS_PM_DEBUG
@ -422,7 +422,7 @@ static int board_pinmux_init(struct device *dev)
#ifdef CONFIG_TACH_XEC #ifdef CONFIG_TACH_XEC
#if DT_HAS_NODE(DT_INST(0, microchip_xec_tach)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(0, microchip_xec_tach))
pinmux_pin_set(portb, MCHP_GPIO_050, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(portb, MCHP_GPIO_050, MCHP_GPIO_CTRL_MUX_F1);
#endif /* CONFIG_TACH_XEC */ #endif /* CONFIG_TACH_XEC */

78
boards/arm/mec15xxevb_assy6853/pinmux.c
View file

@ -12,22 +12,22 @@
#include "soc.h" #include "soc.h"
struct pinmux_ports_t { struct pinmux_ports_t {
#if DT_HAS_NODE(DT_NODELABEL(pinmux_000_036)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_000_036))
struct device *porta; struct device *porta;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_040_076)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_040_076))
struct device *portb; struct device *portb;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_100_136)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_100_136))
struct device *portc; struct device *portc;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_140_176)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_140_176))
struct device *portd; struct device *portd;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_200_236)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_200_236))
struct device *porte; struct device *porte;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_240_276)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_240_276))
struct device *portf; struct device *portf;
#endif #endif
}; };
@ -35,50 +35,50 @@ struct pinmux_ports_t {
static void i2c_pinmux(struct pinmux_ports_t *p, uint8_t port_sel) static void i2c_pinmux(struct pinmux_ports_t *p, uint8_t port_sel)
{ {
switch (port_sel) { switch (port_sel) {
#if DT_HAS_NODE(DT_NODELABEL(pinmux_000_036)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_000_036))
case 0: case 0:
pinmux_pin_set(p->porta, MCHP_GPIO_003, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->porta, MCHP_GPIO_003, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(p->porta, MCHP_GPIO_004, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->porta, MCHP_GPIO_004, MCHP_GPIO_CTRL_MUX_F1);
break; break;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_100_136)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_100_136))
case 1: case 1:
pinmux_pin_set(p->portc, MCHP_GPIO_130, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->portc, MCHP_GPIO_130, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(p->portc, MCHP_GPIO_131, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->portc, MCHP_GPIO_131, MCHP_GPIO_CTRL_MUX_F1);
break; break;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_140_176)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_140_176))
case 2: case 2:
pinmux_pin_set(p->portd, MCHP_GPIO_154, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->portd, MCHP_GPIO_154, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(p->portd, MCHP_GPIO_155, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->portd, MCHP_GPIO_155, MCHP_GPIO_CTRL_MUX_F1);
break; break;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_000_036)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_000_036))
case 3: case 3:
pinmux_pin_set(p->porta, MCHP_GPIO_007, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->porta, MCHP_GPIO_007, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(p->porta, MCHP_GPIO_010, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->porta, MCHP_GPIO_010, MCHP_GPIO_CTRL_MUX_F1);
break; break;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_140_176)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_140_176))
case 4: case 4:
pinmux_pin_set(p->portd, MCHP_GPIO_143, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->portd, MCHP_GPIO_143, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(p->portd, MCHP_GPIO_144, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->portd, MCHP_GPIO_144, MCHP_GPIO_CTRL_MUX_F1);
break; break;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_140_176)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_140_176))
case 5: case 5:
pinmux_pin_set(p->portd, MCHP_GPIO_141, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->portd, MCHP_GPIO_141, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(p->portd, MCHP_GPIO_142, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->portd, MCHP_GPIO_142, MCHP_GPIO_CTRL_MUX_F1);
break; break;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_100_136)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_100_136))
#if DT_HAS_NODE(DT_NODELABEL(pinmux_140_176)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_140_176))
case 6: case 6:
pinmux_pin_set(p->portc, MCHP_GPIO_132, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->portc, MCHP_GPIO_132, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(p->portd, MCHP_GPIO_140, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->portd, MCHP_GPIO_140, MCHP_GPIO_CTRL_MUX_F1);
@ -86,7 +86,7 @@ static void i2c_pinmux(struct pinmux_ports_t *p, uint8_t port_sel)
#endif #endif
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_000_036)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_000_036))
case 7: case 7:
pinmux_pin_set(p->porta, MCHP_GPIO_012, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->porta, MCHP_GPIO_012, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(p->porta, MCHP_GPIO_013, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(p->porta, MCHP_GPIO_013, MCHP_GPIO_CTRL_MUX_F1);
@ -103,32 +103,32 @@ static int board_pinmux_init(struct device *dev)
ARG_UNUSED(dev); ARG_UNUSED(dev);
struct pinmux_ports_t pinmux_ports; struct pinmux_ports_t pinmux_ports;
#if DT_HAS_NODE(DT_NODELABEL(pinmux_000_036)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_000_036))
struct device *porta = struct device *porta =
device_get_binding(DT_LABEL(DT_NODELABEL(pinmux_000_036))); device_get_binding(DT_LABEL(DT_NODELABEL(pinmux_000_036)));
pinmux_ports.porta = porta; pinmux_ports.porta = porta;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_040_076)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_040_076))
struct device *portb = struct device *portb =
device_get_binding(DT_LABEL(DT_NODELABEL(pinmux_040_076))); device_get_binding(DT_LABEL(DT_NODELABEL(pinmux_040_076)));
pinmux_ports.portb = portb; pinmux_ports.portb = portb;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_100_136)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_100_136))
struct device *portc = struct device *portc =
device_get_binding(DT_LABEL(DT_NODELABEL(pinmux_100_136))); device_get_binding(DT_LABEL(DT_NODELABEL(pinmux_100_136)));
pinmux_ports.portc = portc; pinmux_ports.portc = portc;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_140_176)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_140_176))
struct device *portd = struct device *portd =
device_get_binding(DT_LABEL(DT_NODELABEL(pinmux_140_176))); device_get_binding(DT_LABEL(DT_NODELABEL(pinmux_140_176)));
pinmux_ports.portd = portd; pinmux_ports.portd = portd;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_200_236)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_200_236))
struct device *porte = struct device *porte =
device_get_binding(DT_LABEL(DT_NODELABEL(pinmux_200_236))); device_get_binding(DT_LABEL(DT_NODELABEL(pinmux_200_236)));
pinmux_ports.porte = porte; pinmux_ports.porte = porte;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pinmux_240_276)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pinmux_240_276))
struct device *portf = struct device *portf =
device_get_binding(DT_LABEL(DT_NODELABEL(pinmux_240_276))); device_get_binding(DT_LABEL(DT_NODELABEL(pinmux_240_276)));
pinmux_ports.portf = portf; pinmux_ports.portf = portf;
@ -158,7 +158,7 @@ static int board_pinmux_init(struct device *dev)
pinmux_pin_set(portf, MCHP_GPIO_250, MCHP_GPIO_CTRL_MUX_F0); pinmux_pin_set(portf, MCHP_GPIO_250, MCHP_GPIO_CTRL_MUX_F0);
/* See table 2-4 from the data sheet for pin multiplexing*/ /* See table 2-4 from the data sheet for pin multiplexing*/
#if DT_HAS_NODE(DT_NODELABEL(uart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(uart2))
/* Set muxing, for UART 2 TX/RX and power up */ /* Set muxing, for UART 2 TX/RX and power up */
mchp_pcr_periph_slp_ctrl(PCR_UART2, MCHP_PCR_SLEEP_DIS); mchp_pcr_periph_slp_ctrl(PCR_UART2, MCHP_PCR_SLEEP_DIS);
@ -191,23 +191,23 @@ static int board_pinmux_init(struct device *dev)
#ifdef CONFIG_I2C_XEC #ifdef CONFIG_I2C_XEC
#if DT_HAS_NODE(DT_INST(0, microchip_xec_i2c)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(0, microchip_xec_i2c))
i2c_pinmux(&pinmux_ports, DT_PROP(DT_INST(0, microchip_xec_i2c), port_sel)); i2c_pinmux(&pinmux_ports, DT_PROP(DT_INST(0, microchip_xec_i2c), port_sel));
#endif #endif
#if DT_HAS_NODE(DT_INST(1, microchip_xec_i2c)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(1, microchip_xec_i2c))
i2c_pinmux(&pinmux_ports, DT_PROP(DT_INST(1, microchip_xec_i2c), port_sel)); i2c_pinmux(&pinmux_ports, DT_PROP(DT_INST(1, microchip_xec_i2c), port_sel));
#endif #endif
#if DT_HAS_NODE(DT_INST(2, microchip_xec_i2c)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(2, microchip_xec_i2c))
i2c_pinmux(&pinmux_ports, DT_PROP(DT_INST(2, microchip_xec_i2c), port_sel)); i2c_pinmux(&pinmux_ports, DT_PROP(DT_INST(2, microchip_xec_i2c), port_sel));
#endif #endif
#if DT_HAS_NODE(DT_INST(3, microchip_xec_i2c)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(3, microchip_xec_i2c))
i2c_pinmux(&pinmux_ports, DT_PROP(DT_INST(3, microchip_xec_i2c), port_sel)); i2c_pinmux(&pinmux_ports, DT_PROP(DT_INST(3, microchip_xec_i2c), port_sel));
#endif #endif
#if DT_HAS_NODE(DT_INST(4, microchip_xec_i2c)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(4, microchip_xec_i2c))
i2c_pinmux(&pinmux_ports, DT_PROP(DT_INST(4, microchip_xec_i2c), port_sel)); i2c_pinmux(&pinmux_ports, DT_PROP(DT_INST(4, microchip_xec_i2c), port_sel));
#endif #endif
@ -249,47 +249,47 @@ static int board_pinmux_init(struct device *dev)
#endif #endif
#ifdef CONFIG_PWM_XEC #ifdef CONFIG_PWM_XEC
#if DT_HAS_NODE(DT_INST(0, microchip_xec_pwm)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(0, microchip_xec_pwm))
mchp_pcr_periph_slp_ctrl(PCR_PWM0, MCHP_PCR_SLEEP_DIS); mchp_pcr_periph_slp_ctrl(PCR_PWM0, MCHP_PCR_SLEEP_DIS);
pinmux_pin_set(portb, MCHP_GPIO_053, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(portb, MCHP_GPIO_053, MCHP_GPIO_CTRL_MUX_F1);
#endif #endif
#if DT_HAS_NODE(DT_INST(1, microchip_xec_pwm)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(1, microchip_xec_pwm))
mchp_pcr_periph_slp_ctrl(PCR_PWM1, MCHP_PCR_SLEEP_DIS); mchp_pcr_periph_slp_ctrl(PCR_PWM1, MCHP_PCR_SLEEP_DIS);
pinmux_pin_set(portb, MCHP_GPIO_054, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(portb, MCHP_GPIO_054, MCHP_GPIO_CTRL_MUX_F1);
#endif #endif
#if DT_HAS_NODE(DT_INST(2, microchip_xec_pwm)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(2, microchip_xec_pwm))
mchp_pcr_periph_slp_ctrl(PCR_PWM2, MCHP_PCR_SLEEP_DIS); mchp_pcr_periph_slp_ctrl(PCR_PWM2, MCHP_PCR_SLEEP_DIS);
pinmux_pin_set(portb, MCHP_GPIO_055, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(portb, MCHP_GPIO_055, MCHP_GPIO_CTRL_MUX_F1);
#endif #endif
#if DT_HAS_NODE(DT_INST(3, microchip_xec_pwm)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(3, microchip_xec_pwm))
mchp_pcr_periph_slp_ctrl(PCR_PWM3, MCHP_PCR_SLEEP_DIS); mchp_pcr_periph_slp_ctrl(PCR_PWM3, MCHP_PCR_SLEEP_DIS);
pinmux_pin_set(portb, MCHP_GPIO_056, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(portb, MCHP_GPIO_056, MCHP_GPIO_CTRL_MUX_F1);
#endif #endif
#if DT_HAS_NODE(DT_INST(4, microchip_xec_pwm)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(4, microchip_xec_pwm))
mchp_pcr_periph_slp_ctrl(PCR_PWM4, MCHP_PCR_SLEEP_DIS); mchp_pcr_periph_slp_ctrl(PCR_PWM4, MCHP_PCR_SLEEP_DIS);
pinmux_pin_set(porta, MCHP_GPIO_011, MCHP_GPIO_CTRL_MUX_F2); pinmux_pin_set(porta, MCHP_GPIO_011, MCHP_GPIO_CTRL_MUX_F2);
#endif #endif
#if DT_HAS_NODE(DT_INST(5, microchip_xec_pwm)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(5, microchip_xec_pwm))
mchp_pcr_periph_slp_ctrl(PCR_PWM5, MCHP_PCR_SLEEP_DIS); mchp_pcr_periph_slp_ctrl(PCR_PWM5, MCHP_PCR_SLEEP_DIS);
pinmux_pin_set(porta, MCHP_GPIO_002, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(porta, MCHP_GPIO_002, MCHP_GPIO_CTRL_MUX_F1);
#endif #endif
#if DT_HAS_NODE(DT_INST(6, microchip_xec_pwm)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(6, microchip_xec_pwm))
mchp_pcr_periph_slp_ctrl(PCR_PWM6, MCHP_PCR_SLEEP_DIS); mchp_pcr_periph_slp_ctrl(PCR_PWM6, MCHP_PCR_SLEEP_DIS);
pinmux_pin_set(porta, MCHP_GPIO_014, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(porta, MCHP_GPIO_014, MCHP_GPIO_CTRL_MUX_F1);
#endif #endif
#if DT_HAS_NODE(DT_INST(7, microchip_xec_pwm)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(7, microchip_xec_pwm))
mchp_pcr_periph_slp_ctrl(PCR_PWM7, MCHP_PCR_SLEEP_DIS); mchp_pcr_periph_slp_ctrl(PCR_PWM7, MCHP_PCR_SLEEP_DIS);
pinmux_pin_set(porta, MCHP_GPIO_015, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(porta, MCHP_GPIO_015, MCHP_GPIO_CTRL_MUX_F1);
#endif #endif
#if DT_HAS_NODE(DT_INST(8, microchip_xec_pwm)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(8, microchip_xec_pwm))
mchp_pcr_periph_slp_ctrl(PCR_PWM8, MCHP_PCR_SLEEP_DIS); mchp_pcr_periph_slp_ctrl(PCR_PWM8, MCHP_PCR_SLEEP_DIS);
pinmux_pin_set(porta, MCHP_GPIO_035, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(porta, MCHP_GPIO_035, MCHP_GPIO_CTRL_MUX_F1);
#endif #endif
@ -379,7 +379,7 @@ static int board_pinmux_init(struct device *dev)
#endif #endif
#ifdef CONFIG_SPI_XEC_QMSPI #ifdef CONFIG_SPI_XEC_QMSPI
#if DT_HAS_NODE(DT_INST(0, microchip_xec_qmspi)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(0, microchip_xec_qmspi))
mchp_pcr_periph_slp_ctrl(PCR_QMSPI, MCHP_PCR_SLEEP_DIS); mchp_pcr_periph_slp_ctrl(PCR_QMSPI, MCHP_PCR_SLEEP_DIS);
#if DT_PROP(DT_INST(0, microchip_xec_qmspi), port_sel) == 0 #if DT_PROP(DT_INST(0, microchip_xec_qmspi), port_sel) == 0
@ -409,7 +409,7 @@ static int board_pinmux_init(struct device *dev)
#endif #endif
#endif /* DT_PROP(DT_INST(0, microchip_xec_qmspi), port_sel) == 0 */ #endif /* DT_PROP(DT_INST(0, microchip_xec_qmspi), port_sel) == 0 */
#endif /* DT_HAS_NODE(DT_INST(0, microchip_xec_qmspi)) */ #endif /* DT_HAS_NODE_STATUS_OKAY(DT_INST(0, microchip_xec_qmspi)) */
#endif /* CONFIG_SPI_XEC_QMSPI */ #endif /* CONFIG_SPI_XEC_QMSPI */
#ifdef CONFIG_SYS_PM_DEBUG #ifdef CONFIG_SYS_PM_DEBUG
@ -422,7 +422,7 @@ static int board_pinmux_init(struct device *dev)
#ifdef CONFIG_TACH_XEC #ifdef CONFIG_TACH_XEC
#if DT_HAS_NODE(DT_INST(0, microchip_xec_tach)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(0, microchip_xec_tach))
pinmux_pin_set(portb, MCHP_GPIO_050, MCHP_GPIO_CTRL_MUX_F1); pinmux_pin_set(portb, MCHP_GPIO_050, MCHP_GPIO_CTRL_MUX_F1);
#endif /* CONFIG_TACH_XEC */ #endif /* CONFIG_TACH_XEC */

4
boards/arm/mec2016evb_assy6797/pinmux.c
View file

@ -15,7 +15,7 @@ static int board_pinmux_init(struct device *dev)
ARG_UNUSED(dev); ARG_UNUSED(dev);
/* See table 2-4 from the Data sheet*/ /* See table 2-4 from the Data sheet*/
#if DT_HAS_NODE(DT_NODELABEL(uart0)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(uart0))
/* Set muxing, for UART 0 and power up */ /* Set muxing, for UART 0 and power up */
PCR_INST->CLK_REQ_2_b.UART_0_CLK_REQ = 1; PCR_INST->CLK_REQ_2_b.UART_0_CLK_REQ = 1;
UART0_INST->CONFIG = 0; UART0_INST->CONFIG = 0;
@ -24,7 +24,7 @@ static int board_pinmux_init(struct device *dev)
GPIO_100_137_INST->GPIO_105_PIN_CONTROL_b.MUX_CONTROL = 1; GPIO_100_137_INST->GPIO_105_PIN_CONTROL_b.MUX_CONTROL = 1;
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(uart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(uart1))
/* Set muxing, for UART 1 and power up */ /* Set muxing, for UART 1 and power up */
PCR_INST->CLK_REQ_2_b.UART_1_CLK_REQ = 1; PCR_INST->CLK_REQ_2_b.UART_1_CLK_REQ = 1;
UART1_INST->CONFIG = 0; UART1_INST->CONFIG = 0;

8
boards/arm/mikroe_mini_m4_for_stm32/pinmux.c
View file

@ -14,15 +14,15 @@
/* pin assignments for MINI-M4 board */ /* pin assignments for MINI-M4 board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c2))
{STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_I2C2_SCL}, {STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_I2C2_SCL},
{STM32_PIN_PB11, STM32F4_PINMUX_FUNC_PB11_I2C2_SDA}, {STM32_PIN_PB11, STM32F4_PINMUX_FUNC_PB11_I2C2_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -30,7 +30,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm3))
{STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_PWM3_CH1}, {STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_PWM3_CH1},
#endif #endif
#ifdef CONFIG_USB_DC_STM32 #ifdef CONFIG_USB_DC_STM32

8
boards/arm/mimxrt1010_evk/pinmux.c
View file

@ -15,7 +15,7 @@ static int mimxrt1010_evk_init(struct device *dev)
CLOCK_EnableClock(kCLOCK_Iomuxc); CLOCK_EnableClock(kCLOCK_Iomuxc);
CLOCK_EnableClock(kCLOCK_IomuxcSnvs); CLOCK_EnableClock(kCLOCK_IomuxcSnvs);
#if DT_HAS_NODE(DT_NODELABEL(gpio1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(gpio1))
IOMUXC_SetPinMux(IOMUXC_GPIO_11_GPIOMUX_IO11, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_11_GPIOMUX_IO11, 0);
IOMUXC_SetPinConfig(IOMUXC_GPIO_11_GPIOMUX_IO11, IOMUXC_SetPinConfig(IOMUXC_GPIO_11_GPIOMUX_IO11,
IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
@ -26,7 +26,7 @@ static int mimxrt1010_evk_init(struct device *dev)
IOMUXC_GPR->GPR26 &= ~(IOMUXC_GPR_GPR26_GPIO_SEL(1 << 11)); IOMUXC_GPR->GPR26 &= ~(IOMUXC_GPR_GPR26_GPIO_SEL(1 << 11));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(gpio2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(gpio2))
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_05_GPIO2_IO05, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_SD_05_GPIO2_IO05, 0);
IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_05_GPIO2_IO05, IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_05_GPIO2_IO05,
IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
@ -36,7 +36,7 @@ static int mimxrt1010_evk_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(4)); IOMUXC_SW_PAD_CTL_PAD_DSE(4));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpuart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpuart1))
/* LPUART1 TX/RX */ /* LPUART1 TX/RX */
IOMUXC_SetPinMux(IOMUXC_GPIO_09_LPUART1_RXD, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_09_LPUART1_RXD, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_10_LPUART1_TXD, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_10_LPUART1_TXD, 0);
@ -52,7 +52,7 @@ static int mimxrt1010_evk_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpi2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpi2c1))
/* LPI2C1 SCL, SDA */ /* LPI2C1 SCL, SDA */
IOMUXC_SetPinMux(IOMUXC_GPIO_01_LPI2C1_SDA, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_01_LPI2C1_SDA, 1);
IOMUXC_SetPinMux(IOMUXC_GPIO_02_LPI2C1_SCL, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_02_LPI2C1_SCL, 1);

8
boards/arm/mimxrt1015_evk/pinmux.c
View file

@ -15,7 +15,7 @@ static int mimxrt1015_evk_init(struct device *dev)
CLOCK_EnableClock(kCLOCK_Iomuxc); CLOCK_EnableClock(kCLOCK_Iomuxc);
CLOCK_EnableClock(kCLOCK_IomuxcSnvs); CLOCK_EnableClock(kCLOCK_IomuxcSnvs);
#if DT_HAS_NODE(DT_NODELABEL(gpio2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(gpio2))
IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_09_GPIO2_IO09, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_09_GPIO2_IO09, 0);
IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_09_GPIO2_IO09, IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_09_GPIO2_IO09,
IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
@ -25,7 +25,7 @@ static int mimxrt1015_evk_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(4)); IOMUXC_SW_PAD_CTL_PAD_DSE(4));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpuart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpuart1))
/* LPUART1 TX/RX */ /* LPUART1 TX/RX */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_06_LPUART1_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_06_LPUART1_TX, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_07_LPUART1_RX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_07_LPUART1_RX, 0);
@ -41,7 +41,7 @@ static int mimxrt1015_evk_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpuart4)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpuart4))
/* LPUART4 TX/RX */ /* LPUART4 TX/RX */
IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_32_LPUART4_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_32_LPUART4_TX, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_33_LPUART4_RX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_33_LPUART4_RX, 0);
@ -57,7 +57,7 @@ static int mimxrt1015_evk_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpi2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpi2c1))
/* LPI2C1 SCL, SDA */ /* LPI2C1 SCL, SDA */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_14_LPI2C1_SCL, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_14_LPI2C1_SCL, 1);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_15_LPI2C1_SDA, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_15_LPI2C1_SDA, 1);

16
boards/arm/mimxrt1020_evk/pinmux.c
View file

@ -8,7 +8,7 @@
#include <fsl_iomuxc.h> #include <fsl_iomuxc.h>
#include <fsl_gpio.h> #include <fsl_gpio.h>
#if DT_HAS_NODE(DT_NODELABEL(enet)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(enet))
static gpio_pin_config_t enet_gpio_config = { static gpio_pin_config_t enet_gpio_config = {
.direction = kGPIO_DigitalOutput, .direction = kGPIO_DigitalOutput,
.outputLogic = 0, .outputLogic = 0,
@ -34,7 +34,7 @@ static int mimxrt1020_evk_init(struct device *dev)
/* SW0 */ /* SW0 */
IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0); IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0);
#if DT_HAS_NODE(DT_NODELABEL(lpuart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpuart1))
/* LPUART1 TX/RX */ /* LPUART1 TX/RX */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_06_LPUART1_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_06_LPUART1_TX, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_07_LPUART1_RX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_07_LPUART1_RX, 0);
@ -50,7 +50,7 @@ static int mimxrt1020_evk_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpuart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpuart2))
/* LPUART2 TX/RX */ /* LPUART2 TX/RX */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_08_LPUART2_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_08_LPUART2_TX, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_09_LPUART2_RX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_09_LPUART2_RX, 0);
@ -66,7 +66,7 @@ static int mimxrt1020_evk_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpi2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpi2c1))
/* LPI2C1 SCL, SDA */ /* LPI2C1 SCL, SDA */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_14_LPI2C1_SCL, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_14_LPI2C1_SCL, 1);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_15_LPI2C1_SDA, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_15_LPI2C1_SDA, 1);
@ -86,7 +86,7 @@ static int mimxrt1020_evk_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpi2c4)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpi2c4))
/* LPI2C4 SCL, SDA */ /* LPI2C4 SCL, SDA */
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_02_LPI2C4_SCL, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_02_LPI2C4_SCL, 1);
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_03_LPI2C4_SDA, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_03_LPI2C4_SDA, 1);
@ -106,7 +106,7 @@ static int mimxrt1020_evk_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(enet)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(enet))
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_04_GPIO1_IO04, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_04_GPIO1_IO04, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_GPIO1_IO22, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_GPIO1_IO22, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_10_ENET_RDATA00, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_10_ENET_RDATA00, 0);
@ -147,7 +147,7 @@ static int mimxrt1020_evk_init(struct device *dev)
return 0; return 0;
} }
#if DT_HAS_NODE(DT_NODELABEL(enet)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(enet))
static int mimxrt1020_evk_phy_reset(struct device *dev) static int mimxrt1020_evk_phy_reset(struct device *dev)
{ {
/* RESET PHY chip. */ /* RESET PHY chip. */
@ -159,6 +159,6 @@ static int mimxrt1020_evk_phy_reset(struct device *dev)
#endif #endif
SYS_INIT(mimxrt1020_evk_init, PRE_KERNEL_1, 0); SYS_INIT(mimxrt1020_evk_init, PRE_KERNEL_1, 0);
#if DT_HAS_NODE(DT_NODELABEL(enet)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(enet))
SYS_INIT(mimxrt1020_evk_phy_reset, PRE_KERNEL_2, 0); SYS_INIT(mimxrt1020_evk_phy_reset, PRE_KERNEL_2, 0);
#endif #endif

24
boards/arm/mimxrt1050_evk/pinmux.c
View file

@ -9,7 +9,7 @@
#include <fsl_gpio.h> #include <fsl_gpio.h>
#include <soc.h> #include <soc.h>
#if DT_HAS_NODE(DT_NODELABEL(enet)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(enet))
static gpio_pin_config_t enet_gpio_config = { static gpio_pin_config_t enet_gpio_config = {
.direction = kGPIO_DigitalOutput, .direction = kGPIO_DigitalOutput,
.outputLogic = 0, .outputLogic = 0,
@ -17,7 +17,7 @@ static gpio_pin_config_t enet_gpio_config = {
}; };
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usdhc1)) && CONFIG_DISK_ACCESS_USDHC1 #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usdhc1)) && CONFIG_DISK_ACCESS_USDHC1
/*Drive Strength Field: R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR) /*Drive Strength Field: R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)
*Speed Field: medium(100MHz) *Speed Field: medium(100MHz)
@ -118,7 +118,7 @@ static int mimxrt1050_evk_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if !DT_HAS_NODE(DT_NODELABEL(enet)) #if !DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(enet))
/* LED */ /* LED */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0);
@ -131,7 +131,7 @@ static int mimxrt1050_evk_init(struct device *dev)
IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0); IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpuart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpuart1))
/* LPUART1 TX/RX */ /* LPUART1 TX/RX */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0);
@ -147,7 +147,7 @@ static int mimxrt1050_evk_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpuart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpuart3))
/* LPUART3 TX/RX */ /* LPUART3 TX/RX */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_LPUART3_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_LPUART3_TX, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_07_LPUART3_RX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_07_LPUART3_RX, 0);
@ -163,7 +163,7 @@ static int mimxrt1050_evk_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpi2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpi2c1))
/* LPI2C1 SCL, SDA */ /* LPI2C1 SCL, SDA */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, 1);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, 1);
@ -183,7 +183,7 @@ static int mimxrt1050_evk_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpspi3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpspi3))
/* LPSPI3 SCK, SDO, SDI, PCS0 */ /* LPSPI3 SCK, SDO, SDI, PCS0 */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_00_LPSPI3_SCK, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_00_LPSPI3_SCK, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_01_LPSPI3_SDO, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_01_LPSPI3_SDO, 0);
@ -211,7 +211,7 @@ static int mimxrt1050_evk_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(enet)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(enet))
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_10_GPIO1_IO10, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_10_GPIO1_IO10, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0);
@ -249,7 +249,7 @@ static int mimxrt1050_evk_init(struct device *dev)
GPIO_WritePinOutput(GPIO1, 9, 0); GPIO_WritePinOutput(GPIO1, 9, 0);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lcdif)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lcdif))
IOMUXC_SetPinMux(IOMUXC_GPIO_B0_00_LCD_CLK, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_B0_00_LCD_CLK, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_B0_01_LCD_ENABLE, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_B0_01_LCD_ENABLE, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_B0_02_LCD_HSYNC, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_B0_02_LCD_HSYNC, 0);
@ -308,7 +308,7 @@ static int mimxrt1050_evk_init(struct device *dev)
GPIO_PinInit(GPIO2, 31, &config); GPIO_PinInit(GPIO2, 31, &config);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usdhc1)) && CONFIG_DISK_ACCESS_USDHC1 #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usdhc1)) && CONFIG_DISK_ACCESS_USDHC1
mimxrt1050_evk_usdhc_pinmux(0, true, 2, 1); mimxrt1050_evk_usdhc_pinmux(0, true, 2, 1);
imxrt_usdhc_pinmux_cb_register(mimxrt1050_evk_usdhc_pinmux); imxrt_usdhc_pinmux_cb_register(mimxrt1050_evk_usdhc_pinmux);
#endif #endif
@ -316,7 +316,7 @@ static int mimxrt1050_evk_init(struct device *dev)
return 0; return 0;
} }
#if DT_HAS_NODE(DT_NODELABEL(enet)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(enet))
static int mimxrt1050_evk_phy_reset(struct device *dev) static int mimxrt1050_evk_phy_reset(struct device *dev)
{ {
/* RESET PHY chip. */ /* RESET PHY chip. */
@ -328,6 +328,6 @@ static int mimxrt1050_evk_phy_reset(struct device *dev)
#endif #endif
SYS_INIT(mimxrt1050_evk_init, PRE_KERNEL_1, 0); SYS_INIT(mimxrt1050_evk_init, PRE_KERNEL_1, 0);
#if DT_HAS_NODE(DT_NODELABEL(enet)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(enet))
SYS_INIT(mimxrt1050_evk_phy_reset, PRE_KERNEL_2, 0); SYS_INIT(mimxrt1050_evk_phy_reset, PRE_KERNEL_2, 0);
#endif #endif

18
boards/arm/mimxrt1060_evk/pinmux.c
View file

@ -9,7 +9,7 @@
#include <fsl_gpio.h> #include <fsl_gpio.h>
#include <soc.h> #include <soc.h>
#if DT_HAS_NODE(DT_NODELABEL(enet)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(enet))
static gpio_pin_config_t enet_gpio_config = { static gpio_pin_config_t enet_gpio_config = {
.direction = kGPIO_DigitalOutput, .direction = kGPIO_DigitalOutput,
.outputLogic = 0, .outputLogic = 0,
@ -33,7 +33,7 @@ static int mimxrt1060_evk_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if !DT_HAS_NODE(DT_NODELABEL(enet)) #if !DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(enet))
/* LED */ /* LED */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0);
@ -46,7 +46,7 @@ static int mimxrt1060_evk_init(struct device *dev)
IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0); IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpuart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpuart1))
/* LPUART1 TX/RX */ /* LPUART1 TX/RX */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0);
@ -62,7 +62,7 @@ static int mimxrt1060_evk_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpuart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpuart3))
/* LPUART3 TX/RX */ /* LPUART3 TX/RX */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_LPUART3_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_LPUART3_TX, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_07_LPUART3_RX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_07_LPUART3_RX, 0);
@ -78,7 +78,7 @@ static int mimxrt1060_evk_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpi2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpi2c1))
/* LPI2C1 SCL, SDA */ /* LPI2C1 SCL, SDA */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, 1);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, 1);
@ -98,7 +98,7 @@ static int mimxrt1060_evk_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(enet)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(enet))
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_10_GPIO1_IO10, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_10_GPIO1_IO10, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0);
@ -136,7 +136,7 @@ static int mimxrt1060_evk_init(struct device *dev)
GPIO_WritePinOutput(GPIO1, 9, 0); GPIO_WritePinOutput(GPIO1, 9, 0);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lcdif)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lcdif))
IOMUXC_SetPinMux(IOMUXC_GPIO_B0_00_LCD_CLK, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_B0_00_LCD_CLK, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_B0_01_LCD_ENABLE, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_B0_01_LCD_ENABLE, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_B0_02_LCD_HSYNC, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_B0_02_LCD_HSYNC, 0);
@ -198,7 +198,7 @@ static int mimxrt1060_evk_init(struct device *dev)
return 0; return 0;
} }
#if DT_HAS_NODE(DT_NODELABEL(enet)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(enet))
static int mimxrt1060_evk_phy_reset(struct device *dev) static int mimxrt1060_evk_phy_reset(struct device *dev)
{ {
/* RESET PHY chip. */ /* RESET PHY chip. */
@ -210,6 +210,6 @@ static int mimxrt1060_evk_phy_reset(struct device *dev)
#endif #endif
SYS_INIT(mimxrt1060_evk_init, PRE_KERNEL_1, 0); SYS_INIT(mimxrt1060_evk_init, PRE_KERNEL_1, 0);
#if DT_HAS_NODE(DT_NODELABEL(enet)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(enet))
SYS_INIT(mimxrt1060_evk_phy_reset, PRE_KERNEL_2, 0); SYS_INIT(mimxrt1060_evk_phy_reset, PRE_KERNEL_2, 0);
#endif #endif

20
boards/arm/mimxrt1064_evk/pinmux.c
View file

@ -8,7 +8,7 @@
#include <fsl_iomuxc.h> #include <fsl_iomuxc.h>
#include <fsl_gpio.h> #include <fsl_gpio.h>
#if DT_HAS_NODE(DT_NODELABEL(enet)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(enet))
static gpio_pin_config_t enet_gpio_config = { static gpio_pin_config_t enet_gpio_config = {
.direction = kGPIO_DigitalOutput, .direction = kGPIO_DigitalOutput,
.outputLogic = 0, .outputLogic = 0,
@ -32,7 +32,7 @@ static int mimxrt1064_evk_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if !DT_HAS_NODE(DT_NODELABEL(enet)) #if !DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(enet))
/* LED */ /* LED */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0);
@ -45,7 +45,7 @@ static int mimxrt1064_evk_init(struct device *dev)
IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0); IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpuart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpuart1))
/* LPUART1 TX/RX */ /* LPUART1 TX/RX */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0);
@ -61,7 +61,7 @@ static int mimxrt1064_evk_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lcdif)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lcdif))
IOMUXC_SetPinMux(IOMUXC_GPIO_B0_00_LCD_CLK, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_B0_00_LCD_CLK, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_B0_01_LCD_ENABLE, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_B0_01_LCD_ENABLE, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_B0_02_LCD_HSYNC, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_B0_02_LCD_HSYNC, 0);
@ -120,7 +120,7 @@ static int mimxrt1064_evk_init(struct device *dev)
GPIO_PinInit(GPIO2, 31, &config); GPIO_PinInit(GPIO2, 31, &config);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpi2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpi2c1))
/* LPI2C1 SCL, SDA */ /* LPI2C1 SCL, SDA */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, 1);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, 1);
@ -140,7 +140,7 @@ static int mimxrt1064_evk_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(enet)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(enet))
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_10_GPIO1_IO10, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_10_GPIO1_IO10, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0);
@ -178,11 +178,11 @@ static int mimxrt1064_evk_init(struct device *dev)
GPIO_WritePinOutput(GPIO1, 9, 0); GPIO_WritePinOutput(GPIO1, 9, 0);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(flexpwm2_pwm3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(flexpwm2_pwm3))
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_FLEXPWM2_PWMA03, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_FLEXPWM2_PWMA03, 0);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(csi)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(csi))
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_04_GPIO1_IO04, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_04_GPIO1_IO04, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_04_CSI_PIXCLK, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_04_CSI_PIXCLK, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_05_CSI_MCLK, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_05_CSI_MCLK, 0);
@ -201,7 +201,7 @@ static int mimxrt1064_evk_init(struct device *dev)
return 0; return 0;
} }
#if DT_HAS_NODE(DT_NODELABEL(enet)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(enet))
static int mimxrt1064_evk_phy_reset(struct device *dev) static int mimxrt1064_evk_phy_reset(struct device *dev)
{ {
/* RESET PHY chip. */ /* RESET PHY chip. */
@ -213,6 +213,6 @@ static int mimxrt1064_evk_phy_reset(struct device *dev)
#endif #endif
SYS_INIT(mimxrt1064_evk_init, PRE_KERNEL_1, 0); SYS_INIT(mimxrt1064_evk_init, PRE_KERNEL_1, 0);
#if DT_HAS_NODE(DT_NODELABEL(enet)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(enet))
SYS_INIT(mimxrt1064_evk_phy_reset, PRE_KERNEL_2, 0); SYS_INIT(mimxrt1064_evk_phy_reset, PRE_KERNEL_2, 0);
#endif #endif

14
boards/arm/mm_swiftio/pinmux.c
View file

@ -9,7 +9,7 @@
#include <fsl_gpio.h> #include <fsl_gpio.h>
#include <soc.h> #include <soc.h>
#if DT_HAS_NODE(DT_NODELABEL(enet)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(enet))
static gpio_pin_config_t enet_gpio_config = { static gpio_pin_config_t enet_gpio_config = {
.direction = kGPIO_DigitalOutput, .direction = kGPIO_DigitalOutput,
.outputLogic = 0, .outputLogic = 0,
@ -17,7 +17,7 @@ static gpio_pin_config_t enet_gpio_config = {
}; };
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usdhc1)) && CONFIG_DISK_ACCESS_USDHC1 #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usdhc1)) && CONFIG_DISK_ACCESS_USDHC1
/*Drive Strength Field: R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR) /*Drive Strength Field: R0(260 Ohm @ 3.3V, 150 Ohm@1.8V, 240 Ohm for DDR)
*Speed Field: medium(100MHz) *Speed Field: medium(100MHz)
@ -133,7 +133,7 @@ static int mm_swiftio_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#if DT_HAS_NODE(DT_NODELABEL(lpuart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpuart1))
/* LPUART1 TX/RX */ /* LPUART1 TX/RX */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0);
@ -149,7 +149,7 @@ static int mm_swiftio_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpi2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpi2c1))
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, 1);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, 1);
@ -168,7 +168,7 @@ static int mm_swiftio_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpi2c3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpi2c3))
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_07_LPI2C3_SCL, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_07_LPI2C3_SCL, 1);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_LPI2C3_SDA, 1); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_LPI2C3_SDA, 1);
@ -187,7 +187,7 @@ static int mm_swiftio_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpspi3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpspi3))
/* LPSPI3 SCK, SDO, SDI, PCS0 */ /* LPSPI3 SCK, SDO, SDI, PCS0 */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_00_LPSPI3_SCK, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_00_LPSPI3_SCK, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_01_LPSPI3_SDO, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_01_LPSPI3_SDO, 0);
@ -215,7 +215,7 @@ static int mm_swiftio_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usdhc1)) && CONFIG_DISK_ACCESS_USDHC1 #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usdhc1)) && CONFIG_DISK_ACCESS_USDHC1
mm_swiftio_usdhc_pinmux(0, true, 2, 1); mm_swiftio_usdhc_pinmux(0, true, 2, 1);
imxrt_usdhc_pinmux_cb_register(mm_swiftio_usdhc_pinmux); imxrt_usdhc_pinmux_cb_register(mm_swiftio_usdhc_pinmux);
#endif #endif

12
boards/arm/nucleo_f030r8/pinmux.c
View file

@ -15,23 +15,23 @@
/* pin assignments for NUCLEO-F030R8 board */ /* pin assignments for NUCLEO-F030R8 board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32F0_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32F0_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32F0_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32F0_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32F0_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F0_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F0_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F0_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32F0_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32F0_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32F0_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32F0_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c2))
{STM32_PIN_PA11, STM32F0_PINMUX_FUNC_PA11_I2C2_SCL}, {STM32_PIN_PA11, STM32F0_PINMUX_FUNC_PA11_I2C2_SCL},
{STM32_PIN_PA12, STM32F0_PINMUX_FUNC_PA12_I2C2_SDA}, {STM32_PIN_PA12, STM32F0_PINMUX_FUNC_PA12_I2C2_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F0_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32F0_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -39,7 +39,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA6, STM32F0_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32F0_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F0_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32F0_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F0_PINMUX_FUNC_PB12_SPI2_NSS}, {STM32_PIN_PB12, STM32F0_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */

12
boards/arm/nucleo_f070rb/pinmux.c
View file

@ -15,28 +15,28 @@
/* pin assignments for NUCLEO_F070RB board */ /* pin assignments for NUCLEO_F070RB board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32F0_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32F0_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32F0_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32F0_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32F0_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F0_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F0_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F0_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32F0_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32F0_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32F0_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32F0_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c2))
{STM32_PIN_PB10, STM32F0_PINMUX_FUNC_PB10_I2C2_SCL}, {STM32_PIN_PB10, STM32F0_PINMUX_FUNC_PB10_I2C2_SCL},
{STM32_PIN_PB11, STM32F0_PINMUX_FUNC_PB11_I2C2_SDA}, {STM32_PIN_PB11, STM32F0_PINMUX_FUNC_PB11_I2C2_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
{STM32_PIN_PA5, STM32F0_PINMUX_FUNC_PA5_SPI1_SCK}, {STM32_PIN_PA5, STM32F0_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F0_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32F0_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F0_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32F0_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
{STM32_PIN_PB13, STM32F0_PINMUX_FUNC_PB13_SPI2_SCK}, {STM32_PIN_PB13, STM32F0_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32F0_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32F0_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F0_PINMUX_FUNC_PB15_SPI2_MOSI}, {STM32_PIN_PB15, STM32F0_PINMUX_FUNC_PB15_SPI2_MOSI},

14
boards/arm/nucleo_f091rc/pinmux.c
View file

@ -14,33 +14,33 @@
/* pin assignments for NUCLEO-F091RC board */ /* pin assignments for NUCLEO-F091RC board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PB6, STM32F0_PINMUX_FUNC_PB6_USART1_TX}, {STM32_PIN_PB6, STM32F0_PINMUX_FUNC_PB6_USART1_TX},
{STM32_PIN_PB7, STM32F0_PINMUX_FUNC_PB7_USART1_RX}, {STM32_PIN_PB7, STM32F0_PINMUX_FUNC_PB7_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32F0_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F0_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F0_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F0_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32F0_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32F0_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32F0_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32F0_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c2))
{STM32_PIN_PA11, STM32F0_PINMUX_FUNC_PA11_I2C2_SCL}, {STM32_PIN_PA11, STM32F0_PINMUX_FUNC_PA11_I2C2_SCL},
{STM32_PIN_PA12, STM32F0_PINMUX_FUNC_PA12_I2C2_SDA}, {STM32_PIN_PA12, STM32F0_PINMUX_FUNC_PA12_I2C2_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
{STM32_PIN_PA5, STM32F0_PINMUX_FUNC_PA5_SPI1_SCK}, {STM32_PIN_PA5, STM32F0_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F0_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32F0_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F0_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32F0_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
{STM32_PIN_PB13, STM32F0_PINMUX_FUNC_PB13_SPI2_SCK}, {STM32_PIN_PB13, STM32F0_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32F0_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32F0_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F0_PINMUX_FUNC_PB15_SPI2_MOSI}, {STM32_PIN_PB15, STM32F0_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(adc1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(adc1))
{STM32_PIN_PA0, STM32F0_PINMUX_FUNC_PA0_ADC_IN0}, {STM32_PIN_PA0, STM32F0_PINMUX_FUNC_PA0_ADC_IN0},
#endif #endif
}; };

14
boards/arm/nucleo_f103rb/pinmux.c
View file

@ -14,22 +14,22 @@
/* pin assignments for NUCLEO-F103RB board */ /* pin assignments for NUCLEO-F103RB board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32F1_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32F1_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32F1_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32F1_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32F1_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F1_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F1_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F1_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart3))
{STM32_PIN_PB10, STM32F1_PINMUX_FUNC_PB10_USART3_TX}, {STM32_PIN_PB10, STM32F1_PINMUX_FUNC_PB10_USART3_TX},
{STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_USART3_RX}, {STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_USART3_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm1))
{STM32_PIN_PA8, STM32F1_PINMUX_FUNC_PA8_PWM1_CH1}, {STM32_PIN_PA8, STM32F1_PINMUX_FUNC_PA8_PWM1_CH1},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F1_PINMUX_FUNC_PA4_SPI1_MASTER_NSS}, {STM32_PIN_PA4, STM32F1_PINMUX_FUNC_PA4_SPI1_MASTER_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -37,7 +37,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA6, STM32F1_PINMUX_FUNC_PA6_SPI1_MASTER_MISO}, {STM32_PIN_PA6, STM32F1_PINMUX_FUNC_PA6_SPI1_MASTER_MISO},
{STM32_PIN_PA7, STM32F1_PINMUX_FUNC_PA7_SPI1_MASTER_MOSI}, {STM32_PIN_PA7, STM32F1_PINMUX_FUNC_PA7_SPI1_MASTER_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F1_PINMUX_FUNC_PB12_SPI2_MASTER_NSS}, {STM32_PIN_PB12, STM32F1_PINMUX_FUNC_PB12_SPI2_MASTER_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -45,7 +45,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB14, STM32F1_PINMUX_FUNC_PB14_SPI2_MASTER_MISO}, {STM32_PIN_PB14, STM32F1_PINMUX_FUNC_PB14_SPI2_MASTER_MISO},
{STM32_PIN_PB15, STM32F1_PINMUX_FUNC_PB15_SPI2_MASTER_MOSI}, {STM32_PIN_PB15, STM32F1_PINMUX_FUNC_PB15_SPI2_MASTER_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(adc1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(adc1))
{STM32_PIN_PA0, STM32F1_PINMUX_FUNC_PA0_ADC123_IN0}, {STM32_PIN_PA0, STM32F1_PINMUX_FUNC_PA0_ADC123_IN0},
#endif #endif
}; };

6
boards/arm/nucleo_f207zg/pinmux.c
View file

@ -14,11 +14,11 @@
/* pin assignments for NUCLEO-F207ZG board */ /* pin assignments for NUCLEO-F207ZG board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart3))
{STM32_PIN_PD8, STM32F2_PINMUX_FUNC_PD8_USART3_TX}, {STM32_PIN_PD8, STM32F2_PINMUX_FUNC_PD8_USART3_TX},
{STM32_PIN_PD9, STM32F2_PINMUX_FUNC_PD9_USART3_RX}, {STM32_PIN_PD9, STM32F2_PINMUX_FUNC_PD9_USART3_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart6)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart6))
{STM32_PIN_PG14, STM32F2_PINMUX_FUNC_PG14_USART6_TX}, {STM32_PIN_PG14, STM32F2_PINMUX_FUNC_PG14_USART6_TX},
{STM32_PIN_PG9, STM32F2_PINMUX_FUNC_PG9_USART6_RX}, {STM32_PIN_PG9, STM32F2_PINMUX_FUNC_PG9_USART6_RX},
#endif #endif
@ -39,7 +39,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA11, STM32F2_PINMUX_FUNC_PA11_OTG_FS_DM}, {STM32_PIN_PA11, STM32F2_PINMUX_FUNC_PA11_OTG_FS_DM},
{STM32_PIN_PA12, STM32F2_PINMUX_FUNC_PA12_OTG_FS_DP}, {STM32_PIN_PA12, STM32F2_PINMUX_FUNC_PA12_OTG_FS_DP},
#endif /* CONFIG_USB_DC_STM32 */ #endif /* CONFIG_USB_DC_STM32 */
#if DT_HAS_NODE(DT_NODELABEL(adc1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(adc1))
{STM32_PIN_PA0, STM32F2_PINMUX_FUNC_PA0_ADC123_IN0}, {STM32_PIN_PA0, STM32F2_PINMUX_FUNC_PA0_ADC123_IN0},
#endif #endif
}; };

14
boards/arm/nucleo_f302r8/pinmux.c
View file

@ -14,23 +14,23 @@
/* pin assignments for NUCLEO-F302R8 board */ /* pin assignments for NUCLEO-F302R8 board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart3))
{STM32_PIN_PC10, STM32F3_PINMUX_FUNC_PC10_USART3_TX}, {STM32_PIN_PC10, STM32F3_PINMUX_FUNC_PC10_USART3_TX},
{STM32_PIN_PC11, STM32F3_PINMUX_FUNC_PC11_USART3_RX}, {STM32_PIN_PC11, STM32F3_PINMUX_FUNC_PC11_USART3_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32F3_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32F3_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32F3_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32F3_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS}, {STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -38,10 +38,10 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI}, {STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm2))
{STM32_PIN_PA0, STM32F3_PINMUX_FUNC_PA0_PWM2_CH1}, {STM32_PIN_PA0, STM32F3_PINMUX_FUNC_PA0_PWM2_CH1},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(adc1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(adc1))
{STM32_PIN_PA0, STM32F3_PINMUX_FUNC_PA0_ADC1_IN1}, {STM32_PIN_PA0, STM32F3_PINMUX_FUNC_PA0_ADC1_IN1},
#endif #endif
}; };

2
boards/arm/nucleo_f303re/pinmux.c
View file

@ -14,7 +14,7 @@
/* pin assignments for NUCLEO-F303RE board */ /* pin assignments for NUCLEO-F303RE board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif

12
boards/arm/nucleo_f334r8/pinmux.c
View file

@ -14,23 +14,23 @@
/* pin assignments for NUCLEO-F334RB board */ /* pin assignments for NUCLEO-F334RB board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart3))
{STM32_PIN_PB10, STM32F3_PINMUX_FUNC_PB10_USART3_TX}, {STM32_PIN_PB10, STM32F3_PINMUX_FUNC_PB10_USART3_TX},
{STM32_PIN_PB11, STM32F3_PINMUX_FUNC_PB11_USART3_RX}, {STM32_PIN_PB11, STM32F3_PINMUX_FUNC_PB11_USART3_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32F3_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32F3_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32F3_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32F3_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -38,7 +38,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm1))
{STM32_PIN_PA8, STM32F3_PINMUX_FUNC_PA8_PWM1_CH1}, {STM32_PIN_PA8, STM32F3_PINMUX_FUNC_PA8_PWM1_CH1},
#endif #endif
}; };

14
boards/arm/nucleo_f401re/pinmux.c
View file

@ -14,22 +14,22 @@
/* pin assignments for NUCLEO-F401RE board */ /* pin assignments for NUCLEO-F401RE board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_USART1_TX}, {STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_USART1_TX},
{STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_USART1_RX}, {STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm2))
{STM32_PIN_PA0, STM32F4_PINMUX_FUNC_PA0_PWM2_CH1}, {STM32_PIN_PA0, STM32F4_PINMUX_FUNC_PA0_PWM2_CH1},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -37,7 +37,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32F4_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_SPI2_NSS}, {STM32_PIN_PB12, STM32F4_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -45,7 +45,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI}, {STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(adc1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(adc1))
{STM32_PIN_PA0, STM32F4_PINMUX_FUNC_PA0_ADC123_IN0}, {STM32_PIN_PA0, STM32F4_PINMUX_FUNC_PA0_ADC123_IN0},
#endif #endif
}; };

12
boards/arm/nucleo_f411re/pinmux.c
View file

@ -14,27 +14,27 @@
/* pin assignments for NUCLEO-F411RE board */ /* pin assignments for NUCLEO-F411RE board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_USART1_TX}, {STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_USART1_TX},
{STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_USART1_RX}, {STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c2))
{STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_I2C2_SCL}, {STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_I2C2_SCL},
{STM32_PIN_PB3, STM32F4_PINMUX_FUNC_PB3_I2C2_SDA}, {STM32_PIN_PB3, STM32F4_PINMUX_FUNC_PB3_I2C2_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c3))
{STM32_PIN_PA8, STM32F4_PINMUX_FUNC_PA8_I2C3_SCL}, {STM32_PIN_PA8, STM32F4_PINMUX_FUNC_PA8_I2C3_SCL},
{STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_I2C3_SDA}, {STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_I2C3_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */

10
boards/arm/nucleo_f412zg/pinmux.c
View file

@ -14,26 +14,26 @@
/* pin assignments for NUCLEO-F412ZG board */ /* pin assignments for NUCLEO-F412ZG board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart3))
{STM32_PIN_PD8, STM32F4_PINMUX_FUNC_PD8_USART3_TX}, {STM32_PIN_PD8, STM32F4_PINMUX_FUNC_PD8_USART3_TX},
{STM32_PIN_PD9, STM32F4_PINMUX_FUNC_PD9_USART3_RX}, {STM32_PIN_PD9, STM32F4_PINMUX_FUNC_PD9_USART3_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart6)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart6))
{STM32_PIN_PG14, STM32F4_PINMUX_FUNC_PG14_USART6_TX}, {STM32_PIN_PG14, STM32F4_PINMUX_FUNC_PG14_USART6_TX},
{STM32_PIN_PG9, STM32F4_PINMUX_FUNC_PG9_USART6_RX}, {STM32_PIN_PG9, STM32F4_PINMUX_FUNC_PG9_USART6_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm2))
{STM32_PIN_PA0, STM32F4_PINMUX_FUNC_PA0_PWM2_CH1}, {STM32_PIN_PA0, STM32F4_PINMUX_FUNC_PA0_PWM2_CH1},
#endif #endif
#ifdef CONFIG_USB_DC_STM32 #ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM}, {STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM},
{STM32_PIN_PA12, STM32F4_PINMUX_FUNC_PA12_OTG_FS_DP}, {STM32_PIN_PA12, STM32F4_PINMUX_FUNC_PA12_OTG_FS_DP},
#endif /* CONFIG_USB_DC_STM32 */ #endif /* CONFIG_USB_DC_STM32 */
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */

10
boards/arm/nucleo_f413zh/pinmux.c
View file

@ -14,26 +14,26 @@
/* pin assignments for NUCLEO-F413ZH board */ /* pin assignments for NUCLEO-F413ZH board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart3))
{STM32_PIN_PD8, STM32F4_PINMUX_FUNC_PD8_USART3_TX}, {STM32_PIN_PD8, STM32F4_PINMUX_FUNC_PD8_USART3_TX},
{STM32_PIN_PD9, STM32F4_PINMUX_FUNC_PD9_USART3_RX}, {STM32_PIN_PD9, STM32F4_PINMUX_FUNC_PD9_USART3_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart6)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart6))
{STM32_PIN_PG14, STM32F4_PINMUX_FUNC_PG14_USART6_TX}, {STM32_PIN_PG14, STM32F4_PINMUX_FUNC_PG14_USART6_TX},
{STM32_PIN_PG9, STM32F4_PINMUX_FUNC_PG9_USART6_RX}, {STM32_PIN_PG9, STM32F4_PINMUX_FUNC_PG9_USART6_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm2))
{STM32_PIN_PA0, STM32F4_PINMUX_FUNC_PA0_PWM2_CH1}, {STM32_PIN_PA0, STM32F4_PINMUX_FUNC_PA0_PWM2_CH1},
#endif #endif
#ifdef CONFIG_USB_DC_STM32 #ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM}, {STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM},
{STM32_PIN_PA12, STM32F4_PINMUX_FUNC_PA12_OTG_FS_DP}, {STM32_PIN_PA12, STM32F4_PINMUX_FUNC_PA12_OTG_FS_DP},
#endif /* CONFIG_USB_DC_STM32 */ #endif /* CONFIG_USB_DC_STM32 */
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */

10
boards/arm/nucleo_f429zi/pinmux.c
View file

@ -14,15 +14,15 @@
/* pin assignments for NUCLEO-F429ZI board */ /* pin assignments for NUCLEO-F429ZI board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart3))
{STM32_PIN_PD8, STM32F4_PINMUX_FUNC_PD8_USART3_TX}, {STM32_PIN_PD8, STM32F4_PINMUX_FUNC_PD8_USART3_TX},
{STM32_PIN_PD9, STM32F4_PINMUX_FUNC_PD9_USART3_RX}, {STM32_PIN_PD9, STM32F4_PINMUX_FUNC_PD9_USART3_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart6)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart6))
{STM32_PIN_PG14, STM32F4_PINMUX_FUNC_PG14_USART6_TX}, {STM32_PIN_PG14, STM32F4_PINMUX_FUNC_PG14_USART6_TX},
{STM32_PIN_PG9, STM32F4_PINMUX_FUNC_PG9_USART6_RX}, {STM32_PIN_PG9, STM32F4_PINMUX_FUNC_PG9_USART6_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm1))
{STM32_PIN_PE13, STM32F4_PINMUX_FUNC_PE13_PWM1_CH3}, {STM32_PIN_PE13, STM32F4_PINMUX_FUNC_PE13_PWM1_CH3},
#endif #endif
#ifdef CONFIG_ETH_STM32_HAL #ifdef CONFIG_ETH_STM32_HAL
@ -38,11 +38,11 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PG13, STM32F4_PINMUX_FUNC_PG13_ETH}, {STM32_PIN_PG13, STM32F4_PINMUX_FUNC_PG13_ETH},
{STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_ETH}, {STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_ETH},
#endif /* CONFIG_ETH_STM32_HAL */ #endif /* CONFIG_ETH_STM32_HAL */
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */

12
boards/arm/nucleo_f446re/pinmux.c
View file

@ -14,27 +14,27 @@
/* pin assignments for stm32F446RE Nucleo board */ /* pin assignments for stm32F446RE Nucleo board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_USART1_TX}, {STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_USART1_TX},
{STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_USART1_RX}, {STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c2))
{STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_I2C2_SCL}, {STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_I2C2_SCL},
{STM32_PIN_PB3, STM32F4_PINMUX_FUNC_PB3_I2C2_SDA}, {STM32_PIN_PB3, STM32F4_PINMUX_FUNC_PB3_I2C2_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c3))
{STM32_PIN_PA8, STM32F4_PINMUX_FUNC_PA8_I2C3_SCL}, {STM32_PIN_PA8, STM32F4_PINMUX_FUNC_PA8_I2C3_SCL},
{STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_I2C3_SDA}, {STM32_PIN_PB4, STM32F4_PINMUX_FUNC_PB4_I2C3_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32F4_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */

16
boards/arm/nucleo_f746zg/pinmux.c
View file

@ -20,17 +20,17 @@
* for the SPI_1 MOSI signal. * for the SPI_1 MOSI signal.
*/ */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{ STM32_PIN_PD5, STM32F7_PINMUX_FUNC_PD5_USART2_TX }, { STM32_PIN_PD5, STM32F7_PINMUX_FUNC_PD5_USART2_TX },
{ STM32_PIN_PD6, STM32F7_PINMUX_FUNC_PD6_USART2_RX }, { STM32_PIN_PD6, STM32F7_PINMUX_FUNC_PD6_USART2_RX },
{ STM32_PIN_PD4, STM32F7_PINMUX_FUNC_PD4_USART2_RTS }, { STM32_PIN_PD4, STM32F7_PINMUX_FUNC_PD4_USART2_RTS },
{ STM32_PIN_PD3, STM32F7_PINMUX_FUNC_PD3_USART2_CTS }, { STM32_PIN_PD3, STM32F7_PINMUX_FUNC_PD3_USART2_CTS },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart3))
{ STM32_PIN_PD8, STM32F7_PINMUX_FUNC_PD8_USART3_TX }, { STM32_PIN_PD8, STM32F7_PINMUX_FUNC_PD8_USART3_TX },
{ STM32_PIN_PD9, STM32F7_PINMUX_FUNC_PD9_USART3_RX }, { STM32_PIN_PD9, STM32F7_PINMUX_FUNC_PD9_USART3_RX },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart6)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart6))
{ STM32_PIN_PG14, STM32F7_PINMUX_FUNC_PG14_USART6_TX }, { STM32_PIN_PG14, STM32F7_PINMUX_FUNC_PG14_USART6_TX },
{ STM32_PIN_PG9, STM32F7_PINMUX_FUNC_PG9_USART6_RX }, { STM32_PIN_PG9, STM32F7_PINMUX_FUNC_PG9_USART6_RX },
#endif #endif
@ -49,14 +49,14 @@ static const struct pin_config pinconf[] = {
{ STM32_PIN_PA11, STM32F7_PINMUX_FUNC_PA11_OTG_FS_DM }, { STM32_PIN_PA11, STM32F7_PINMUX_FUNC_PA11_OTG_FS_DM },
{ STM32_PIN_PA12, STM32F7_PINMUX_FUNC_PA12_OTG_FS_DP }, { STM32_PIN_PA12, STM32F7_PINMUX_FUNC_PA12_OTG_FS_DP },
#endif /* CONFIG_USB_DC_STM32 */ #endif /* CONFIG_USB_DC_STM32 */
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{ STM32_PIN_PB8, STM32F7_PINMUX_FUNC_PB8_I2C1_SCL }, { STM32_PIN_PB8, STM32F7_PINMUX_FUNC_PB8_I2C1_SCL },
{ STM32_PIN_PB9, STM32F7_PINMUX_FUNC_PB9_I2C1_SDA }, { STM32_PIN_PB9, STM32F7_PINMUX_FUNC_PB9_I2C1_SDA },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm1))
{ STM32_PIN_PE13, STM32F7_PINMUX_FUNC_PE13_PWM1_CH3 }, { STM32_PIN_PE13, STM32F7_PINMUX_FUNC_PE13_PWM1_CH3 },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{ STM32_PIN_PA4, STM32F7_PINMUX_FUNC_PA4_SPI1_NSS }, { STM32_PIN_PA4, STM32F7_PINMUX_FUNC_PA4_SPI1_NSS },
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -64,11 +64,11 @@ static const struct pin_config pinconf[] = {
{ STM32_PIN_PA6, STM32F7_PINMUX_FUNC_PA6_SPI1_MISO }, { STM32_PIN_PA6, STM32F7_PINMUX_FUNC_PA6_SPI1_MISO },
{ STM32_PIN_PA7, STM32F7_PINMUX_FUNC_PA7_SPI1_MOSI }, { STM32_PIN_PA7, STM32F7_PINMUX_FUNC_PA7_SPI1_MOSI },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(can1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(can1))
{STM32_PIN_PD0, STM32F7_PINMUX_FUNC_PD0_CAN_RX}, {STM32_PIN_PD0, STM32F7_PINMUX_FUNC_PD0_CAN_RX},
{STM32_PIN_PD1, STM32F7_PINMUX_FUNC_PD1_CAN_TX}, {STM32_PIN_PD1, STM32F7_PINMUX_FUNC_PD1_CAN_TX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(adc1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(adc1))
{ STM32_PIN_PA0, STM32F7_PINMUX_FUNC_PA0_ADC123_IN0 }, { STM32_PIN_PA0, STM32F7_PINMUX_FUNC_PA0_ADC123_IN0 },
#endif #endif
}; };

12
boards/arm/nucleo_f756zg/pinmux.c
View file

@ -20,17 +20,17 @@
* for the SPI_1 MOSI signal. * for the SPI_1 MOSI signal.
*/ */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{ STM32_PIN_PD5, STM32F7_PINMUX_FUNC_PD5_USART2_TX }, { STM32_PIN_PD5, STM32F7_PINMUX_FUNC_PD5_USART2_TX },
{ STM32_PIN_PD6, STM32F7_PINMUX_FUNC_PD6_USART2_RX }, { STM32_PIN_PD6, STM32F7_PINMUX_FUNC_PD6_USART2_RX },
{ STM32_PIN_PD4, STM32F7_PINMUX_FUNC_PD4_USART2_RTS }, { STM32_PIN_PD4, STM32F7_PINMUX_FUNC_PD4_USART2_RTS },
{ STM32_PIN_PD3, STM32F7_PINMUX_FUNC_PD3_USART2_CTS }, { STM32_PIN_PD3, STM32F7_PINMUX_FUNC_PD3_USART2_CTS },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart3))
{ STM32_PIN_PD8, STM32F7_PINMUX_FUNC_PD8_USART3_TX }, { STM32_PIN_PD8, STM32F7_PINMUX_FUNC_PD8_USART3_TX },
{ STM32_PIN_PD9, STM32F7_PINMUX_FUNC_PD9_USART3_RX }, { STM32_PIN_PD9, STM32F7_PINMUX_FUNC_PD9_USART3_RX },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart6)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart6))
{ STM32_PIN_PG14, STM32F7_PINMUX_FUNC_PG14_USART6_TX }, { STM32_PIN_PG14, STM32F7_PINMUX_FUNC_PG14_USART6_TX },
{ STM32_PIN_PG9, STM32F7_PINMUX_FUNC_PG9_USART6_RX }, { STM32_PIN_PG9, STM32F7_PINMUX_FUNC_PG9_USART6_RX },
#endif #endif
@ -49,14 +49,14 @@ static const struct pin_config pinconf[] = {
{ STM32_PIN_PA11, STM32F7_PINMUX_FUNC_PA11_OTG_FS_DM }, { STM32_PIN_PA11, STM32F7_PINMUX_FUNC_PA11_OTG_FS_DM },
{ STM32_PIN_PA12, STM32F7_PINMUX_FUNC_PA12_OTG_FS_DP }, { STM32_PIN_PA12, STM32F7_PINMUX_FUNC_PA12_OTG_FS_DP },
#endif /* CONFIG_USB_DC_STM32 */ #endif /* CONFIG_USB_DC_STM32 */
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{ STM32_PIN_PB8, STM32F7_PINMUX_FUNC_PB8_I2C1_SCL }, { STM32_PIN_PB8, STM32F7_PINMUX_FUNC_PB8_I2C1_SCL },
{ STM32_PIN_PB9, STM32F7_PINMUX_FUNC_PB9_I2C1_SDA }, { STM32_PIN_PB9, STM32F7_PINMUX_FUNC_PB9_I2C1_SDA },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm1))
{ STM32_PIN_PE13, STM32F7_PINMUX_FUNC_PE13_PWM1_CH3 }, { STM32_PIN_PE13, STM32F7_PINMUX_FUNC_PE13_PWM1_CH3 },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{ STM32_PIN_PA4, STM32F7_PINMUX_FUNC_PA4_SPI1_NSS }, { STM32_PIN_PA4, STM32F7_PINMUX_FUNC_PA4_SPI1_NSS },
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */

16
boards/arm/nucleo_f767zi/pinmux.c
View file

@ -20,17 +20,17 @@
* for the SPI_1 MOSI signal. * for the SPI_1 MOSI signal.
*/ */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{ STM32_PIN_PD5, STM32F7_PINMUX_FUNC_PD5_USART2_TX }, { STM32_PIN_PD5, STM32F7_PINMUX_FUNC_PD5_USART2_TX },
{ STM32_PIN_PD6, STM32F7_PINMUX_FUNC_PD6_USART2_RX }, { STM32_PIN_PD6, STM32F7_PINMUX_FUNC_PD6_USART2_RX },
{ STM32_PIN_PD4, STM32F7_PINMUX_FUNC_PD4_USART2_RTS }, { STM32_PIN_PD4, STM32F7_PINMUX_FUNC_PD4_USART2_RTS },
{ STM32_PIN_PD3, STM32F7_PINMUX_FUNC_PD3_USART2_CTS }, { STM32_PIN_PD3, STM32F7_PINMUX_FUNC_PD3_USART2_CTS },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart3))
{ STM32_PIN_PD8, STM32F7_PINMUX_FUNC_PD8_USART3_TX }, { STM32_PIN_PD8, STM32F7_PINMUX_FUNC_PD8_USART3_TX },
{ STM32_PIN_PD9, STM32F7_PINMUX_FUNC_PD9_USART3_RX }, { STM32_PIN_PD9, STM32F7_PINMUX_FUNC_PD9_USART3_RX },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart6)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart6))
{ STM32_PIN_PG14, STM32F7_PINMUX_FUNC_PG14_USART6_TX }, { STM32_PIN_PG14, STM32F7_PINMUX_FUNC_PG14_USART6_TX },
{ STM32_PIN_PG9, STM32F7_PINMUX_FUNC_PG9_USART6_RX }, { STM32_PIN_PG9, STM32F7_PINMUX_FUNC_PG9_USART6_RX },
#endif #endif
@ -49,14 +49,14 @@ static const struct pin_config pinconf[] = {
{ STM32_PIN_PA11, STM32F7_PINMUX_FUNC_PA11_OTG_FS_DM }, { STM32_PIN_PA11, STM32F7_PINMUX_FUNC_PA11_OTG_FS_DM },
{ STM32_PIN_PA12, STM32F7_PINMUX_FUNC_PA12_OTG_FS_DP }, { STM32_PIN_PA12, STM32F7_PINMUX_FUNC_PA12_OTG_FS_DP },
#endif /* CONFIG_USB_DC_STM32 */ #endif /* CONFIG_USB_DC_STM32 */
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{ STM32_PIN_PB8, STM32F7_PINMUX_FUNC_PB8_I2C1_SCL }, { STM32_PIN_PB8, STM32F7_PINMUX_FUNC_PB8_I2C1_SCL },
{ STM32_PIN_PB9, STM32F7_PINMUX_FUNC_PB9_I2C1_SDA }, { STM32_PIN_PB9, STM32F7_PINMUX_FUNC_PB9_I2C1_SDA },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm1))
{ STM32_PIN_PE13, STM32F7_PINMUX_FUNC_PE13_PWM1_CH3 }, { STM32_PIN_PE13, STM32F7_PINMUX_FUNC_PE13_PWM1_CH3 },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{ STM32_PIN_PA4, STM32F7_PINMUX_FUNC_PA4_SPI1_NSS }, { STM32_PIN_PA4, STM32F7_PINMUX_FUNC_PA4_SPI1_NSS },
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -64,11 +64,11 @@ static const struct pin_config pinconf[] = {
{ STM32_PIN_PA6, STM32F7_PINMUX_FUNC_PA6_SPI1_MISO }, { STM32_PIN_PA6, STM32F7_PINMUX_FUNC_PA6_SPI1_MISO },
{ STM32_PIN_PA7, STM32F7_PINMUX_FUNC_PA7_SPI1_MOSI }, { STM32_PIN_PA7, STM32F7_PINMUX_FUNC_PA7_SPI1_MOSI },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(can1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(can1))
{STM32_PIN_PD0, STM32F7_PINMUX_FUNC_PD0_CAN_RX}, {STM32_PIN_PD0, STM32F7_PINMUX_FUNC_PD0_CAN_RX},
{STM32_PIN_PD1, STM32F7_PINMUX_FUNC_PD1_CAN_TX}, {STM32_PIN_PD1, STM32F7_PINMUX_FUNC_PD1_CAN_TX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(adc1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(adc1))
{ STM32_PIN_PA0, STM32F7_PINMUX_FUNC_PA0_ADC123_IN0 }, { STM32_PIN_PA0, STM32F7_PINMUX_FUNC_PA0_ADC123_IN0 },
#endif #endif
}; };

2
boards/arm/nucleo_g071rb/pinmux.c
View file

@ -15,7 +15,7 @@
/* pin assignments for NUCLEO-G071RB board */ /* pin assignments for NUCLEO-G071RB board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32G0_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32G0_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32G0_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32G0_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif

14
boards/arm/nucleo_g431rb/pinmux.c
View file

@ -14,22 +14,22 @@
/* pin assignments for NUCLEO-G431RB board */ /* pin assignments for NUCLEO-G431RB board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PC4, STM32G4X_PINMUX_FUNC_PC4_USART1_TX}, {STM32_PIN_PC4, STM32G4X_PINMUX_FUNC_PC4_USART1_TX},
{STM32_PIN_PC5, STM32G4X_PINMUX_FUNC_PC5_USART1_RX}, {STM32_PIN_PC5, STM32G4X_PINMUX_FUNC_PC5_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpuart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpuart1))
{STM32_PIN_PA2, STM32G4X_PINMUX_FUNC_PA2_LPUART1_TX}, {STM32_PIN_PA2, STM32G4X_PINMUX_FUNC_PA2_LPUART1_TX},
{STM32_PIN_PA3, STM32G4X_PINMUX_FUNC_PA3_LPUART1_RX}, {STM32_PIN_PA3, STM32G4X_PINMUX_FUNC_PA3_LPUART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32G4X_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32G4X_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32G4X_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32G4X_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm2))
{STM32_PIN_PA5, STM32G4X_PINMUX_FUNC_PA5_PWM2_CH1}, {STM32_PIN_PA5, STM32G4X_PINMUX_FUNC_PA5_PWM2_CH1},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
/* SPI1 on the Arduino connectors pins A2, D3, D11, D12 */ /* SPI1 on the Arduino connectors pins A2, D3, D11, D12 */
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32G4X_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32G4X_PINMUX_FUNC_PA4_SPI1_NSS},
@ -39,7 +39,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA6, STM32G4X_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32G4X_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32G4X_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32G4X_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
/* SPI2 on the ST Morpho Connector CN10 pins 16, 30, 28, 26*/ /* SPI2 on the ST Morpho Connector CN10 pins 16, 30, 28, 26*/
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32G4X_PINMUX_FUNC_PB12_SPI2_NSS}, {STM32_PIN_PB12, STM32G4X_PINMUX_FUNC_PB12_SPI2_NSS},
@ -48,7 +48,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB14, STM32G4X_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32G4X_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32G4X_PINMUX_FUNC_PB15_SPI2_MOSI}, {STM32_PIN_PB15, STM32G4X_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi3))
/* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/ /* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA15, STM32G4X_PINMUX_FUNC_PA15_SPI3_NSS}, {STM32_PIN_PA15, STM32G4X_PINMUX_FUNC_PA15_SPI3_NSS},

14
boards/arm/nucleo_g474re/pinmux.c
View file

@ -14,22 +14,22 @@
/* pin assignments for NUCLEO-G474RE board */ /* pin assignments for NUCLEO-G474RE board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PC4, STM32G4X_PINMUX_FUNC_PC4_USART1_TX}, {STM32_PIN_PC4, STM32G4X_PINMUX_FUNC_PC4_USART1_TX},
{STM32_PIN_PC5, STM32G4X_PINMUX_FUNC_PC5_USART1_RX}, {STM32_PIN_PC5, STM32G4X_PINMUX_FUNC_PC5_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpuart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpuart1))
{STM32_PIN_PA2, STM32G4X_PINMUX_FUNC_PA2_LPUART1_TX}, {STM32_PIN_PA2, STM32G4X_PINMUX_FUNC_PA2_LPUART1_TX},
{STM32_PIN_PA3, STM32G4X_PINMUX_FUNC_PA3_LPUART1_RX}, {STM32_PIN_PA3, STM32G4X_PINMUX_FUNC_PA3_LPUART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32G4X_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32G4X_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32G4X_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32G4X_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm2))
{STM32_PIN_PA5, STM32G4X_PINMUX_FUNC_PA5_PWM2_CH1}, {STM32_PIN_PA5, STM32G4X_PINMUX_FUNC_PA5_PWM2_CH1},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
/* SPI1 on the Arduino connectors pins A2, D3, D11, D12 */ /* SPI1 on the Arduino connectors pins A2, D3, D11, D12 */
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32G4X_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32G4X_PINMUX_FUNC_PA4_SPI1_NSS},
@ -39,7 +39,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA6, STM32G4X_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32G4X_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32G4X_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32G4X_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
/* SPI2 on the ST Morpho Connector CN10 pins 16, 30, 28, 26*/ /* SPI2 on the ST Morpho Connector CN10 pins 16, 30, 28, 26*/
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32G4X_PINMUX_FUNC_PB12_SPI2_NSS}, {STM32_PIN_PB12, STM32G4X_PINMUX_FUNC_PB12_SPI2_NSS},
@ -48,7 +48,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB14, STM32G4X_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32G4X_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32G4X_PINMUX_FUNC_PB15_SPI2_MOSI}, {STM32_PIN_PB15, STM32G4X_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi3))
/* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/ /* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA15, STM32G4X_PINMUX_FUNC_PA15_SPI3_NSS}, {STM32_PIN_PA15, STM32G4X_PINMUX_FUNC_PA15_SPI3_NSS},

6
boards/arm/nucleo_h743zi/pinmux.c
View file

@ -14,15 +14,15 @@
/* NUCLEO-H743ZI pin configurations */ /* NUCLEO-H743ZI pin configurations */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart3))
{ STM32_PIN_PD8, STM32H7_PINMUX_FUNC_PD8_USART3_TX }, { STM32_PIN_PD8, STM32H7_PINMUX_FUNC_PD8_USART3_TX },
{ STM32_PIN_PD9, STM32H7_PINMUX_FUNC_PD9_USART3_RX }, { STM32_PIN_PD9, STM32H7_PINMUX_FUNC_PD9_USART3_RX },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{ STM32_PIN_PB8, STM32H7_PINMUX_FUNC_PB8_I2C1_SCL }, { STM32_PIN_PB8, STM32H7_PINMUX_FUNC_PB8_I2C1_SCL },
{ STM32_PIN_PB9, STM32H7_PINMUX_FUNC_PB9_I2C1_SDA }, { STM32_PIN_PB9, STM32H7_PINMUX_FUNC_PB9_I2C1_SDA },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm12)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm12))
{ STM32_PIN_PB14, STM32H7_PINMUX_FUNC_PB14_PWM12_CH1 } { STM32_PIN_PB14, STM32H7_PINMUX_FUNC_PB14_PWM12_CH1 }
#endif #endif
}; };

8
boards/arm/nucleo_l053r8/pinmux.c
View file

@ -14,19 +14,19 @@
/* pin assignments for NUCLEO-L053R8 board */ /* pin assignments for NUCLEO-L053R8 board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PB6, STM32L0_PINMUX_FUNC_PB6_USART1_TX}, {STM32_PIN_PB6, STM32L0_PINMUX_FUNC_PB6_USART1_TX},
{STM32_PIN_PB7, STM32L0_PINMUX_FUNC_PB7_USART1_RX}, {STM32_PIN_PB7, STM32L0_PINMUX_FUNC_PB7_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32L0_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32L0_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32L0_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32L0_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32L0_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32L0_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32L0_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32L0_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
{STM32_PIN_PA5, STM32L0_PINMUX_FUNC_PA5_SPI1_SCK}, {STM32_PIN_PA5, STM32L0_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32L0_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32L0_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32L0_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32L0_PINMUX_FUNC_PA7_SPI1_MOSI},

12
boards/arm/nucleo_l073rz/pinmux.c
View file

@ -14,27 +14,27 @@
/* pin assignments for NUCLEO-L073RZ board */ /* pin assignments for NUCLEO-L073RZ board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PB6, STM32L0_PINMUX_FUNC_PB6_USART1_TX}, {STM32_PIN_PB6, STM32L0_PINMUX_FUNC_PB6_USART1_TX},
{STM32_PIN_PB7, STM32L0_PINMUX_FUNC_PB7_USART1_RX}, {STM32_PIN_PB7, STM32L0_PINMUX_FUNC_PB7_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32L0_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32L0_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32L0_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32L0_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32L0_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32L0_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32L0_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32L0_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
{STM32_PIN_PA5, STM32L0_PINMUX_FUNC_PA5_SPI1_SCK}, {STM32_PIN_PA5, STM32L0_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32L0_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32L0_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32L0_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32L0_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(adc1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(adc1))
{STM32_PIN_PA0, STM32L0_PINMUX_FUNC_PA0_ADC_IN0}, {STM32_PIN_PA0, STM32L0_PINMUX_FUNC_PA0_ADC_IN0},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(dac1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(dac1))
{STM32_PIN_PA4, STM32L0_PINMUX_FUNC_PA4_DAC_OUT1}, {STM32_PIN_PA4, STM32L0_PINMUX_FUNC_PA4_DAC_OUT1},
#endif /* dac1 */ #endif /* dac1 */
}; };

6
boards/arm/nucleo_l152re/pinmux.c
View file

@ -13,15 +13,15 @@
#include <pinmux/stm32/pinmux_stm32.h> #include <pinmux/stm32/pinmux_stm32.h>
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32L1X_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32L1X_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32L1X_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32L1X_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32L1X_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32L1X_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32L1X_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32L1X_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(adc1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(adc1))
{STM32_PIN_PA0, STM32L1X_PINMUX_FUNC_PA0_ADC1_IN0}, {STM32_PIN_PA0, STM32L1X_PINMUX_FUNC_PA0_ADC1_IN0},
#endif #endif
}; };

12
boards/arm/nucleo_l432kc/pinmux.c
View file

@ -15,22 +15,22 @@
/* pin assignments for NUCLEO-L432KC board */ /* pin assignments for NUCLEO-L432KC board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32L4X_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32L4X_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32L4X_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32L4X_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32L4X_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32L4X_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA15, STM32L4X_PINMUX_FUNC_PA15_USART2_RX}, {STM32_PIN_PA15, STM32L4X_PINMUX_FUNC_PA15_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB6, STM32L4X_PINMUX_FUNC_PB6_I2C1_SCL}, {STM32_PIN_PB6, STM32L4X_PINMUX_FUNC_PB6_I2C1_SCL},
{STM32_PIN_PB7, STM32L4X_PINMUX_FUNC_PB7_I2C1_SDA}, {STM32_PIN_PB7, STM32L4X_PINMUX_FUNC_PB7_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm2))
{STM32_PIN_PA0, STM32L4X_PINMUX_FUNC_PA0_PWM2_CH1}, {STM32_PIN_PA0, STM32L4X_PINMUX_FUNC_PA0_PWM2_CH1},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32L4X_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32L4X_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -38,7 +38,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(can1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(can1))
{STM32_PIN_PA11, STM32L4X_PINMUX_FUNC_PA11_CAN_RX}, {STM32_PIN_PA11, STM32L4X_PINMUX_FUNC_PA11_CAN_RX},
{STM32_PIN_PA12, STM32L4X_PINMUX_FUNC_PA12_CAN_TX}, {STM32_PIN_PA12, STM32L4X_PINMUX_FUNC_PA12_CAN_TX},
#endif #endif

12
boards/arm/nucleo_l452re/pinmux.c
View file

@ -14,22 +14,22 @@
/* pin assignments for NUCLEO-L452RE board */ /* pin assignments for NUCLEO-L452RE board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32L4X_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32L4X_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32L4X_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32L4X_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32L4X_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32L4X_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32L4X_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32L4X_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB6, STM32L4X_PINMUX_FUNC_PB6_I2C1_SCL}, {STM32_PIN_PB6, STM32L4X_PINMUX_FUNC_PB6_I2C1_SCL},
{STM32_PIN_PB7, STM32L4X_PINMUX_FUNC_PB7_I2C1_SDA}, {STM32_PIN_PB7, STM32L4X_PINMUX_FUNC_PB7_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm2))
{STM32_PIN_PA0, STM32L4X_PINMUX_FUNC_PA0_PWM2_CH1}, {STM32_PIN_PA0, STM32L4X_PINMUX_FUNC_PA0_PWM2_CH1},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32L4X_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32L4X_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -37,7 +37,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(can1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(can1))
{STM32_PIN_PA11, STM32L4X_PINMUX_FUNC_PA11_CAN_RX}, {STM32_PIN_PA11, STM32L4X_PINMUX_FUNC_PA11_CAN_RX},
{STM32_PIN_PA12, STM32L4X_PINMUX_FUNC_PA12_CAN_TX}, {STM32_PIN_PA12, STM32L4X_PINMUX_FUNC_PA12_CAN_TX},
#endif #endif

20
boards/arm/nucleo_l476rg/pinmux.c
View file

@ -15,30 +15,30 @@
/* pin assignments for NUCLEO-L476RG board */ /* pin assignments for NUCLEO-L476RG board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32L4X_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32L4X_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32L4X_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32L4X_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32L4X_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32L4X_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32L4X_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32L4X_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart3))
{STM32_PIN_PB10, STM32L4X_PINMUX_FUNC_PB10_USART3_TX}, {STM32_PIN_PB10, STM32L4X_PINMUX_FUNC_PB10_USART3_TX},
{STM32_PIN_PB11, STM32L4X_PINMUX_FUNC_PB11_USART3_RX}, {STM32_PIN_PB11, STM32L4X_PINMUX_FUNC_PB11_USART3_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32L4X_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32L4X_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32L4X_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32L4X_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c3))
{STM32_PIN_PC0, STM32L4X_PINMUX_FUNC_PC0_I2C3_SCL}, {STM32_PIN_PC0, STM32L4X_PINMUX_FUNC_PC0_I2C3_SCL},
{STM32_PIN_PC1, STM32L4X_PINMUX_FUNC_PC1_I2C3_SDA}, {STM32_PIN_PC1, STM32L4X_PINMUX_FUNC_PC1_I2C3_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm2))
{STM32_PIN_PA0, STM32L4X_PINMUX_FUNC_PA0_PWM2_CH1}, {STM32_PIN_PA0, STM32L4X_PINMUX_FUNC_PA0_PWM2_CH1},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
/* SPI1 on the Arduino connectors pins A2, D3, D12, D11 */ /* SPI1 on the Arduino connectors pins A2, D3, D12, D11 */
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32L4X_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32L4X_PINMUX_FUNC_PA4_SPI1_NSS},
@ -48,7 +48,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
/* SPI2 on the ST Morpho Connector CN10 pins 16, 30, 28, 26*/ /* SPI2 on the ST Morpho Connector CN10 pins 16, 30, 28, 26*/
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32L4X_PINMUX_FUNC_PB12_SPI2_NSS}, {STM32_PIN_PB12, STM32L4X_PINMUX_FUNC_PB12_SPI2_NSS},
@ -57,7 +57,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB14, STM32L4X_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32L4X_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32L4X_PINMUX_FUNC_PB15_SPI2_MOSI}, {STM32_PIN_PB15, STM32L4X_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi3))
/* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/ /* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA15, STM32L4X_PINMUX_FUNC_PA15_SPI3_NSS}, {STM32_PIN_PA15, STM32L4X_PINMUX_FUNC_PA15_SPI3_NSS},
@ -66,7 +66,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PC11, STM32L4X_PINMUX_FUNC_PC11_SPI3_MISO}, {STM32_PIN_PC11, STM32L4X_PINMUX_FUNC_PC11_SPI3_MISO},
{STM32_PIN_PC12, STM32L4X_PINMUX_FUNC_PC12_SPI3_MOSI}, {STM32_PIN_PC12, STM32L4X_PINMUX_FUNC_PC12_SPI3_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(adc1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(adc1))
{STM32_PIN_PC0, STM32L4X_PINMUX_FUNC_PC0_ADC123_IN1}, {STM32_PIN_PC0, STM32L4X_PINMUX_FUNC_PC0_ADC123_IN1},
#endif #endif
}; };

14
boards/arm/nucleo_l496zg/pinmux.c
View file

@ -14,32 +14,32 @@
/* pin assignments for NUCLEO-L496ZG board */ /* pin assignments for NUCLEO-L496ZG board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PD5, STM32L4X_PINMUX_FUNC_PD5_USART2_TX}, {STM32_PIN_PD5, STM32L4X_PINMUX_FUNC_PD5_USART2_TX},
{STM32_PIN_PD6, STM32L4X_PINMUX_FUNC_PD6_USART2_RX}, {STM32_PIN_PD6, STM32L4X_PINMUX_FUNC_PD6_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpuart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpuart1))
{STM32_PIN_PG7, STM32L4X_PINMUX_FUNC_PG7_LPUART1_TX}, {STM32_PIN_PG7, STM32L4X_PINMUX_FUNC_PG7_LPUART1_TX},
{STM32_PIN_PG8, STM32L4X_PINMUX_FUNC_PG8_LPUART1_RX}, {STM32_PIN_PG8, STM32L4X_PINMUX_FUNC_PG8_LPUART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32L4X_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32L4X_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32L4X_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32L4X_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
{STM32_PIN_PA5, STM32L4X_PINMUX_FUNC_PA5_SPI1_SCK}, {STM32_PIN_PA5, STM32L4X_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm1))
{STM32_PIN_PE9, STM32L4X_PINMUX_FUNC_PE9_PWM1_CH1}, {STM32_PIN_PE9, STM32L4X_PINMUX_FUNC_PE9_PWM1_CH1},
{STM32_PIN_PE11, STM32L4X_PINMUX_FUNC_PE11_PWM1_CH2}, {STM32_PIN_PE11, STM32L4X_PINMUX_FUNC_PE11_PWM1_CH2},
{STM32_PIN_PE13, STM32L4X_PINMUX_FUNC_PE13_PWM1_CH3}, {STM32_PIN_PE13, STM32L4X_PINMUX_FUNC_PE13_PWM1_CH3},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm2))
{STM32_PIN_PA0, STM32L4X_PINMUX_FUNC_PA0_PWM2_CH1}, {STM32_PIN_PA0, STM32L4X_PINMUX_FUNC_PA0_PWM2_CH1},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm15)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm15))
{STM32_PIN_PB14, STM32L4X_PINMUX_FUNC_PB14_PWM15_CH1}, {STM32_PIN_PB14, STM32L4X_PINMUX_FUNC_PB14_PWM15_CH1},
#endif #endif
}; };

18
boards/arm/nucleo_l4r5zi/pinmux.c
View file

@ -14,30 +14,30 @@
/* pin assignments for NUCLEO-L4R5ZI board */ /* pin assignments for NUCLEO-L4R5ZI board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32L4X_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32L4X_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32L4X_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32L4X_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpuart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpuart1))
{STM32_PIN_PG7, STM32L4X_PINMUX_FUNC_PG7_LPUART1_TX}, {STM32_PIN_PG7, STM32L4X_PINMUX_FUNC_PG7_LPUART1_TX},
{STM32_PIN_PG8, STM32L4X_PINMUX_FUNC_PG8_LPUART1_RX}, {STM32_PIN_PG8, STM32L4X_PINMUX_FUNC_PG8_LPUART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32L4X_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32L4X_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32L4X_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32L4X_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart3))
{STM32_PIN_PD8, STM32L4X_PINMUX_FUNC_PD8_USART3_TX}, {STM32_PIN_PD8, STM32L4X_PINMUX_FUNC_PD8_USART3_TX},
{STM32_PIN_PD9, STM32L4X_PINMUX_FUNC_PD9_USART3_RX}, {STM32_PIN_PD9, STM32L4X_PINMUX_FUNC_PD9_USART3_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB6, STM32L4X_PINMUX_FUNC_PB6_I2C1_SCL}, {STM32_PIN_PB6, STM32L4X_PINMUX_FUNC_PB6_I2C1_SCL},
{STM32_PIN_PB7, STM32L4X_PINMUX_FUNC_PB7_I2C1_SDA}, {STM32_PIN_PB7, STM32L4X_PINMUX_FUNC_PB7_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm2))
{STM32_PIN_PA0, STM32L4X_PINMUX_FUNC_PA0_PWM2_CH1}, {STM32_PIN_PA0, STM32L4X_PINMUX_FUNC_PA0_PWM2_CH1},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
/* SPI1 on the Arduino connectors pins A2, D3, D12, D11 */ /* SPI1 on the Arduino connectors pins A2, D3, D12, D11 */
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32L4X_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32L4X_PINMUX_FUNC_PA4_SPI1_NSS},
@ -47,7 +47,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
/* SPI2 on the ST Morpho Connector CN10 pins 16, 30, 28, 26*/ /* SPI2 on the ST Morpho Connector CN10 pins 16, 30, 28, 26*/
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32L4X_PINMUX_FUNC_PB12_SPI2_NSS}, {STM32_PIN_PB12, STM32L4X_PINMUX_FUNC_PB12_SPI2_NSS},
@ -56,7 +56,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB14, STM32L4X_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32L4X_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32L4X_PINMUX_FUNC_PB15_SPI2_MOSI}, {STM32_PIN_PB15, STM32L4X_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi3))
/* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/ /* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA15, STM32L4X_PINMUX_FUNC_PA15_SPI3_NSS}, {STM32_PIN_PA15, STM32L4X_PINMUX_FUNC_PA15_SPI3_NSS},

14
boards/arm/nucleo_wb55rg/pinmux.c
View file

@ -14,23 +14,23 @@
/* pin assignments for NUCLEO-WB55RG board */ /* pin assignments for NUCLEO-WB55RG board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PB7, STM32WBX_PINMUX_FUNC_PB7_USART1_RX}, {STM32_PIN_PB7, STM32WBX_PINMUX_FUNC_PB7_USART1_RX},
{STM32_PIN_PB6, STM32WBX_PINMUX_FUNC_PB6_USART1_TX}, {STM32_PIN_PB6, STM32WBX_PINMUX_FUNC_PB6_USART1_TX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpuart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpuart1))
{STM32_PIN_PA2, STM32WBX_PINMUX_FUNC_PA2_LPUART1_TX}, {STM32_PIN_PA2, STM32WBX_PINMUX_FUNC_PA2_LPUART1_TX},
{STM32_PIN_PA3, STM32WBX_PINMUX_FUNC_PA3_LPUART1_RX}, {STM32_PIN_PA3, STM32WBX_PINMUX_FUNC_PA3_LPUART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32WBX_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32WBX_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32WBX_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32WBX_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c3))
{STM32_PIN_PC0, STM32WBX_PINMUX_FUNC_PC0_I2C3_SCL}, {STM32_PIN_PC0, STM32WBX_PINMUX_FUNC_PC0_I2C3_SCL},
{STM32_PIN_PC1, STM32WBX_PINMUX_FUNC_PC1_I2C3_SDA}, {STM32_PIN_PC1, STM32WBX_PINMUX_FUNC_PC1_I2C3_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32WBX_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32WBX_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -38,10 +38,10 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA6, STM32WBX_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32WBX_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32WBX_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32WBX_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm2))
{STM32_PIN_PA0, STM32WBX_PINMUX_FUNC_PA0_TMR2_CH1}, {STM32_PIN_PA0, STM32WBX_PINMUX_FUNC_PA0_TMR2_CH1},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(adc1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(adc1))
{STM32_PIN_PC2, STM32WBX_PINMUX_FUNC_PC2_ADC1_IN3}, {STM32_PIN_PC2, STM32WBX_PINMUX_FUNC_PC2_ADC1_IN3},
#endif #endif
}; };

14
boards/arm/olimex_stm32_e407/pinmux.c
View file

@ -14,15 +14,15 @@
/* pin assignments for OLIMEX-STM32-E407 board */ /* pin assignments for OLIMEX-STM32-E407 board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_USART1_TX}, {STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_USART1_TX},
{STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_USART1_RX}, {STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart3))
{STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_USART3_TX}, {STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_USART3_TX},
{STM32_PIN_PB11, STM32F4_PINMUX_FUNC_PB11_USART3_RX}, {STM32_PIN_PB11, STM32F4_PINMUX_FUNC_PB11_USART3_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart6)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart6))
{STM32_PIN_PC6, STM32F4_PINMUX_FUNC_PC6_USART6_TX}, {STM32_PIN_PC6, STM32F4_PINMUX_FUNC_PC6_USART6_TX},
{STM32_PIN_PC7, STM32F4_PINMUX_FUNC_PC7_USART6_RX}, {STM32_PIN_PC7, STM32F4_PINMUX_FUNC_PC7_USART6_RX},
#endif #endif
@ -41,14 +41,14 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PG14, STM32F4_PINMUX_FUNC_PG14_ETH}, {STM32_PIN_PG14, STM32F4_PINMUX_FUNC_PG14_ETH},
#endif /* CONFIG_ETH_STM32_HAL */ #endif /* CONFIG_ETH_STM32_HAL */
#ifdef CONFIG_USB_DC_STM32 #ifdef CONFIG_USB_DC_STM32
#if DT_HAS_NODE(DT_INST(0, st_stm32_otgfs)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(0, st_stm32_otgfs))
{STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM}, {STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM},
{STM32_PIN_PA12, STM32F4_PINMUX_FUNC_PA12_OTG_FS_DP}, {STM32_PIN_PA12, STM32F4_PINMUX_FUNC_PA12_OTG_FS_DP},
#endif /* DT_HAS_NODE(DT_INST(0, st_stm32_otgfs)) */ #endif /* DT_HAS_NODE_STATUS_OKAY(DT_INST(0, st_stm32_otgfs)) */
#if DT_HAS_NODE(DT_INST(0, st_stm32_otghs)) #if DT_HAS_NODE_STATUS_OKAY(DT_INST(0, st_stm32_otghs))
{STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_OTG_HS_DM}, {STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_OTG_HS_DM},
{STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_OTG_HS_DP}, {STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_OTG_HS_DP},
#endif /* DT_HAS_NODE(DT_INST(0, st_stm32_otghs)) */ #endif /* DT_HAS_NODE_STATUS_OKAY(DT_INST(0, st_stm32_otghs)) */
#endif /* CONFIG_USB_DC_STM32 */ #endif /* CONFIG_USB_DC_STM32 */
}; };

6
boards/arm/olimex_stm32_h407/pinmux.c
View file

@ -14,15 +14,15 @@
/* pin assignments for OLIMEX-STM32-H407 board */ /* pin assignments for OLIMEX-STM32-H407 board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart3))
{STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_USART3_TX}, {STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_USART3_TX},
{STM32_PIN_PB11, STM32F4_PINMUX_FUNC_PB11_USART3_RX}, {STM32_PIN_PB11, STM32F4_PINMUX_FUNC_PB11_USART3_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart6)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart6))
{STM32_PIN_PC6, STM32F4_PINMUX_FUNC_PC6_USART6_TX}, {STM32_PIN_PC6, STM32F4_PINMUX_FUNC_PC6_USART6_TX},
{STM32_PIN_PC7, STM32F4_PINMUX_FUNC_PC7_USART6_RX}, {STM32_PIN_PC7, STM32F4_PINMUX_FUNC_PC7_USART6_RX},
#endif #endif

4
boards/arm/olimex_stm32_p405/pinmux.c
View file

@ -14,11 +14,11 @@
/* pin assignments for OLIMEX-STM32-P405 board */ /* pin assignments for OLIMEX-STM32-P405 board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(can1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(can1))
{STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_CAN1_RX}, {STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_CAN1_RX},
{STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_CAN1_TX}, {STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_CAN1_TX},
#endif #endif

20
boards/arm/olimexino_stm32/pinmux.c
View file

@ -15,27 +15,27 @@
/* pin assignments for OLIMEXINO-STM32 board */ /* pin assignments for OLIMEXINO-STM32 board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32F1_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32F1_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32F1_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32F1_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32F1_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F1_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F1_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F1_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart3))
{STM32_PIN_PB10, STM32F1_PINMUX_FUNC_PB10_USART3_TX}, {STM32_PIN_PB10, STM32F1_PINMUX_FUNC_PB10_USART3_TX},
{STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_USART3_RX}, {STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_USART3_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB6, STM32F1_PINMUX_FUNC_PB6_I2C1_SCL}, {STM32_PIN_PB6, STM32F1_PINMUX_FUNC_PB6_I2C1_SCL},
{STM32_PIN_PB7, STM32F1_PINMUX_FUNC_PB7_I2C1_SDA}, {STM32_PIN_PB7, STM32F1_PINMUX_FUNC_PB7_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c2))
{STM32_PIN_PB10, STM32F1_PINMUX_FUNC_PB10_I2C2_SCL}, {STM32_PIN_PB10, STM32F1_PINMUX_FUNC_PB10_I2C2_SCL},
{STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_I2C2_SDA}, {STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_I2C2_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F1_PINMUX_FUNC_PA4_SPI1_MASTER_NSS_OE}, {STM32_PIN_PA4, STM32F1_PINMUX_FUNC_PA4_SPI1_MASTER_NSS_OE},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -43,7 +43,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA6, STM32F1_PINMUX_FUNC_PA6_SPI1_MASTER_MISO}, {STM32_PIN_PA6, STM32F1_PINMUX_FUNC_PA6_SPI1_MASTER_MISO},
{STM32_PIN_PA7, STM32F1_PINMUX_FUNC_PA7_SPI1_MASTER_MOSI}, {STM32_PIN_PA7, STM32F1_PINMUX_FUNC_PA7_SPI1_MASTER_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F1_PINMUX_FUNC_PB12_SPI2_MASTER_NSS_OE}, {STM32_PIN_PB12, STM32F1_PINMUX_FUNC_PB12_SPI2_MASTER_NSS_OE},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -51,14 +51,14 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PB14, STM32F1_PINMUX_FUNC_PB14_SPI2_MASTER_MISO}, {STM32_PIN_PB14, STM32F1_PINMUX_FUNC_PB14_SPI2_MASTER_MISO},
{STM32_PIN_PB15, STM32F1_PINMUX_FUNC_PB15_SPI2_MASTER_MOSI}, {STM32_PIN_PB15, STM32F1_PINMUX_FUNC_PB15_SPI2_MASTER_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm1))
{STM32_PIN_PA8, STM32F1_PINMUX_FUNC_PA8_PWM1_CH1}, {STM32_PIN_PA8, STM32F1_PINMUX_FUNC_PA8_PWM1_CH1},
#endif #endif
#ifdef CONFIG_USB_DC_STM32 #ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32F1_PINMUX_FUNC_PA11_USB_DM}, {STM32_PIN_PA11, STM32F1_PINMUX_FUNC_PA11_USB_DM},
{STM32_PIN_PA12, STM32F1_PINMUX_FUNC_PA12_USB_DP}, {STM32_PIN_PA12, STM32F1_PINMUX_FUNC_PA12_USB_DP},
#endif /* CONFIG_USB_DC_STM32 */ #endif /* CONFIG_USB_DC_STM32 */
#if DT_HAS_NODE(DT_NODELABEL(can1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(can1))
{STM32_PIN_PB8, STM32F1_PINMUX_FUNC_PB8_CAN_RX}, {STM32_PIN_PB8, STM32F1_PINMUX_FUNC_PB8_CAN_RX},
{STM32_PIN_PB9, STM32F1_PINMUX_FUNC_PB9_CAN_TX}, {STM32_PIN_PB9, STM32F1_PINMUX_FUNC_PB9_CAN_TX},
#endif #endif
@ -69,7 +69,7 @@ static int pinmux_stm32_init(struct device *port)
ARG_UNUSED(port); ARG_UNUSED(port);
stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf)); stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
#if DT_HAS_NODE(DT_NODELABEL(can1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(can1))
/* Set pin-mux so that CAN1 is on PB8 and PB9 */ /* Set pin-mux so that CAN1 is on PB8 and PB9 */
AFIO->MAPR |= AFIO_MAPR_CAN_REMAP_REMAP2; AFIO->MAPR |= AFIO_MAPR_CAN_REMAP_REMAP2;
#endif #endif

14
boards/arm/pico_pi_m4/pinmux.c
View file

@ -12,7 +12,7 @@ static int pico_pi_m4_pinmux_init(struct device *dev)
{ {
ARG_UNUSED(dev); ARG_UNUSED(dev);
#if DT_HAS_NODE(DT_NODELABEL(uart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(uart2))
IOMUXC_SW_MUX_CTL_PAD_UART2_RX_DATA = IOMUXC_SW_MUX_CTL_PAD_UART2_RX_DATA =
IOMUXC_SW_MUX_CTL_PAD_UART2_RX_DATA_MUX_MODE(0); IOMUXC_SW_MUX_CTL_PAD_UART2_RX_DATA_MUX_MODE(0);
IOMUXC_SW_MUX_CTL_PAD_UART2_TX_DATA = IOMUXC_SW_MUX_CTL_PAD_UART2_TX_DATA =
@ -34,7 +34,7 @@ static int pico_pi_m4_pinmux_init(struct device *dev)
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(uart5)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(uart5))
IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL = IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL =
IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_MUX_MODE(1); IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_MUX_MODE(1);
IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA = IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA =
@ -58,7 +58,7 @@ static int pico_pi_m4_pinmux_init(struct device *dev)
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(uart6)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(uart6))
IOMUXC_SW_MUX_CTL_PAD_EPDC_DATA08 = IOMUXC_SW_MUX_CTL_PAD_EPDC_DATA08 =
IOMUXC_SW_MUX_CTL_PAD_EPDC_DATA08_MUX_MODE(3); IOMUXC_SW_MUX_CTL_PAD_EPDC_DATA08_MUX_MODE(3);
IOMUXC_SW_MUX_CTL_PAD_EPDC_DATA09 = IOMUXC_SW_MUX_CTL_PAD_EPDC_DATA09 =
@ -81,7 +81,7 @@ static int pico_pi_m4_pinmux_init(struct device *dev)
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA = IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA =
IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA_MUX_MODE(1) | IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA_MUX_MODE(1) |
IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA_SION_MASK; IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA_SION_MASK;
@ -106,7 +106,7 @@ static int pico_pi_m4_pinmux_init(struct device *dev)
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c2))
IOMUXC_SW_MUX_CTL_PAD_I2C2_SCL = IOMUXC_SW_MUX_CTL_PAD_I2C2_SCL =
IOMUXC_SW_MUX_CTL_PAD_I2C2_SCL_MUX_MODE(0) | IOMUXC_SW_MUX_CTL_PAD_I2C2_SCL_MUX_MODE(0) |
IOMUXC_SW_MUX_CTL_PAD_I2C2_SCL_SION_MASK; IOMUXC_SW_MUX_CTL_PAD_I2C2_SCL_SION_MASK;
@ -131,7 +131,7 @@ static int pico_pi_m4_pinmux_init(struct device *dev)
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c3))
IOMUXC_SW_MUX_CTL_PAD_I2C3_SCL = IOMUXC_SW_MUX_CTL_PAD_I2C3_SCL =
IOMUXC_SW_MUX_CTL_PAD_I2C3_SCL_MUX_MODE(0) | IOMUXC_SW_MUX_CTL_PAD_I2C3_SCL_MUX_MODE(0) |
IOMUXC_SW_MUX_CTL_PAD_I2C3_SCL_SION_MASK; IOMUXC_SW_MUX_CTL_PAD_I2C3_SCL_SION_MASK;
@ -156,7 +156,7 @@ static int pico_pi_m4_pinmux_init(struct device *dev)
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c4)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c4))
IOMUXC_SW_MUX_CTL_PAD_SAI1_RX_SYNC = IOMUXC_SW_MUX_CTL_PAD_SAI1_RX_SYNC =
IOMUXC_SW_MUX_CTL_PAD_SAI1_RX_SYNC_MUX_MODE(3) | IOMUXC_SW_MUX_CTL_PAD_SAI1_RX_SYNC_MUX_MODE(3) |
IOMUXC_SW_MUX_CTL_PAD_SAI1_RX_SYNC_SION_MASK; IOMUXC_SW_MUX_CTL_PAD_SAI1_RX_SYNC_SION_MASK;

4
boards/arm/sam_e70_xplained/pinmux.c
View file

@ -6,7 +6,7 @@
#include <init.h> #include <init.h>
#if defined CONFIG_PWM && DT_HAS_NODE(DT_INST(0, atmel_sam_pwm)) #if defined CONFIG_PWM && DT_HAS_NODE_STATUS_OKAY(DT_INST(0, atmel_sam_pwm))
/* PWM on EXT1 connector, pin 7, channel 0, inverted */ /* PWM on EXT1 connector, pin 7, channel 0, inverted */
static const struct soc_gpio_pin pwm_ext1_pin7 = { static const struct soc_gpio_pin pwm_ext1_pin7 = {
PIO_PA0A_PWM0_PWMH0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A PIO_PA0A_PWM0_PWMH0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A
@ -27,7 +27,7 @@ static int sam_e70_xplained_init(struct device *dev)
{ {
ARG_UNUSED(dev); ARG_UNUSED(dev);
#if defined CONFIG_PWM && DT_HAS_NODE(DT_INST(0, atmel_sam_pwm)) #if defined CONFIG_PWM && DT_HAS_NODE_STATUS_OKAY(DT_INST(0, atmel_sam_pwm))
soc_gpio_configure(&pwm_ext1_pin7); soc_gpio_configure(&pwm_ext1_pin7);
soc_gpio_configure(&pwm_ext2_pin7); soc_gpio_configure(&pwm_ext2_pin7);
soc_gpio_configure(&pwm_ext2_pin8); soc_gpio_configure(&pwm_ext2_pin8);

4
boards/arm/sam_v71_xult/pinmux.c
View file

@ -7,7 +7,7 @@
#include <init.h> #include <init.h>
#if defined CONFIG_PWM && DT_HAS_NODE(DT_INST(0, atmel_sam_pwm)) #if defined CONFIG_PWM && DT_HAS_NODE_STATUS_OKAY(DT_INST(0, atmel_sam_pwm))
/* PWM on EXT1 connector, pin 7, channel 0, inverted */ /* PWM on EXT1 connector, pin 7, channel 0, inverted */
static const struct soc_gpio_pin pwm_ext1_pin7 = { static const struct soc_gpio_pin pwm_ext1_pin7 = {
PIO_PA0A_PWM0_PWMH0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A PIO_PA0A_PWM0_PWMH0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A
@ -28,7 +28,7 @@ static int sam_v71_xplained_init(struct device *dev)
{ {
ARG_UNUSED(dev); ARG_UNUSED(dev);
#if defined CONFIG_PWM && DT_HAS_NODE(DT_INST(0, atmel_sam_pwm)) #if defined CONFIG_PWM && DT_HAS_NODE_STATUS_OKAY(DT_INST(0, atmel_sam_pwm))
soc_gpio_configure(&pwm_ext1_pin7); soc_gpio_configure(&pwm_ext1_pin7);
soc_gpio_configure(&pwm_ext2_pin7); soc_gpio_configure(&pwm_ext2_pin7);
soc_gpio_configure(&pwm_ext2_pin8); soc_gpio_configure(&pwm_ext2_pin8);

14
boards/arm/sensortile_box/pinmux.c
View file

@ -14,36 +14,36 @@
/* pin assignments for SensorTile.box board */ /* pin assignments for SensorTile.box board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32L4X_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32L4X_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32L4X_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32L4X_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32L4X_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32L4X_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32L4X_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32L4X_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB6, STM32L4X_PINMUX_FUNC_PB6_I2C1_SCL}, {STM32_PIN_PB6, STM32L4X_PINMUX_FUNC_PB6_I2C1_SCL},
{STM32_PIN_PB7, STM32L4X_PINMUX_FUNC_PB7_I2C1_SDA}, {STM32_PIN_PB7, STM32L4X_PINMUX_FUNC_PB7_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c3))
{STM32_PIN_PG7, STM32L4X_PINMUX_FUNC_PG7_I2C3_SCL}, {STM32_PIN_PG7, STM32L4X_PINMUX_FUNC_PG7_I2C3_SCL},
{STM32_PIN_PG8, STM32L4X_PINMUX_FUNC_PG8_I2C3_SDA}, {STM32_PIN_PG8, STM32L4X_PINMUX_FUNC_PG8_I2C3_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
{STM32_PIN_PE12, STM32L4X_PINMUX_FUNC_PE12_SPI1_NSS}, {STM32_PIN_PE12, STM32L4X_PINMUX_FUNC_PE12_SPI1_NSS},
{STM32_PIN_PE13, STM32L4X_PINMUX_FUNC_PE13_SPI1_SCK}, {STM32_PIN_PE13, STM32L4X_PINMUX_FUNC_PE13_SPI1_SCK},
{STM32_PIN_PE14, STM32L4X_PINMUX_FUNC_PE14_SPI1_MISO}, {STM32_PIN_PE14, STM32L4X_PINMUX_FUNC_PE14_SPI1_MISO},
{STM32_PIN_PE15, STM32L4X_PINMUX_FUNC_PE15_SPI1_MOSI}, {STM32_PIN_PE15, STM32L4X_PINMUX_FUNC_PE15_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
/* SPI2 on the ST Morpho Connector CN10 pins 16, 30, 28, 26*/ /* SPI2 on the ST Morpho Connector CN10 pins 16, 30, 28, 26*/
{STM32_PIN_PB12, STM32L4X_PINMUX_FUNC_PB12_SPI2_NSS}, {STM32_PIN_PB12, STM32L4X_PINMUX_FUNC_PB12_SPI2_NSS},
{STM32_PIN_PB13, STM32L4X_PINMUX_FUNC_PB13_SPI2_SCK}, {STM32_PIN_PB13, STM32L4X_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32L4X_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32L4X_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32L4X_PINMUX_FUNC_PB15_SPI2_MOSI}, {STM32_PIN_PB15, STM32L4X_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi3))
{STM32_PIN_PA15, STM32L4X_PINMUX_FUNC_PA15_SPI3_NSS}, {STM32_PIN_PA15, STM32L4X_PINMUX_FUNC_PA15_SPI3_NSS},
{STM32_PIN_PB3, STM32L4X_PINMUX_FUNC_PB3_SPI3_SCK}, {STM32_PIN_PB3, STM32L4X_PINMUX_FUNC_PB3_SPI3_SCK},
{STM32_PIN_PB4, STM32L4X_PINMUX_FUNC_PB4_SPI3_MISO}, {STM32_PIN_PB4, STM32L4X_PINMUX_FUNC_PB4_SPI3_MISO},

6
boards/arm/steval_fcu001v1/pinmux.c
View file

@ -14,14 +14,14 @@
/* pin assignments for STEVAL-FCU001V1 */ /* pin assignments for STEVAL-FCU001V1 */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32F4_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32F4_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32F4_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32F4_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm2))
{STM32_PIN_PA0, STM32F4_PINMUX_FUNC_PA0_PWM2_CH1}, {STM32_PIN_PA0, STM32F4_PINMUX_FUNC_PA0_PWM2_CH1},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c2))
{STM32_PIN_PB3, STM32F4_PINMUX_FUNC_PB3_I2C2_SDA}, {STM32_PIN_PB3, STM32F4_PINMUX_FUNC_PB3_I2C2_SDA},
{STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_I2C2_SCL}, {STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_I2C2_SCL},
#endif #endif

2
boards/arm/stm3210c_eval/pinmux.c
View file

@ -14,7 +14,7 @@
/* pin assignments for STM3210C-EVAL board */ /* pin assignments for STM3210C-EVAL board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PD5, STM32F1_PINMUX_FUNC_PD5_USART2_TX}, {STM32_PIN_PD5, STM32F1_PINMUX_FUNC_PD5_USART2_TX},
{STM32_PIN_PD6, STM32F1_PINMUX_FUNC_PD6_USART2_RX}, {STM32_PIN_PD6, STM32F1_PINMUX_FUNC_PD6_USART2_RX},
#endif #endif

2
boards/arm/stm32373c_eval/pinmux.c
View file

@ -14,7 +14,7 @@
/* pin assignments for STM32373C-EVAL board */ /* pin assignments for STM32373C-EVAL board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PD5, STM32F3_PINMUX_FUNC_PD5_USART2_TX}, {STM32_PIN_PD5, STM32F3_PINMUX_FUNC_PD5_USART2_TX},
{STM32_PIN_PD6, STM32F3_PINMUX_FUNC_PD6_USART2_RX}, {STM32_PIN_PD6, STM32F3_PINMUX_FUNC_PD6_USART2_RX},
#endif #endif

16
boards/arm/stm32_min_dev/pinmux.c
View file

@ -14,30 +14,30 @@
/* pin assignments for STM32_MIN_DEV board */ /* pin assignments for STM32_MIN_DEV board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32F1_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32F1_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32F1_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32F1_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32F1_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F1_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F1_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F1_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart3))
{STM32_PIN_PB10, STM32F1_PINMUX_FUNC_PB10_USART3_TX}, {STM32_PIN_PB10, STM32F1_PINMUX_FUNC_PB10_USART3_TX},
{STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_USART3_RX}, {STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_USART3_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB6, STM32F1_PINMUX_FUNC_PB6_I2C1_SCL}, {STM32_PIN_PB6, STM32F1_PINMUX_FUNC_PB6_I2C1_SCL},
{STM32_PIN_PB7, STM32F1_PINMUX_FUNC_PB7_I2C1_SDA}, {STM32_PIN_PB7, STM32F1_PINMUX_FUNC_PB7_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c2))
{STM32_PIN_PB10, STM32F1_PINMUX_FUNC_PB10_I2C2_SCL}, {STM32_PIN_PB10, STM32F1_PINMUX_FUNC_PB10_I2C2_SCL},
{STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_I2C2_SDA}, {STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_I2C2_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm1))
{STM32_PIN_PA8, STM32F1_PINMUX_FUNC_PA8_PWM1_CH1}, {STM32_PIN_PA8, STM32F1_PINMUX_FUNC_PA8_PWM1_CH1},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F1_PINMUX_FUNC_PA4_SPI1_MASTER_NSS_OE}, {STM32_PIN_PA4, STM32F1_PINMUX_FUNC_PA4_SPI1_MASTER_NSS_OE},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -45,7 +45,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA6, STM32F1_PINMUX_FUNC_PA6_SPI1_MASTER_MISO}, {STM32_PIN_PA6, STM32F1_PINMUX_FUNC_PA6_SPI1_MASTER_MISO},
{STM32_PIN_PA7, STM32F1_PINMUX_FUNC_PA7_SPI1_MASTER_MOSI}, {STM32_PIN_PA7, STM32F1_PINMUX_FUNC_PA7_SPI1_MASTER_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F1_PINMUX_FUNC_PB12_SPI2_MASTER_NSS_OE}, {STM32_PIN_PB12, STM32F1_PINMUX_FUNC_PB12_SPI2_MASTER_NSS_OE},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */

2
boards/arm/stm32f030_demo/pinmux.c
View file

@ -15,7 +15,7 @@
/* pin assignments for STM32F030 DEMO board */ /* pin assignments for STM32F030 DEMO board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32F0_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32F0_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32F0_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32F0_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif

2
boards/arm/stm32f072_eval/pinmux.c
View file

@ -14,7 +14,7 @@
/* pin assignments for STM32F072-EVAL board */ /* pin assignments for STM32F072-EVAL board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PD5, STM32F0_PINMUX_FUNC_PD5_USART2_TX}, {STM32_PIN_PD5, STM32F0_PINMUX_FUNC_PD5_USART2_TX},
{STM32_PIN_PD6, STM32F0_PINMUX_FUNC_PD6_USART2_RX}, {STM32_PIN_PD6, STM32F0_PINMUX_FUNC_PD6_USART2_RX},
#endif #endif

10
boards/arm/stm32f072b_disco/pinmux.c
View file

@ -15,24 +15,24 @@
/* pin assignments for STM32F072B-DISCO board */ /* pin assignments for STM32F072B-DISCO board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PB6, STM32F0_PINMUX_FUNC_PB6_USART1_TX}, {STM32_PIN_PB6, STM32F0_PINMUX_FUNC_PB6_USART1_TX},
{STM32_PIN_PB7, STM32F0_PINMUX_FUNC_PB7_USART1_RX}, {STM32_PIN_PB7, STM32F0_PINMUX_FUNC_PB7_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32F0_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32F0_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32F0_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32F0_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c2))
{STM32_PIN_PB10, STM32F0_PINMUX_FUNC_PB10_I2C2_SCL}, {STM32_PIN_PB10, STM32F0_PINMUX_FUNC_PB10_I2C2_SCL},
{STM32_PIN_PB11, STM32F0_PINMUX_FUNC_PB11_I2C2_SDA}, {STM32_PIN_PB11, STM32F0_PINMUX_FUNC_PB11_I2C2_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
{STM32_PIN_PB3, STM32F0_PINMUX_FUNC_PB3_SPI1_SCK}, {STM32_PIN_PB3, STM32F0_PINMUX_FUNC_PB3_SPI1_SCK},
{STM32_PIN_PB4, STM32F0_PINMUX_FUNC_PB4_SPI1_MISO}, {STM32_PIN_PB4, STM32F0_PINMUX_FUNC_PB4_SPI1_MISO},
{STM32_PIN_PB5, STM32F0_PINMUX_FUNC_PB5_SPI1_MOSI}, {STM32_PIN_PB5, STM32F0_PINMUX_FUNC_PB5_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(can1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(can1))
{STM32_PIN_PB8, STM32F0_PINMUX_FUNC_PB8_CAN_RX}, {STM32_PIN_PB8, STM32F0_PINMUX_FUNC_PB8_CAN_RX},
{STM32_PIN_PB9, STM32F0_PINMUX_FUNC_PB9_CAN_TX}, {STM32_PIN_PB9, STM32F0_PINMUX_FUNC_PB9_CAN_TX},
#endif #endif

4
boards/arm/stm32f0_disco/pinmux.c
View file

@ -15,11 +15,11 @@
/* pin assignments for STM32F0DISCOVERY board */ /* pin assignments for STM32F0DISCOVERY board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32F0_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32F0_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32F0_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32F0_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32F0_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F0_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F0_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F0_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif

14
boards/arm/stm32f3_disco/pinmux.c
View file

@ -14,23 +14,23 @@
/* pin assignments for STM32F3DISCOVERY board */ /* pin assignments for STM32F3DISCOVERY board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PC4, STM32F3_PINMUX_FUNC_PC4_USART1_TX}, {STM32_PIN_PC4, STM32F3_PINMUX_FUNC_PC4_USART1_TX},
{STM32_PIN_PC5, STM32F3_PINMUX_FUNC_PC5_USART1_RX}, {STM32_PIN_PC5, STM32F3_PINMUX_FUNC_PC5_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB6, STM32F3_PINMUX_FUNC_PB6_I2C1_SCL}, {STM32_PIN_PB6, STM32F3_PINMUX_FUNC_PB6_I2C1_SCL},
{STM32_PIN_PB7, STM32F3_PINMUX_FUNC_PB7_I2C1_SDA}, {STM32_PIN_PB7, STM32F3_PINMUX_FUNC_PB7_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c2))
{STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_I2C2_SCL}, {STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_I2C2_SCL},
{STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA}, {STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -38,7 +38,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS}, {STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -50,7 +50,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA11, STM32F3_PINMUX_FUNC_PA11_USB_DM}, {STM32_PIN_PA11, STM32F3_PINMUX_FUNC_PA11_USB_DM},
{STM32_PIN_PA12, STM32F3_PINMUX_FUNC_PA12_USB_DP}, {STM32_PIN_PA12, STM32F3_PINMUX_FUNC_PA12_USB_DP},
#endif /* CONFIG_USB_DC_STM32 */ #endif /* CONFIG_USB_DC_STM32 */
#if DT_HAS_NODE(DT_NODELABEL(can1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(can1))
{STM32_PIN_PD0, STM32F3_PINMUX_FUNC_PD0_CAN1_RX}, {STM32_PIN_PD0, STM32F3_PINMUX_FUNC_PD0_CAN1_RX},
{STM32_PIN_PD1, STM32F3_PINMUX_FUNC_PD1_CAN1_TX}, {STM32_PIN_PD1, STM32F3_PINMUX_FUNC_PD1_CAN1_TX},
#endif #endif

4
boards/arm/stm32f411e_disco/pinmux.c
View file

@ -14,11 +14,11 @@
/* pin assignments for STM32F411E-DISCO board */ /* pin assignments for STM32F411E-DISCO board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm4)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm4))
{STM32_PIN_PD12, STM32F4_PINMUX_FUNC_PD12_PWM4_CH1 }, {STM32_PIN_PD12, STM32F4_PINMUX_FUNC_PD12_PWM4_CH1 },
#endif #endif
}; };

2
boards/arm/stm32f412g_disco/pinmux.c
View file

@ -14,7 +14,7 @@
/* pin assignments for STM32F412G-DISCO board */ /* pin assignments for STM32F412G-DISCO board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif

12
boards/arm/stm32f429i_disc1/pinmux.c
View file

@ -14,15 +14,15 @@
/* pin assignments for STM32F429I-DISC1 board */ /* pin assignments for STM32F429I-DISC1 board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32F4_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32F4_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32F4_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32F4_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi5)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi5))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PF6, STM32F4_PINMUX_FUNC_PF6_SPI5_MASTER_NSS}, {STM32_PIN_PF6, STM32F4_PINMUX_FUNC_PF6_SPI5_MASTER_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -30,15 +30,15 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PF8, STM32F4_PINMUX_FUNC_PF8_SPI5_MASTER_MISO}, {STM32_PIN_PF8, STM32F4_PINMUX_FUNC_PF8_SPI5_MASTER_MISO},
{STM32_PIN_PF9, STM32F4_PINMUX_FUNC_PF9_SPI5_MASTER_MOSI}, {STM32_PIN_PF9, STM32F4_PINMUX_FUNC_PF9_SPI5_MASTER_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c2))
{STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_I2C2_SCL}, {STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_I2C2_SCL},
{STM32_PIN_PB11, STM32F4_PINMUX_FUNC_PB11_I2C2_SDA}, {STM32_PIN_PB11, STM32F4_PINMUX_FUNC_PB11_I2C2_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c3))
{STM32_PIN_PA8, STM32F4_PINMUX_FUNC_PA8_I2C3_SCL}, {STM32_PIN_PA8, STM32F4_PINMUX_FUNC_PA8_I2C3_SCL},
{STM32_PIN_PC9, STM32F4_PINMUX_FUNC_PC9_I2C3_SDA}, {STM32_PIN_PC9, STM32F4_PINMUX_FUNC_PC9_I2C3_SDA},
#endif #endif

8
boards/arm/stm32f469i_disco/pinmux.c
View file

@ -14,19 +14,19 @@
/* pin assignments for STM32F469I-DISCO board */ /* pin assignments for STM32F469I-DISCO board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart3))
{STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_USART3_TX}, {STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_USART3_TX},
{STM32_PIN_PB11, STM32F4_PINMUX_FUNC_PB11_USART3_RX}, {STM32_PIN_PB11, STM32F4_PINMUX_FUNC_PB11_USART3_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart6)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart6))
{STM32_PIN_PG14, STM32F4_PINMUX_FUNC_PG14_USART6_TX}, {STM32_PIN_PG14, STM32F4_PINMUX_FUNC_PG14_USART6_TX},
{STM32_PIN_PG9, STM32F4_PINMUX_FUNC_PG9_USART6_RX}, {STM32_PIN_PG9, STM32F4_PINMUX_FUNC_PG9_USART6_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
{STM32_PIN_PD3, STM32F4_PINMUX_FUNC_PD3_SPI2_SCK}, {STM32_PIN_PD3, STM32F4_PINMUX_FUNC_PD3_SPI2_SCK},
{STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI}, {STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI},

10
boards/arm/stm32f4_disco/pinmux.c
View file

@ -14,26 +14,26 @@
/* pin assignments for STM32F4DISCOVERY board */ /* pin assignments for STM32F4DISCOVERY board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_USART1_TX}, {STM32_PIN_PB6, STM32F4_PINMUX_FUNC_PB6_USART1_TX},
{STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_USART1_RX}, {STM32_PIN_PB7, STM32F4_PINMUX_FUNC_PB7_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm2))
{STM32_PIN_PA0, STM32F4_PINMUX_FUNC_PA0_PWM2_CH1}, {STM32_PIN_PA0, STM32F4_PINMUX_FUNC_PA0_PWM2_CH1},
#endif #endif
#ifdef CONFIG_USB_DC_STM32 #ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM}, {STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM},
{STM32_PIN_PA12, STM32F4_PINMUX_FUNC_PA12_OTG_FS_DP}, {STM32_PIN_PA12, STM32F4_PINMUX_FUNC_PA12_OTG_FS_DP},
#endif /* CONFIG_USB_DC_STM32 */ #endif /* CONFIG_USB_DC_STM32 */
#if DT_HAS_NODE(DT_NODELABEL(can1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(can1))
{STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_CAN1_RX}, {STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_CAN1_RX},
{STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_CAN1_TX}, {STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_CAN1_TX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(can2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(can2))
{STM32_PIN_PB5, STM32F4_PINMUX_FUNC_PB5_CAN2_RX}, {STM32_PIN_PB5, STM32F4_PINMUX_FUNC_PB5_CAN2_RX},
{STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_CAN2_TX}, {STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_CAN2_TX},
#endif #endif

12
boards/arm/stm32f723e_disco/pinmux.c
View file

@ -14,27 +14,27 @@
/* pin assignments for STM32F723E-DISCO board */ /* pin assignments for STM32F723E-DISCO board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32F7_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32F7_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F7_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32F7_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart6)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart6))
{STM32_PIN_PC6, STM32F7_PINMUX_FUNC_PC6_USART6_TX}, {STM32_PIN_PC6, STM32F7_PINMUX_FUNC_PC6_USART6_TX},
{STM32_PIN_PC7, STM32F7_PINMUX_FUNC_PC7_USART6_RX}, {STM32_PIN_PC7, STM32F7_PINMUX_FUNC_PC7_USART6_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32F7_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32F7_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32F7_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32F7_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c2))
{STM32_PIN_PH4, STM32F7_PINMUX_FUNC_PH4_I2C2_SCL}, {STM32_PIN_PH4, STM32F7_PINMUX_FUNC_PH4_I2C2_SCL},
{STM32_PIN_PH5, STM32F7_PINMUX_FUNC_PH5_I2C2_SDA}, {STM32_PIN_PH5, STM32F7_PINMUX_FUNC_PH5_I2C2_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c3))
{STM32_PIN_PA8, STM32F7_PINMUX_FUNC_PA8_I2C3_SCL}, {STM32_PIN_PA8, STM32F7_PINMUX_FUNC_PA8_I2C3_SCL},
{STM32_PIN_PH8, STM32F7_PINMUX_FUNC_PH8_I2C3_SDA}, {STM32_PIN_PH8, STM32F7_PINMUX_FUNC_PH8_I2C3_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
{STM32_PIN_PA5, STM32F7_PINMUX_FUNC_PA5_SPI1_SCK}, {STM32_PIN_PA5, STM32F7_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PB4, STM32F7_PINMUX_FUNC_PB4_SPI1_MISO}, {STM32_PIN_PB4, STM32F7_PINMUX_FUNC_PB4_SPI1_MISO},
{STM32_PIN_PB5, STM32F7_PINMUX_FUNC_PB5_SPI1_MOSI}, {STM32_PIN_PB5, STM32F7_PINMUX_FUNC_PB5_SPI1_MOSI},

12
boards/arm/stm32f746g_disco/pinmux.c
View file

@ -14,15 +14,15 @@
/* pin assignments for STM32F746G-DISCO board */ /* pin assignments for STM32F746G-DISCO board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32F7_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32F7_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PB7, STM32F7_PINMUX_FUNC_PB7_USART1_RX}, {STM32_PIN_PB7, STM32F7_PINMUX_FUNC_PB7_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart6)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart6))
{STM32_PIN_PC6, STM32F7_PINMUX_FUNC_PC6_USART6_TX}, {STM32_PIN_PC6, STM32F7_PINMUX_FUNC_PC6_USART6_TX},
{STM32_PIN_PC7, STM32F7_PINMUX_FUNC_PC7_USART6_RX}, {STM32_PIN_PC7, STM32F7_PINMUX_FUNC_PC7_USART6_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm3))
{STM32_PIN_PB4, STM32F7_PINMUX_FUNC_PB4_PWM3_CH1}, {STM32_PIN_PB4, STM32F7_PINMUX_FUNC_PB4_PWM3_CH1},
#endif #endif
#ifdef CONFIG_ETH_STM32_HAL #ifdef CONFIG_ETH_STM32_HAL
@ -38,15 +38,15 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PG13, STM32F7_PINMUX_FUNC_PG13_ETH}, {STM32_PIN_PG13, STM32F7_PINMUX_FUNC_PG13_ETH},
{STM32_PIN_PG14, STM32F7_PINMUX_FUNC_PG14_ETH}, {STM32_PIN_PG14, STM32F7_PINMUX_FUNC_PG14_ETH},
#endif /* CONFIG_ETH_STM32_HAL */ #endif /* CONFIG_ETH_STM32_HAL */
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32F7_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32F7_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32F7_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32F7_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c3))
{STM32_PIN_PH7, STM32F7_PINMUX_FUNC_PH7_I2C3_SCL}, {STM32_PIN_PH7, STM32F7_PINMUX_FUNC_PH7_I2C3_SCL},
{STM32_PIN_PH8, STM32F7_PINMUX_FUNC_PH8_I2C3_SDA}, {STM32_PIN_PH8, STM32F7_PINMUX_FUNC_PH8_I2C3_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PI0, STM32F7_PINMUX_FUNC_PI0_SPI2_NSS}, {STM32_PIN_PI0, STM32F7_PINMUX_FUNC_PI0_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */

8
boards/arm/stm32f769i_disco/pinmux.c
View file

@ -14,19 +14,19 @@
/* pin assignments for STM32F769I-DISCO board */ /* pin assignments for STM32F769I-DISCO board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32F7_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32F7_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32F7_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32F7_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart6)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart6))
{STM32_PIN_PC6, STM32F7_PINMUX_FUNC_PC6_USART6_TX}, {STM32_PIN_PC6, STM32F7_PINMUX_FUNC_PC6_USART6_TX},
{STM32_PIN_PC7, STM32F7_PINMUX_FUNC_PC7_USART6_RX}, {STM32_PIN_PC7, STM32F7_PINMUX_FUNC_PC7_USART6_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32F7_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32F7_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32F7_PINMUX_FUNC_PB9_I2C1_SDA}, {STM32_PIN_PB9, STM32F7_PINMUX_FUNC_PB9_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
{STM32_PIN_PA12, STM32F7_PINMUX_FUNC_PA12_SPI2_SCK}, {STM32_PIN_PA12, STM32F7_PINMUX_FUNC_PA12_SPI2_SCK},
{STM32_PIN_PB14, STM32F7_PINMUX_FUNC_PB14_SPI2_MISO}, {STM32_PIN_PB14, STM32F7_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F7_PINMUX_FUNC_PB15_SPI2_MOSI}, {STM32_PIN_PB15, STM32F7_PINMUX_FUNC_PB15_SPI2_MOSI},

4
boards/arm/stm32g0316_disco/pinmux.c
View file

@ -11,7 +11,7 @@
/* pin assignments for STM32G0316-DISCO board */ /* pin assignments for STM32G0316-DISCO board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32G0_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32G0_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PB7, STM32G0_PINMUX_FUNC_PB7_USART1_RX}, {STM32_PIN_PB7, STM32G0_PINMUX_FUNC_PB7_USART1_RX},
#endif #endif
@ -21,7 +21,7 @@ static int pinmux_stm32_init(struct device *port)
{ {
ARG_UNUSED(port); ARG_UNUSED(port);
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
/* Remap PA11 to PA9 */ /* Remap PA11 to PA9 */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SYSCFG); LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SYSCFG);
LL_SYSCFG_EnablePinRemap(LL_SYSCFG_PIN_RMP_PA11); LL_SYSCFG_EnablePinRemap(LL_SYSCFG_PIN_RMP_PA11);

4
boards/arm/stm32h747i_disco/pinmux.c
View file

@ -14,11 +14,11 @@
/* pin assignments for STM32H747I-DISCO board */ /* pin assignments for STM32H747I-DISCO board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32H7_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32H7_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32H7_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32H7_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(uart8)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(uart8))
{STM32_PIN_PJ8, STM32H7_PINMUX_FUNC_PJ8_UART8_TX}, {STM32_PIN_PJ8, STM32H7_PINMUX_FUNC_PJ8_UART8_TX},
{STM32_PIN_PJ9, STM32H7_PINMUX_FUNC_PJ9_UART8_RX}, {STM32_PIN_PJ9, STM32H7_PINMUX_FUNC_PJ9_UART8_RX},
#endif #endif

14
boards/arm/stm32l1_disco/pinmux.c
View file

@ -13,27 +13,27 @@
#include <pinmux/stm32/pinmux_stm32.h> #include <pinmux/stm32/pinmux_stm32.h>
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PA9, STM32L1X_PINMUX_FUNC_PA9_USART1_TX}, {STM32_PIN_PA9, STM32L1X_PINMUX_FUNC_PA9_USART1_TX},
{STM32_PIN_PA10, STM32L1X_PINMUX_FUNC_PA10_USART1_RX}, {STM32_PIN_PA10, STM32L1X_PINMUX_FUNC_PA10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32L1X_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32L1X_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32L1X_PINMUX_FUNC_PA3_USART2_RX}, {STM32_PIN_PA3, STM32L1X_PINMUX_FUNC_PA3_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart3))
{STM32_PIN_PB10, STM32L1X_PINMUX_FUNC_PB10_USART3_TX}, {STM32_PIN_PB10, STM32L1X_PINMUX_FUNC_PB10_USART3_TX},
{STM32_PIN_PB11, STM32L1X_PINMUX_FUNC_PB11_USART3_RX}, {STM32_PIN_PB11, STM32L1X_PINMUX_FUNC_PB11_USART3_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB6, STM32L1X_PINMUX_FUNC_PB6_I2C1_SCL}, {STM32_PIN_PB6, STM32L1X_PINMUX_FUNC_PB6_I2C1_SCL},
{STM32_PIN_PB7, STM32L1X_PINMUX_FUNC_PB7_I2C1_SDA}, {STM32_PIN_PB7, STM32L1X_PINMUX_FUNC_PB7_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c2))
{STM32_PIN_PB10, STM32L1X_PINMUX_FUNC_PB10_I2C2_SCL}, {STM32_PIN_PB10, STM32L1X_PINMUX_FUNC_PB10_I2C2_SCL},
{STM32_PIN_PB11, STM32L1X_PINMUX_FUNC_PB11_I2C2_SDA}, {STM32_PIN_PB11, STM32L1X_PINMUX_FUNC_PB11_I2C2_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32L1X_PINMUX_FUNC_PA4_SPI1_NSS}, {STM32_PIN_PA4, STM32L1X_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -41,7 +41,7 @@ static const struct pin_config pinconf[] = {
{STM32_PIN_PA6, STM32L1X_PINMUX_FUNC_PA6_SPI1_MISO}, {STM32_PIN_PA6, STM32L1X_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32L1X_PINMUX_FUNC_PA7_SPI1_MOSI}, {STM32_PIN_PA7, STM32L1X_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32L1X_PINMUX_FUNC_PB12_SPI2_NSS}, {STM32_PIN_PB12, STM32L1X_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */

2
boards/arm/stm32l476g_disco/pinmux.c
View file

@ -14,7 +14,7 @@
/* pin assignments for STM32L476G DISCOVERY board */ /* pin assignments for STM32L476G DISCOVERY board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PD5, STM32L4X_PINMUX_FUNC_PD5_USART2_TX}, {STM32_PIN_PD5, STM32L4X_PINMUX_FUNC_PD5_USART2_TX},
{STM32_PIN_PD6, STM32L4X_PINMUX_FUNC_PD6_USART2_RX}, {STM32_PIN_PD6, STM32L4X_PINMUX_FUNC_PD6_USART2_RX},
#endif #endif

12
boards/arm/stm32l496g_disco/pinmux.c
View file

@ -15,28 +15,28 @@
/* pin assignments for STM32L476G-DISCO board */ /* pin assignments for STM32L476G-DISCO board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{STM32_PIN_PB6, STM32L4X_PINMUX_FUNC_PB6_USART1_TX}, {STM32_PIN_PB6, STM32L4X_PINMUX_FUNC_PB6_USART1_TX},
{STM32_PIN_PG10, STM32L4X_PINMUX_FUNC_PG10_USART1_RX}, {STM32_PIN_PG10, STM32L4X_PINMUX_FUNC_PG10_USART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{STM32_PIN_PA2, STM32L4X_PINMUX_FUNC_PA2_USART2_TX}, {STM32_PIN_PA2, STM32L4X_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PD6, STM32L4X_PINMUX_FUNC_PD6_USART2_RX}, {STM32_PIN_PD6, STM32L4X_PINMUX_FUNC_PD6_USART2_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpuart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpuart1))
{STM32_PIN_PG7, STM32L4X_PINMUX_FUNC_PG7_LPUART1_TX}, {STM32_PIN_PG7, STM32L4X_PINMUX_FUNC_PG7_LPUART1_TX},
{STM32_PIN_PG8, STM32L4X_PINMUX_FUNC_PG8_LPUART1_RX}, {STM32_PIN_PG8, STM32L4X_PINMUX_FUNC_PG8_LPUART1_RX},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{STM32_PIN_PB8, STM32L4X_PINMUX_FUNC_PB8_I2C1_SCL}, {STM32_PIN_PB8, STM32L4X_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB7, STM32L4X_PINMUX_FUNC_PB7_I2C1_SDA}, {STM32_PIN_PB7, STM32L4X_PINMUX_FUNC_PB7_I2C1_SDA},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
{STM32_PIN_PA5, STM32L4X_PINMUX_FUNC_PA5_SPI1_SCK}, {STM32_PIN_PA5, STM32L4X_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PB4, STM32L4X_PINMUX_FUNC_PB4_SPI1_MISO}, {STM32_PIN_PB4, STM32L4X_PINMUX_FUNC_PB4_SPI1_MISO},
{STM32_PIN_PB5, STM32L4X_PINMUX_FUNC_PB5_SPI1_MOSI}, {STM32_PIN_PB5, STM32L4X_PINMUX_FUNC_PB5_SPI1_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm2))
{STM32_PIN_PA0, STM32L4X_PINMUX_FUNC_PA0_PWM2_CH1}, {STM32_PIN_PA0, STM32L4X_PINMUX_FUNC_PA0_PWM2_CH1},
#endif #endif
}; };

10
boards/arm/stm32mp157c_dk2/pinmux.c
View file

@ -14,19 +14,19 @@
/* pin assignments for STM32MP157c_dk2 board */ /* pin assignments for STM32MP157c_dk2 board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart3))
{ STM32_PIN_PB10, STM32MP1X_PINMUX_FUNC_PB10_USART3_TX }, { STM32_PIN_PB10, STM32MP1X_PINMUX_FUNC_PB10_USART3_TX },
{ STM32_PIN_PB12, STM32MP1X_PINMUX_FUNC_PB12_USART3_RX }, { STM32_PIN_PB12, STM32MP1X_PINMUX_FUNC_PB12_USART3_RX },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(uart7)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(uart7))
{ STM32_PIN_PE7, STM32MP1X_PINMUX_FUNC_PE7_UART7_RX }, { STM32_PIN_PE7, STM32MP1X_PINMUX_FUNC_PE7_UART7_RX },
{ STM32_PIN_PE8, STM32MP1X_PINMUX_FUNC_PE8_UART7_TX }, { STM32_PIN_PE8, STM32MP1X_PINMUX_FUNC_PE8_UART7_TX },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c5)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c5))
{ STM32_PIN_PA11, STM32MP1X_PINMUX_FUNC_PA11_I2C5_SCL }, { STM32_PIN_PA11, STM32MP1X_PINMUX_FUNC_PA11_I2C5_SCL },
{ STM32_PIN_PA12, STM32MP1X_PINMUX_FUNC_PA12_I2C5_SDA }, { STM32_PIN_PA12, STM32MP1X_PINMUX_FUNC_PA12_I2C5_SDA },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi4)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi4))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PE11, STM32MP1X_PINMUX_FUNC_PE11_SPI4_NSS}, {STM32_PIN_PE11, STM32MP1X_PINMUX_FUNC_PE11_SPI4_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -35,7 +35,7 @@ static const struct pin_config pinconf[] = {
STM32_OSPEEDR_VERY_HIGH_SPEED}, STM32_OSPEEDR_VERY_HIGH_SPEED},
{STM32_PIN_PE14, STM32MP1X_PINMUX_FUNC_PE14_SPI4_MOSI}, {STM32_PIN_PE14, STM32MP1X_PINMUX_FUNC_PE14_SPI4_MOSI},
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi5)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi5))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PF6, STM32MP1X_PINMUX_FUNC_PF6_SPI5_NSS}, {STM32_PIN_PF6, STM32MP1X_PINMUX_FUNC_PF6_SPI5_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */

16
boards/arm/stm32vl_disco/pinmux.c
View file

@ -14,22 +14,22 @@
/* pin assignments for STM32 Discovery VL board */ /* pin assignments for STM32 Discovery VL board */
static const struct pin_config pinconf[] = { static const struct pin_config pinconf[] = {
#if DT_HAS_NODE(DT_NODELABEL(usart1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart1))
{ STM32_PIN_PA9, STM32F1_PINMUX_FUNC_PA9_USART1_TX }, { STM32_PIN_PA9, STM32F1_PINMUX_FUNC_PA9_USART1_TX },
{ STM32_PIN_PA10, STM32F1_PINMUX_FUNC_PA10_USART1_RX }, { STM32_PIN_PA10, STM32F1_PINMUX_FUNC_PA10_USART1_RX },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart2))
{ STM32_PIN_PA2, STM32F1_PINMUX_FUNC_PA2_USART2_TX }, { STM32_PIN_PA2, STM32F1_PINMUX_FUNC_PA2_USART2_TX },
{ STM32_PIN_PA3, STM32F1_PINMUX_FUNC_PA3_USART2_RX }, { STM32_PIN_PA3, STM32F1_PINMUX_FUNC_PA3_USART2_RX },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(usart3)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(usart3))
{ STM32_PIN_PB10, STM32F1_PINMUX_FUNC_PB10_USART3_TX }, { STM32_PIN_PB10, STM32F1_PINMUX_FUNC_PB10_USART3_TX },
{ STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_USART3_RX }, { STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_USART3_RX },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(pwm1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(pwm1))
{ STM32_PIN_PA8, STM32F1_PINMUX_FUNC_PA8_PWM1_CH1 }, { STM32_PIN_PA8, STM32F1_PINMUX_FUNC_PA8_PWM1_CH1 },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi1))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{ STM32_PIN_PA4, STM32F1_PINMUX_FUNC_PA4_SPI1_MASTER_NSS }, { STM32_PIN_PA4, STM32F1_PINMUX_FUNC_PA4_SPI1_MASTER_NSS },
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -37,7 +37,7 @@ static const struct pin_config pinconf[] = {
{ STM32_PIN_PA6, STM32F1_PINMUX_FUNC_PA6_SPI1_MASTER_MISO }, { STM32_PIN_PA6, STM32F1_PINMUX_FUNC_PA6_SPI1_MASTER_MISO },
{ STM32_PIN_PA7, STM32F1_PINMUX_FUNC_PA7_SPI1_MASTER_MOSI }, { STM32_PIN_PA7, STM32F1_PINMUX_FUNC_PA7_SPI1_MASTER_MOSI },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(spi2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(spi2))
#ifdef CONFIG_SPI_STM32_USE_HW_SS #ifdef CONFIG_SPI_STM32_USE_HW_SS
{ STM32_PIN_PB12, STM32F1_PINMUX_FUNC_PB12_SPI2_MASTER_NSS }, { STM32_PIN_PB12, STM32F1_PINMUX_FUNC_PB12_SPI2_MASTER_NSS },
#endif /* CONFIG_SPI_STM32_USE_HW_SS */ #endif /* CONFIG_SPI_STM32_USE_HW_SS */
@ -45,11 +45,11 @@ static const struct pin_config pinconf[] = {
{ STM32_PIN_PB14, STM32F1_PINMUX_FUNC_PB14_SPI2_MASTER_MISO }, { STM32_PIN_PB14, STM32F1_PINMUX_FUNC_PB14_SPI2_MASTER_MISO },
{ STM32_PIN_PB15, STM32F1_PINMUX_FUNC_PB15_SPI2_MASTER_MOSI }, { STM32_PIN_PB15, STM32F1_PINMUX_FUNC_PB15_SPI2_MASTER_MOSI },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c1))
{ STM32_PIN_PB6, STM32F1_PINMUX_FUNC_PB6_I2C1_SCL }, { STM32_PIN_PB6, STM32F1_PINMUX_FUNC_PB6_I2C1_SCL },
{ STM32_PIN_PB7, STM32F1_PINMUX_FUNC_PB7_I2C1_SDA }, { STM32_PIN_PB7, STM32F1_PINMUX_FUNC_PB7_I2C1_SDA },
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(i2c2)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(i2c2))
{ STM32_PIN_PB10, STM32F1_PINMUX_FUNC_PB10_I2C2_SCL }, { STM32_PIN_PB10, STM32F1_PINMUX_FUNC_PB10_I2C2_SCL },
{ STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_I2C2_SDA }, { STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_I2C2_SDA },
#endif #endif

20
boards/arm/twr_ke18f/pinmux.c
View file

@ -34,7 +34,7 @@ static int twr_ke18f_pinmux_init(struct device *dev)
device_get_binding(CONFIG_PINMUX_MCUX_PORTE_NAME); device_get_binding(CONFIG_PINMUX_MCUX_PORTE_NAME);
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(ftm0)) && \ #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(ftm0)) && \
DT_NODE_HAS_COMPAT(DT_NODELABEL(ftm0), nxp_kinetis_ftm_pwm) DT_NODE_HAS_COMPAT(DT_NODELABEL(ftm0), nxp_kinetis_ftm_pwm)
/* Tri-color LED as PWM */ /* Tri-color LED as PWM */
pinmux_pin_set(portb, 5, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(portb, 5, PORT_PCR_MUX(kPORT_MuxAlt2));
@ -47,7 +47,7 @@ static int twr_ke18f_pinmux_init(struct device *dev)
pinmux_pin_set(portd, 16, PORT_PCR_MUX(kPORT_MuxAsGpio)); pinmux_pin_set(portd, 16, PORT_PCR_MUX(kPORT_MuxAsGpio));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(ftm3)) && \ #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(ftm3)) && \
DT_NODE_HAS_COMPAT(DT_NODELABEL(ftm3), nxp_kinetis_ftm_pwm) DT_NODE_HAS_COMPAT(DT_NODELABEL(ftm3), nxp_kinetis_ftm_pwm)
/* User LEDs as PWM */ /* User LEDs as PWM */
pinmux_pin_set(portc, 10, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(portc, 10, PORT_PCR_MUX(kPORT_MuxAlt2));
@ -66,13 +66,13 @@ static int twr_ke18f_pinmux_init(struct device *dev)
pinmux_pin_set(portd, 3, PORT_PCR_MUX(kPORT_MuxAsGpio)); pinmux_pin_set(portd, 3, PORT_PCR_MUX(kPORT_MuxAsGpio));
pinmux_pin_set(portd, 6, PORT_PCR_MUX(kPORT_MuxAsGpio)); pinmux_pin_set(portd, 6, PORT_PCR_MUX(kPORT_MuxAsGpio));
#if DT_HAS_NODE(DT_NODELABEL(lpuart0)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpuart0))
/* UART0 RX, TX */ /* UART0 RX, TX */
pinmux_pin_set(portb, 0, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(portb, 0, PORT_PCR_MUX(kPORT_MuxAlt2));
pinmux_pin_set(portb, 1, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(portb, 1, PORT_PCR_MUX(kPORT_MuxAlt2));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpspi0)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpspi0))
/* SPI0 SCK, SIN, SOUT */ /* SPI0 SCK, SIN, SOUT */
pinmux_pin_set(porte, 0, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(porte, 0, PORT_PCR_MUX(kPORT_MuxAlt2));
pinmux_pin_set(porte, 1, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(porte, 1, PORT_PCR_MUX(kPORT_MuxAlt2));
@ -85,7 +85,7 @@ static int twr_ke18f_pinmux_init(struct device *dev)
pinmux_pin_set(porte, 6, PORT_PCR_MUX(kPORT_MuxAsGpio)); pinmux_pin_set(porte, 6, PORT_PCR_MUX(kPORT_MuxAsGpio));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpspi1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpspi1))
/* SPI1 SCK, SIN, SOUT */ /* SPI1 SCK, SIN, SOUT */
pinmux_pin_set(portd, 0, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portd, 0, PORT_PCR_MUX(kPORT_MuxAlt3));
pinmux_pin_set(portd, 1, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portd, 1, PORT_PCR_MUX(kPORT_MuxAlt3));
@ -109,19 +109,19 @@ static int twr_ke18f_pinmux_init(struct device *dev)
pinmux_pin_set(porte, 10, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(porte, 10, PORT_PCR_MUX(kPORT_MuxAlt2));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpi2c0)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpi2c0))
/* LPI2C0 SCL, SDA - FXOS8700 */ /* LPI2C0 SCL, SDA - FXOS8700 */
pinmux_pin_set(porta, 3, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(porta, 3, PORT_PCR_MUX(kPORT_MuxAlt3));
pinmux_pin_set(porta, 2, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(porta, 2, PORT_PCR_MUX(kPORT_MuxAlt3));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(lpi2c1)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(lpi2c1))
/* LPI2C1 SCL, SDA - Elevator connector */ /* LPI2C1 SCL, SDA - Elevator connector */
pinmux_pin_set(portd, 9, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(portd, 9, PORT_PCR_MUX(kPORT_MuxAlt2));
pinmux_pin_set(portd, 8, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(portd, 8, PORT_PCR_MUX(kPORT_MuxAlt2));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(flexcan0)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(flexcan0))
/* FlexCAN0 RX, TX */ /* FlexCAN0 RX, TX */
pinmux_pin_set(porte, 4, PORT_PCR_MUX(kPORT_MuxAlt5)); pinmux_pin_set(porte, 4, PORT_PCR_MUX(kPORT_MuxAlt5));
pinmux_pin_set(porte, 5, PORT_PCR_MUX(kPORT_MuxAlt5)); pinmux_pin_set(porte, 5, PORT_PCR_MUX(kPORT_MuxAlt5));
@ -136,7 +136,7 @@ static int twr_ke18f_pinmux_init(struct device *dev)
#endif #endif
pinmux_pin_set(portc, 15, PORT_PCR_MUX(kPORT_MuxAsGpio)); pinmux_pin_set(portc, 15, PORT_PCR_MUX(kPORT_MuxAsGpio));
#if DT_HAS_NODE(DT_NODELABEL(adc0)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(adc0))
/* Thermistor A, B */ /* Thermistor A, B */
pinmux_pin_set(porta, 0, PORT_PCR_MUX(kPORT_PinDisabledOrAnalog)); pinmux_pin_set(porta, 0, PORT_PCR_MUX(kPORT_PinDisabledOrAnalog));
pinmux_pin_set(porta, 1, PORT_PCR_MUX(kPORT_PinDisabledOrAnalog)); pinmux_pin_set(porta, 1, PORT_PCR_MUX(kPORT_PinDisabledOrAnalog));
@ -144,7 +144,7 @@ static int twr_ke18f_pinmux_init(struct device *dev)
pinmux_pin_set(portc, 14, PORT_PCR_MUX(kPORT_PinDisabledOrAnalog)); pinmux_pin_set(portc, 14, PORT_PCR_MUX(kPORT_PinDisabledOrAnalog));
#endif #endif
#if DT_HAS_NODE(DT_NODELABEL(dac0)) #if DT_HAS_NODE_STATUS_OKAY(DT_NODELABEL(dac0))
pinmux_pin_set(porte, 9, PORT_PCR_MUX(kPORT_PinDisabledOrAnalog)); pinmux_pin_set(porte, 9, PORT_PCR_MUX(kPORT_PinDisabledOrAnalog));
#endif #endif

Some files were not shown because too many files have changed in this diff Show more