soc: intel_adsp: Manage power gating based on core activity
This patch enhances the power management capabilities of the Intel ADSP by ensuring that power gating states are appropriately managed based on core activity. It prevents the primary core from entering power gating if secondary cores are active and re-enables power gating when all secondary cores are off, using pm_policy_state_lock_get and pm_policy_state_lock_put functions. The Sound Open Firmware (SOF) project currently uses a custom power management policy to achieve these effects. With this patch, the default power management policy can be utilized, allowing the option to disable the custom policy while maintaining system reliability and performance across different core states. Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
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2 changed files with 11 additions and 0 deletions
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@ -11,6 +11,7 @@
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#include <zephyr/arch/cpu.h>
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#include <zephyr/arch/xtensa/arch.h>
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#include <zephyr/pm/pm.h>
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#include <zephyr/pm/policy.h>
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#include <zephyr/pm/device_runtime.h>
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#include <ksched.h>
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@ -147,6 +148,11 @@ void soc_start_core(int cpu_num)
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} else {
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*rom_jump_vector = (uint32_t) dsp_restore_vector;
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}
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/* The primary core cannot enter power gating if any of the secondary cores are
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* active.
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*/
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pm_policy_state_lock_get(PM_STATE_RUNTIME_IDLE, PM_ALL_SUBSTATES);
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#else
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*rom_jump_vector = (uint32_t) z_soc_mp_asm_entry;
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#endif
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@ -5,6 +5,7 @@
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*/
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#include <zephyr/kernel.h>
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#include <zephyr/pm/pm.h>
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#include <zephyr/pm/policy.h>
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#include <zephyr/pm/device_runtime.h>
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#include <zephyr/device.h>
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#include <zephyr/debug/sparse.h>
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@ -342,6 +343,10 @@ void pm_state_set(enum pm_state state, uint8_t substate_id)
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/* do power down - this function won't return */
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power_down(true, IS_ENABLED(CONFIG_ADSP_POWER_DOWN_HPSRAM), true);
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} else {
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/* When all secondary cores are turned off, power gating for the primary
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* core will be re-enabled.
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*/
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pm_policy_state_lock_put(PM_STATE_RUNTIME_IDLE, PM_ALL_SUBSTATES);
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power_gate_entry(cpu);
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}
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break;
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