drivers: flash: drop DEV_DATA/DEV_CFG usage
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and dev->config instead. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit is contained in:
Gerard Marull-Paretas
Carles Cufí
parent
6f6a178390
commit
fb23084be1
5 changed files with 81 additions and 76 deletions
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@ -66,9 +66,6 @@ static const struct flash_parameters flash_esp32_parameters = {
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.erase_value = 0xff,
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};
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#define DEV_DATA(dev) ((struct flash_esp32_dev_data *const)(dev)->data)
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#define DEV_CFG(dev) ((const struct flash_esp32_dev_config *const)(dev)->config)
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#if !defined(CONFIG_SOC_ESP32C3)
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#define SPI1_EXTRA_DUMMIES (g_rom_spiflash_dummy_len_plus[1])
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#else
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@ -101,12 +98,16 @@ static esp_rom_spiflash_chip_t esp_flashchip_info;
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static inline void flash_esp32_sem_take(const struct device *dev)
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{
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k_sem_take(&DEV_DATA(dev)->sem, K_FOREVER);
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struct flash_esp32_dev_data *data = dev->data;
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k_sem_take(&data->sem, K_FOREVER);
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}
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static inline void flash_esp32_sem_give(const struct device *dev)
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{
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k_sem_give(&DEV_DATA(dev)->sem);
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struct flash_esp32_dev_data *data = dev->data;
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k_sem_give(&data->sem);
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}
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static inline int flash_esp32_wait_cmd_done(const spi_dev_t *hw)
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@ -231,7 +232,8 @@ static void IRAM_ATTR flash_esp32_flush_cache(size_t start_addr, size_t length)
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static int set_read_options(const struct device *dev)
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{
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spi_dev_t *hw = DEV_CFG(dev)->controller;
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const struct flash_esp32_dev_config *config = dev->config;
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spi_dev_t *hw = config->controller;
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uint32_t dummy_len = 0;
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uint32_t addr_len;
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uint8_t read_cmd;
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@ -285,7 +287,8 @@ static int set_read_options(const struct device *dev)
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static int read_once(const struct device *dev, void *buffer, uint32_t address, uint32_t read_len)
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{
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spi_dev_t *hw = DEV_CFG(dev)->controller;
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const struct flash_esp32_dev_config *config = dev->config;
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spi_dev_t *hw = config->controller;
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int bitlen = spi_flash_ll_get_addr_bitlen(hw);
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spi_flash_ll_set_usr_address(hw, address << (bitlen - 24), bitlen);
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@ -328,7 +331,7 @@ static int read_data(const struct device *dev, uint8_t *buffer, uint32_t address
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static int flash_esp32_read(const struct device *dev, off_t address, void *buffer, size_t length)
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{
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const struct flash_esp32_dev_config *const cfg = DEV_CFG(dev);
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const struct flash_esp32_dev_config *const cfg = dev->config;
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const spi_flash_guard_funcs_t *guard = spi_flash_guard_get();
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uint32_t chip_size = cfg->chip->chip_size;
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@ -408,7 +411,8 @@ out:
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static inline void set_write_options(const struct device *dev)
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{
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spi_dev_t *hw = DEV_CFG(dev)->controller;
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const struct flash_esp32_dev_config *config = dev->config;
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spi_dev_t *hw = config->controller;
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spi_flash_ll_set_dummy(hw, 0);
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/* only single line flash write is currently supported */
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@ -417,7 +421,7 @@ static inline void set_write_options(const struct device *dev)
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static int read_status(const struct device *dev, uint32_t *status)
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{
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const struct flash_esp32_dev_config *const cfg = DEV_CFG(dev);
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const struct flash_esp32_dev_config *const cfg = dev->config;
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uint32_t status_value = ESP_ROM_SPIFLASH_BUSY_FLAG;
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if (SPI1_EXTRA_DUMMIES == 0) {
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@ -462,7 +466,7 @@ static inline bool host_idle(spi_dev_t *hw)
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static int wait_idle(const struct device *dev)
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{
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const struct flash_esp32_dev_config *const cfg = DEV_CFG(dev);
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const struct flash_esp32_dev_config *const cfg = dev->config;
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uint32_t status;
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int64_t timeout = k_uptime_get() + SPI_TIMEOUT_MSEC;
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@ -482,7 +486,7 @@ static int wait_idle(const struct device *dev)
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static int write_protect(const struct device *dev, bool write_protect)
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{
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const struct flash_esp32_dev_config *const cfg = DEV_CFG(dev);
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const struct flash_esp32_dev_config *const cfg = dev->config;
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wait_idle(dev);
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@ -508,8 +512,9 @@ static int write_protect(const struct device *dev, bool write_protect)
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static int program_page(const struct device *dev, uint32_t spi_addr,
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uint32_t *addr_source, int32_t byte_length)
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{
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const uint32_t page_size = DEV_CFG(dev)->chip->page_size;
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spi_dev_t *hw = DEV_CFG(dev)->controller;
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const struct flash_esp32_dev_config *config = dev->config;
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const uint32_t page_size = config->chip->page_size;
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spi_dev_t *hw = config->controller;
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/* check 4byte alignment */
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if ((byte_length & 0x3) != 0) {
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@ -567,9 +572,9 @@ static int flash_esp32_write_inner(const struct device *dev,
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const uint32_t *buffer,
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size_t length)
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{
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const uint32_t page_size = DEV_CFG(dev)->chip->page_size;
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const uint32_t chip_size = DEV_CFG(dev)->chip->chip_size;
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const struct flash_esp32_dev_config *config = dev->config;
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const uint32_t page_size = config->chip->page_size;
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const uint32_t chip_size = config->chip->chip_size;
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uint32_t prog_len, prog_num;
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set_write_options(dev);
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@ -617,7 +622,8 @@ static int flash_esp32_write(const struct device *dev,
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const void *buffer,
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size_t length)
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{
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const uint32_t chip_size = DEV_CFG(dev)->chip->chip_size;
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const struct flash_esp32_dev_config *config = dev->config;
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const uint32_t chip_size = config->chip->chip_size;
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const spi_flash_guard_funcs_t *guard = spi_flash_guard_get();
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int rc = 0;
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@ -703,7 +709,8 @@ out:
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static int erase_sector(const struct device *dev, uint32_t start_addr)
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{
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spi_dev_t *hw = DEV_CFG(dev)->controller;
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const struct flash_esp32_dev_config *config = dev->config;
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spi_dev_t *hw = config->controller;
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int rc = write_protect(dev, false);
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if (rc == 0) {
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@ -731,8 +738,9 @@ static int erase_sector(const struct device *dev, uint32_t start_addr)
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static int flash_esp32_erase(const struct device *dev, off_t start, size_t len)
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{
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uint32_t sector_size = DEV_CFG(dev)->chip->sector_size;
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uint32_t chip_size = DEV_CFG(dev)->chip->chip_size;
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const struct flash_esp32_dev_config *config = dev->config;
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uint32_t sector_size = config->chip->sector_size;
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uint32_t chip_size = config->chip->chip_size;
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const spi_flash_guard_funcs_t *guard = spi_flash_guard_get();
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int rc = 0;
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@ -800,7 +808,7 @@ flash_esp32_get_parameters(const struct device *dev)
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static int flash_esp32_init(const struct device *dev)
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{
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struct flash_esp32_dev_data *const dev_data = DEV_DATA(dev);
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struct flash_esp32_dev_data *const dev_data = dev->data;
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#if defined(CONFIG_SOC_ESP32C3)
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spiflash_legacy_data_t *legacy_data = rom_spiflash_legacy_data;
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@ -31,8 +31,6 @@ static const struct flash_parameters flash_gecko_parameters = {
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};
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#define DEV_NAME(dev) ((dev)->name)
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#define DEV_DATA(dev) \
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((struct flash_gecko_data *const)(dev)->data)
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static bool write_range_is_valid(off_t offset, uint32_t size);
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static bool read_range_is_valid(off_t offset, uint32_t size);
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@ -59,7 +57,7 @@ static int flash_gecko_read(const struct device *dev, off_t offset,
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static int flash_gecko_write(const struct device *dev, off_t offset,
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const void *data, size_t size)
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{
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struct flash_gecko_data *const dev_data = DEV_DATA(dev);
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struct flash_gecko_data *const dev_data = dev->data;
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MSC_Status_TypeDef msc_ret;
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void *address;
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int ret = 0;
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@ -90,7 +88,7 @@ static int flash_gecko_write(const struct device *dev, off_t offset,
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static int flash_gecko_erase(const struct device *dev, off_t offset,
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size_t size)
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{
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struct flash_gecko_data *const dev_data = DEV_DATA(dev);
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struct flash_gecko_data *const dev_data = dev->data;
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int ret;
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if (!read_range_is_valid(offset, size)) {
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@ -197,7 +195,7 @@ flash_gecko_get_parameters(const struct device *dev)
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static int flash_gecko_init(const struct device *dev)
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{
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struct flash_gecko_data *const dev_data = DEV_DATA(dev);
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struct flash_gecko_data *const dev_data = dev->data;
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k_sem_init(&dev_data->mutex, 1, 1);
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@ -32,9 +32,6 @@ extern char _ram_code_start;
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#define FLASH_IT8XXX2_REG_BASE \
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((struct flash_it8xxx2_regs *)DT_INST_REG_ADDR(0))
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#define DEV_DATA(dev) \
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((struct flash_it8xxx2_dev_data *const)(dev)->data)
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struct flash_it8xxx2_dev_data {
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struct k_sem sem;
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int all_protected;
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@ -411,7 +408,7 @@ static int __ram_code flash_it8xxx2_read(const struct device *dev, off_t offset,
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static int __ram_code flash_it8xxx2_write(const struct device *dev, off_t offset,
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const void *src_data, size_t len)
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{
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struct flash_it8xxx2_dev_data *data = DEV_DATA(dev);
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struct flash_it8xxx2_dev_data *data = dev->data;
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int ret = -EINVAL;
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unsigned int key;
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@ -457,7 +454,7 @@ static int __ram_code flash_it8xxx2_write(const struct device *dev, off_t offset
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static int __ram_code flash_it8xxx2_erase(const struct device *dev,
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off_t offset, size_t len)
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{
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struct flash_it8xxx2_dev_data *data = DEV_DATA(dev);
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struct flash_it8xxx2_dev_data *data = dev->data;
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int v_size = len, v_addr = offset, ret = -EINVAL;
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unsigned int key;
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@ -507,7 +504,7 @@ static int __ram_code flash_it8xxx2_erase(const struct device *dev,
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static int flash_it8xxx2_write_protection(const struct device *dev,
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bool enable)
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{
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struct flash_it8xxx2_dev_data *data = DEV_DATA(dev);
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struct flash_it8xxx2_dev_data *data = dev->data;
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if (enable) {
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/* Protect the entire flash */
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@ -538,7 +535,7 @@ flash_it8xxx2_get_parameters(const struct device *dev)
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static void flash_code_static_cache(const struct device *dev)
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{
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struct flash_it8xxx2_regs *const flash_regs = FLASH_IT8XXX2_REG_BASE;
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struct flash_it8xxx2_dev_data *data = DEV_DATA(dev);
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struct flash_it8xxx2_dev_data *data = dev->data;
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unsigned int key;
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/* Make sure no interrupt while enable static cache */
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@ -574,7 +571,7 @@ static void flash_code_static_cache(const struct device *dev)
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static int flash_it8xxx2_init(const struct device *dev)
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{
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struct flash_it8xxx2_regs *const flash_regs = FLASH_IT8XXX2_REG_BASE;
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struct flash_it8xxx2_dev_data *data = DEV_DATA(dev);
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struct flash_it8xxx2_dev_data *data = dev->data;
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/* By default, select internal flash for indirect fast read. */
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flash_regs->SMFI_ECINDAR3 = EC_INDIRECT_READ_INTERNAL_FLASH;
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@ -51,22 +51,20 @@ static const struct flash_parameters flash_sam_parameters = {
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.erase_value = 0xff,
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};
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#define DEV_CFG(dev) \
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((const struct flash_sam_dev_cfg *const)(dev)->config)
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#define DEV_DATA(dev) \
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((struct flash_sam_dev_data *const)(dev)->data)
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static int flash_sam_write_protection(const struct device *dev, bool enable);
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static inline void flash_sam_sem_take(const struct device *dev)
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{
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k_sem_take(&DEV_DATA(dev)->sem, K_FOREVER);
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struct flash_sam_dev_data *data = dev->data;
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k_sem_take(&data->sem, K_FOREVER);
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}
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static inline void flash_sam_sem_give(const struct device *dev)
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{
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k_sem_give(&DEV_DATA(dev)->sem);
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struct flash_sam_dev_data *data = dev->data;
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k_sem_give(&data->sem);
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}
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/* Check that the offset is within the flash */
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@ -96,7 +94,9 @@ static off_t flash_sam_get_page(off_t offset)
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*/
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static int flash_sam_wait_ready(const struct device *dev)
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{
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Efc *const efc = DEV_CFG(dev)->regs;
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const struct flash_sam_dev_cfg *config = dev->config;
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Efc *const efc = config->regs;
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uint64_t timeout_time = k_uptime_get() + SAM_FLASH_TIMEOUT_MS;
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uint32_t fsr;
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@ -135,7 +135,9 @@ static int flash_sam_wait_ready(const struct device *dev)
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static int flash_sam_write_page(const struct device *dev, off_t offset,
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const void *data, size_t len)
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{
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Efc *const efc = DEV_CFG(dev)->regs;
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const struct flash_sam_dev_cfg *config = dev->config;
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Efc *const efc = config->regs;
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const uint32_t *src = data;
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uint32_t *dst = (uint32_t *)((uint8_t *)CONFIG_FLASH_BASE_ADDRESS + offset);
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@ -242,7 +244,9 @@ static int flash_sam_read(const struct device *dev, off_t offset, void *data,
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/* Erase a single 8KiB block */
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static int flash_sam_erase_block(const struct device *dev, off_t offset)
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{
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Efc *const efc = DEV_CFG(dev)->regs;
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const struct flash_sam_dev_cfg *config = dev->config;
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Efc *const efc = config->regs;
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LOG_DBG("offset = 0x%lx", (long)offset);
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@ -314,7 +318,9 @@ static int flash_sam_erase(const struct device *dev, off_t offset, size_t len)
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/* Enable or disable the write protection */
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static int flash_sam_write_protection(const struct device *dev, bool enable)
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{
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Efc *const efc = DEV_CFG(dev)->regs;
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const struct flash_sam_dev_cfg *config = dev->config;
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Efc *const efc = config->regs;
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int rc = 0;
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if (enable) {
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@ -360,7 +366,7 @@ flash_sam_get_parameters(const struct device *dev)
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static int flash_sam_init(const struct device *dev)
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{
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struct flash_sam_dev_data *const data = DEV_DATA(dev);
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struct flash_sam_dev_data *const data = dev->data;
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k_sem_init(&data->sem, 1, 1);
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@ -106,21 +106,17 @@ struct flash_stm32_qspi_data {
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};
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#define DEV_NAME(dev) ((dev)->name)
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#define DEV_CFG(dev) \
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(const struct flash_stm32_qspi_config * const)(dev->config)
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#define DEV_DATA(dev) \
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(struct flash_stm32_qspi_data * const)(dev->data)
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static inline void qspi_lock_thread(const struct device *dev)
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{
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struct flash_stm32_qspi_data *dev_data = DEV_DATA(dev);
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struct flash_stm32_qspi_data *dev_data = dev->data;
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k_sem_take(&dev_data->sem, K_FOREVER);
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}
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static inline void qspi_unlock_thread(const struct device *dev)
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{
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struct flash_stm32_qspi_data *dev_data = DEV_DATA(dev);
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struct flash_stm32_qspi_data *dev_data = dev->data;
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k_sem_give(&dev_data->sem);
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}
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@ -128,7 +124,7 @@ static inline void qspi_unlock_thread(const struct device *dev)
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static inline void qspi_set_address_size(const struct device *dev,
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QSPI_CommandTypeDef *cmd)
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{
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struct flash_stm32_qspi_data *dev_data = DEV_DATA(dev);
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struct flash_stm32_qspi_data *dev_data = dev->data;
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if (dev_data->flag_access_32bit) {
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cmd->AddressSize = QSPI_ADDRESS_32_BITS;
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@ -141,7 +137,7 @@ static inline void qspi_set_address_size(const struct device *dev,
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static inline void qspi_prepare_quad_read(const struct device *dev,
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QSPI_CommandTypeDef *cmd)
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{
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struct flash_stm32_qspi_data *dev_data = DEV_DATA(dev);
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struct flash_stm32_qspi_data *dev_data = dev->data;
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if (IS_ENABLED(STM32_QSPI_USE_QUAD_IO) && dev_data->flag_quad_io_en) {
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cmd->Instruction = dev_data->qspi_read_cmd;
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@ -154,7 +150,7 @@ static inline void qspi_prepare_quad_read(const struct device *dev,
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static inline void qspi_prepare_quad_program(const struct device *dev,
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QSPI_CommandTypeDef *cmd)
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{
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struct flash_stm32_qspi_data *dev_data = DEV_DATA(dev);
|
||||
struct flash_stm32_qspi_data *dev_data = dev->data;
|
||||
/*
|
||||
* There is no info about PP/4PP command in the SFDP tables,
|
||||
* hence it has been assumed that NOR flash memory supporting
|
||||
|
|
@ -177,8 +173,8 @@ static inline void qspi_prepare_quad_program(const struct device *dev,
|
|||
*/
|
||||
static int qspi_send_cmd(const struct device *dev, QSPI_CommandTypeDef *cmd)
|
||||
{
|
||||
const struct flash_stm32_qspi_config *dev_cfg = DEV_CFG(dev);
|
||||
struct flash_stm32_qspi_data *dev_data = DEV_DATA(dev);
|
||||
const struct flash_stm32_qspi_config *dev_cfg = dev->config;
|
||||
struct flash_stm32_qspi_data *dev_data = dev->data;
|
||||
HAL_StatusTypeDef hal_ret;
|
||||
|
||||
ARG_UNUSED(dev_cfg);
|
||||
|
|
@ -205,8 +201,8 @@ static int qspi_send_cmd(const struct device *dev, QSPI_CommandTypeDef *cmd)
|
|||
static int qspi_read_access(const struct device *dev, QSPI_CommandTypeDef *cmd,
|
||||
uint8_t *data, size_t size)
|
||||
{
|
||||
const struct flash_stm32_qspi_config *dev_cfg = DEV_CFG(dev);
|
||||
struct flash_stm32_qspi_data *dev_data = DEV_DATA(dev);
|
||||
const struct flash_stm32_qspi_config *dev_cfg = dev->config;
|
||||
struct flash_stm32_qspi_data *dev_data = dev->data;
|
||||
HAL_StatusTypeDef hal_ret;
|
||||
|
||||
ARG_UNUSED(dev_cfg);
|
||||
|
|
@ -242,8 +238,8 @@ static int qspi_read_access(const struct device *dev, QSPI_CommandTypeDef *cmd,
|
|||
static int qspi_write_access(const struct device *dev, QSPI_CommandTypeDef *cmd,
|
||||
const uint8_t *data, size_t size)
|
||||
{
|
||||
const struct flash_stm32_qspi_config *dev_cfg = DEV_CFG(dev);
|
||||
struct flash_stm32_qspi_data *dev_data = DEV_DATA(dev);
|
||||
const struct flash_stm32_qspi_config *dev_cfg = dev->config;
|
||||
struct flash_stm32_qspi_data *dev_data = dev->data;
|
||||
HAL_StatusTypeDef hal_ret;
|
||||
|
||||
ARG_UNUSED(dev_cfg);
|
||||
|
|
@ -298,7 +294,7 @@ static int qspi_read_sfdp(const struct device *dev, off_t addr, uint8_t *data,
|
|||
static bool qspi_address_is_valid(const struct device *dev, off_t addr,
|
||||
size_t size)
|
||||
{
|
||||
const struct flash_stm32_qspi_config *dev_cfg = DEV_CFG(dev);
|
||||
const struct flash_stm32_qspi_config *dev_cfg = dev->config;
|
||||
size_t flash_size = dev_cfg->flash_size;
|
||||
|
||||
return (addr >= 0) && ((uint64_t)addr + (uint64_t)size <= flash_size);
|
||||
|
|
@ -423,8 +419,8 @@ static int flash_stm32_qspi_write(const struct device *dev, off_t addr,
|
|||
static int flash_stm32_qspi_erase(const struct device *dev, off_t addr,
|
||||
size_t size)
|
||||
{
|
||||
const struct flash_stm32_qspi_config *dev_cfg = DEV_CFG(dev);
|
||||
struct flash_stm32_qspi_data *dev_data = DEV_DATA(dev);
|
||||
const struct flash_stm32_qspi_config *dev_cfg = dev->config;
|
||||
struct flash_stm32_qspi_data *dev_data = dev->data;
|
||||
int ret = 0;
|
||||
|
||||
if (!qspi_address_is_valid(dev, addr, size)) {
|
||||
|
|
@ -509,7 +505,7 @@ flash_stm32_qspi_get_parameters(const struct device *dev)
|
|||
|
||||
static void flash_stm32_qspi_isr(const struct device *dev)
|
||||
{
|
||||
struct flash_stm32_qspi_data *dev_data = DEV_DATA(dev);
|
||||
struct flash_stm32_qspi_data *dev_data = dev->data;
|
||||
|
||||
HAL_QSPI_IRQHandler(&dev_data->hqspi);
|
||||
}
|
||||
|
|
@ -614,7 +610,7 @@ static void flash_stm32_qspi_pages_layout(const struct device *dev,
|
|||
const struct flash_pages_layout **layout,
|
||||
size_t *layout_size)
|
||||
{
|
||||
struct flash_stm32_qspi_data *dev_data = DEV_DATA(dev);
|
||||
struct flash_stm32_qspi_data *dev_data = dev->data;
|
||||
|
||||
*layout = &dev_data->layout;
|
||||
*layout_size = 1;
|
||||
|
|
@ -634,8 +630,8 @@ static const struct flash_driver_api flash_stm32_qspi_driver_api = {
|
|||
#if defined(CONFIG_FLASH_PAGE_LAYOUT)
|
||||
static int setup_pages_layout(const struct device *dev)
|
||||
{
|
||||
const struct flash_stm32_qspi_config *dev_cfg = DEV_CFG(dev);
|
||||
struct flash_stm32_qspi_data *data = DEV_DATA(dev);
|
||||
const struct flash_stm32_qspi_config *dev_cfg = dev->config;
|
||||
struct flash_stm32_qspi_data *data = dev->data;
|
||||
const size_t flash_size = dev_cfg->flash_size;
|
||||
uint32_t layout_page_size = data->page_size;
|
||||
uint8_t exp = 0;
|
||||
|
|
@ -760,7 +756,7 @@ static int qspi_write_enable(const struct device *dev)
|
|||
|
||||
static int qspi_program_quad_io(const struct device *dev)
|
||||
{
|
||||
struct flash_stm32_qspi_data *data = DEV_DATA(dev);
|
||||
struct flash_stm32_qspi_data *data = dev->data;
|
||||
uint8_t reg;
|
||||
int ret;
|
||||
|
||||
|
|
@ -813,8 +809,8 @@ static int spi_nor_process_bfp(const struct device *dev,
|
|||
const struct jesd216_param_header *php,
|
||||
const struct jesd216_bfp *bfp)
|
||||
{
|
||||
const struct flash_stm32_qspi_config *dev_cfg = DEV_CFG(dev);
|
||||
struct flash_stm32_qspi_data *data = DEV_DATA(dev);
|
||||
const struct flash_stm32_qspi_config *dev_cfg = dev->config;
|
||||
struct flash_stm32_qspi_data *data = dev->data;
|
||||
struct jesd216_erase_type *etp = data->erase_types;
|
||||
const size_t flash_size = jesd216_bfp_density(bfp) / 8U;
|
||||
uint8_t addr_mode;
|
||||
|
|
@ -902,7 +898,7 @@ static int spi_nor_process_bfp(const struct device *dev,
|
|||
#if STM32_QSPI_RESET_GPIO
|
||||
static void flash_stm32_qspi_gpio_reset(const struct device *dev)
|
||||
{
|
||||
const struct flash_stm32_qspi_config *dev_cfg = DEV_CFG(dev);
|
||||
const struct flash_stm32_qspi_config *dev_cfg = dev->config;
|
||||
|
||||
/* Generate RESETn pulse for the flash memory */
|
||||
gpio_pin_configure_dt(&dev_cfg->reset, GPIO_OUTPUT_ACTIVE);
|
||||
|
|
@ -913,8 +909,8 @@ static void flash_stm32_qspi_gpio_reset(const struct device *dev)
|
|||
|
||||
static int flash_stm32_qspi_init(const struct device *dev)
|
||||
{
|
||||
const struct flash_stm32_qspi_config *dev_cfg = DEV_CFG(dev);
|
||||
struct flash_stm32_qspi_data *dev_data = DEV_DATA(dev);
|
||||
const struct flash_stm32_qspi_config *dev_cfg = dev->config;
|
||||
struct flash_stm32_qspi_data *dev_data = dev->data;
|
||||
uint32_t ahb_clock_freq;
|
||||
uint32_t prescaler = 0;
|
||||
int ret;
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue