From fb23084be1484b8c399d16f64009f18fd3fb7132 Mon Sep 17 00:00:00 2001 From: Gerard Marull-Paretas Date: Tue, 18 Jan 2022 15:55:58 +0100 Subject: [PATCH] drivers: flash: drop DEV_DATA/DEV_CFG usage Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and dev->config instead. Signed-off-by: Gerard Marull-Paretas --- drivers/flash/flash_esp32.c | 52 ++++++++++++++++++------------- drivers/flash/flash_gecko.c | 8 ++--- drivers/flash/flash_ite_it8xxx2.c | 13 +++----- drivers/flash/flash_sam.c | 32 +++++++++++-------- drivers/flash/flash_stm32_qspi.c | 52 ++++++++++++++----------------- 5 files changed, 81 insertions(+), 76 deletions(-) diff --git a/drivers/flash/flash_esp32.c b/drivers/flash/flash_esp32.c index fad909ea5c7..8f5731f3497 100644 --- a/drivers/flash/flash_esp32.c +++ b/drivers/flash/flash_esp32.c @@ -66,9 +66,6 @@ static const struct flash_parameters flash_esp32_parameters = { .erase_value = 0xff, }; -#define DEV_DATA(dev) ((struct flash_esp32_dev_data *const)(dev)->data) -#define DEV_CFG(dev) ((const struct flash_esp32_dev_config *const)(dev)->config) - #if !defined(CONFIG_SOC_ESP32C3) #define SPI1_EXTRA_DUMMIES (g_rom_spiflash_dummy_len_plus[1]) #else @@ -101,12 +98,16 @@ static esp_rom_spiflash_chip_t esp_flashchip_info; static inline void flash_esp32_sem_take(const struct device *dev) { - k_sem_take(&DEV_DATA(dev)->sem, K_FOREVER); + struct flash_esp32_dev_data *data = dev->data; + + k_sem_take(&data->sem, K_FOREVER); } static inline void flash_esp32_sem_give(const struct device *dev) { - k_sem_give(&DEV_DATA(dev)->sem); + struct flash_esp32_dev_data *data = dev->data; + + k_sem_give(&data->sem); } static inline int flash_esp32_wait_cmd_done(const spi_dev_t *hw) @@ -231,7 +232,8 @@ static void IRAM_ATTR flash_esp32_flush_cache(size_t start_addr, size_t length) static int set_read_options(const struct device *dev) { - spi_dev_t *hw = DEV_CFG(dev)->controller; + const struct flash_esp32_dev_config *config = dev->config; + spi_dev_t *hw = config->controller; uint32_t dummy_len = 0; uint32_t addr_len; uint8_t read_cmd; @@ -285,7 +287,8 @@ static int set_read_options(const struct device *dev) static int read_once(const struct device *dev, void *buffer, uint32_t address, uint32_t read_len) { - spi_dev_t *hw = DEV_CFG(dev)->controller; + const struct flash_esp32_dev_config *config = dev->config; + spi_dev_t *hw = config->controller; int bitlen = spi_flash_ll_get_addr_bitlen(hw); spi_flash_ll_set_usr_address(hw, address << (bitlen - 24), bitlen); @@ -328,7 +331,7 @@ static int read_data(const struct device *dev, uint8_t *buffer, uint32_t address static int flash_esp32_read(const struct device *dev, off_t address, void *buffer, size_t length) { - const struct flash_esp32_dev_config *const cfg = DEV_CFG(dev); + const struct flash_esp32_dev_config *const cfg = dev->config; const spi_flash_guard_funcs_t *guard = spi_flash_guard_get(); uint32_t chip_size = cfg->chip->chip_size; @@ -408,7 +411,8 @@ out: static inline void set_write_options(const struct device *dev) { - spi_dev_t *hw = DEV_CFG(dev)->controller; + const struct flash_esp32_dev_config *config = dev->config; + spi_dev_t *hw = config->controller; spi_flash_ll_set_dummy(hw, 0); /* only single line flash write is currently supported */ @@ -417,7 +421,7 @@ static inline void set_write_options(const struct device *dev) static int read_status(const struct device *dev, uint32_t *status) { - const struct flash_esp32_dev_config *const cfg = DEV_CFG(dev); + const struct flash_esp32_dev_config *const cfg = dev->config; uint32_t status_value = ESP_ROM_SPIFLASH_BUSY_FLAG; if (SPI1_EXTRA_DUMMIES == 0) { @@ -462,7 +466,7 @@ static inline bool host_idle(spi_dev_t *hw) static int wait_idle(const struct device *dev) { - const struct flash_esp32_dev_config *const cfg = DEV_CFG(dev); + const struct flash_esp32_dev_config *const cfg = dev->config; uint32_t status; int64_t timeout = k_uptime_get() + SPI_TIMEOUT_MSEC; @@ -482,7 +486,7 @@ static int wait_idle(const struct device *dev) static int write_protect(const struct device *dev, bool write_protect) { - const struct flash_esp32_dev_config *const cfg = DEV_CFG(dev); + const struct flash_esp32_dev_config *const cfg = dev->config; wait_idle(dev); @@ -508,8 +512,9 @@ static int write_protect(const struct device *dev, bool write_protect) static int program_page(const struct device *dev, uint32_t spi_addr, uint32_t *addr_source, int32_t byte_length) { - const uint32_t page_size = DEV_CFG(dev)->chip->page_size; - spi_dev_t *hw = DEV_CFG(dev)->controller; + const struct flash_esp32_dev_config *config = dev->config; + const uint32_t page_size = config->chip->page_size; + spi_dev_t *hw = config->controller; /* check 4byte alignment */ if ((byte_length & 0x3) != 0) { @@ -567,9 +572,9 @@ static int flash_esp32_write_inner(const struct device *dev, const uint32_t *buffer, size_t length) { - - const uint32_t page_size = DEV_CFG(dev)->chip->page_size; - const uint32_t chip_size = DEV_CFG(dev)->chip->chip_size; + const struct flash_esp32_dev_config *config = dev->config; + const uint32_t page_size = config->chip->page_size; + const uint32_t chip_size = config->chip->chip_size; uint32_t prog_len, prog_num; set_write_options(dev); @@ -617,7 +622,8 @@ static int flash_esp32_write(const struct device *dev, const void *buffer, size_t length) { - const uint32_t chip_size = DEV_CFG(dev)->chip->chip_size; + const struct flash_esp32_dev_config *config = dev->config; + const uint32_t chip_size = config->chip->chip_size; const spi_flash_guard_funcs_t *guard = spi_flash_guard_get(); int rc = 0; @@ -703,7 +709,8 @@ out: static int erase_sector(const struct device *dev, uint32_t start_addr) { - spi_dev_t *hw = DEV_CFG(dev)->controller; + const struct flash_esp32_dev_config *config = dev->config; + spi_dev_t *hw = config->controller; int rc = write_protect(dev, false); if (rc == 0) { @@ -731,8 +738,9 @@ static int erase_sector(const struct device *dev, uint32_t start_addr) static int flash_esp32_erase(const struct device *dev, off_t start, size_t len) { - uint32_t sector_size = DEV_CFG(dev)->chip->sector_size; - uint32_t chip_size = DEV_CFG(dev)->chip->chip_size; + const struct flash_esp32_dev_config *config = dev->config; + uint32_t sector_size = config->chip->sector_size; + uint32_t chip_size = config->chip->chip_size; const spi_flash_guard_funcs_t *guard = spi_flash_guard_get(); int rc = 0; @@ -800,7 +808,7 @@ flash_esp32_get_parameters(const struct device *dev) static int flash_esp32_init(const struct device *dev) { - struct flash_esp32_dev_data *const dev_data = DEV_DATA(dev); + struct flash_esp32_dev_data *const dev_data = dev->data; #if defined(CONFIG_SOC_ESP32C3) spiflash_legacy_data_t *legacy_data = rom_spiflash_legacy_data; diff --git a/drivers/flash/flash_gecko.c b/drivers/flash/flash_gecko.c index ad947592afb..5630664c07d 100644 --- a/drivers/flash/flash_gecko.c +++ b/drivers/flash/flash_gecko.c @@ -31,8 +31,6 @@ static const struct flash_parameters flash_gecko_parameters = { }; #define DEV_NAME(dev) ((dev)->name) -#define DEV_DATA(dev) \ - ((struct flash_gecko_data *const)(dev)->data) static bool write_range_is_valid(off_t offset, uint32_t size); static bool read_range_is_valid(off_t offset, uint32_t size); @@ -59,7 +57,7 @@ static int flash_gecko_read(const struct device *dev, off_t offset, static int flash_gecko_write(const struct device *dev, off_t offset, const void *data, size_t size) { - struct flash_gecko_data *const dev_data = DEV_DATA(dev); + struct flash_gecko_data *const dev_data = dev->data; MSC_Status_TypeDef msc_ret; void *address; int ret = 0; @@ -90,7 +88,7 @@ static int flash_gecko_write(const struct device *dev, off_t offset, static int flash_gecko_erase(const struct device *dev, off_t offset, size_t size) { - struct flash_gecko_data *const dev_data = DEV_DATA(dev); + struct flash_gecko_data *const dev_data = dev->data; int ret; if (!read_range_is_valid(offset, size)) { @@ -197,7 +195,7 @@ flash_gecko_get_parameters(const struct device *dev) static int flash_gecko_init(const struct device *dev) { - struct flash_gecko_data *const dev_data = DEV_DATA(dev); + struct flash_gecko_data *const dev_data = dev->data; k_sem_init(&dev_data->mutex, 1, 1); diff --git a/drivers/flash/flash_ite_it8xxx2.c b/drivers/flash/flash_ite_it8xxx2.c index af220190230..492cd1265b9 100644 --- a/drivers/flash/flash_ite_it8xxx2.c +++ b/drivers/flash/flash_ite_it8xxx2.c @@ -32,9 +32,6 @@ extern char _ram_code_start; #define FLASH_IT8XXX2_REG_BASE \ ((struct flash_it8xxx2_regs *)DT_INST_REG_ADDR(0)) -#define DEV_DATA(dev) \ - ((struct flash_it8xxx2_dev_data *const)(dev)->data) - struct flash_it8xxx2_dev_data { struct k_sem sem; int all_protected; @@ -411,7 +408,7 @@ static int __ram_code flash_it8xxx2_read(const struct device *dev, off_t offset, static int __ram_code flash_it8xxx2_write(const struct device *dev, off_t offset, const void *src_data, size_t len) { - struct flash_it8xxx2_dev_data *data = DEV_DATA(dev); + struct flash_it8xxx2_dev_data *data = dev->data; int ret = -EINVAL; unsigned int key; @@ -457,7 +454,7 @@ static int __ram_code flash_it8xxx2_write(const struct device *dev, off_t offset static int __ram_code flash_it8xxx2_erase(const struct device *dev, off_t offset, size_t len) { - struct flash_it8xxx2_dev_data *data = DEV_DATA(dev); + struct flash_it8xxx2_dev_data *data = dev->data; int v_size = len, v_addr = offset, ret = -EINVAL; unsigned int key; @@ -507,7 +504,7 @@ static int __ram_code flash_it8xxx2_erase(const struct device *dev, static int flash_it8xxx2_write_protection(const struct device *dev, bool enable) { - struct flash_it8xxx2_dev_data *data = DEV_DATA(dev); + struct flash_it8xxx2_dev_data *data = dev->data; if (enable) { /* Protect the entire flash */ @@ -538,7 +535,7 @@ flash_it8xxx2_get_parameters(const struct device *dev) static void flash_code_static_cache(const struct device *dev) { struct flash_it8xxx2_regs *const flash_regs = FLASH_IT8XXX2_REG_BASE; - struct flash_it8xxx2_dev_data *data = DEV_DATA(dev); + struct flash_it8xxx2_dev_data *data = dev->data; unsigned int key; /* Make sure no interrupt while enable static cache */ @@ -574,7 +571,7 @@ static void flash_code_static_cache(const struct device *dev) static int flash_it8xxx2_init(const struct device *dev) { struct flash_it8xxx2_regs *const flash_regs = FLASH_IT8XXX2_REG_BASE; - struct flash_it8xxx2_dev_data *data = DEV_DATA(dev); + struct flash_it8xxx2_dev_data *data = dev->data; /* By default, select internal flash for indirect fast read. */ flash_regs->SMFI_ECINDAR3 = EC_INDIRECT_READ_INTERNAL_FLASH; diff --git a/drivers/flash/flash_sam.c b/drivers/flash/flash_sam.c index 6b857eff098..f008b3515f8 100644 --- a/drivers/flash/flash_sam.c +++ b/drivers/flash/flash_sam.c @@ -51,22 +51,20 @@ static const struct flash_parameters flash_sam_parameters = { .erase_value = 0xff, }; -#define DEV_CFG(dev) \ - ((const struct flash_sam_dev_cfg *const)(dev)->config) - -#define DEV_DATA(dev) \ - ((struct flash_sam_dev_data *const)(dev)->data) - static int flash_sam_write_protection(const struct device *dev, bool enable); static inline void flash_sam_sem_take(const struct device *dev) { - k_sem_take(&DEV_DATA(dev)->sem, K_FOREVER); + struct flash_sam_dev_data *data = dev->data; + + k_sem_take(&data->sem, K_FOREVER); } static inline void flash_sam_sem_give(const struct device *dev) { - k_sem_give(&DEV_DATA(dev)->sem); + struct flash_sam_dev_data *data = dev->data; + + k_sem_give(&data->sem); } /* Check that the offset is within the flash */ @@ -96,7 +94,9 @@ static off_t flash_sam_get_page(off_t offset) */ static int flash_sam_wait_ready(const struct device *dev) { - Efc *const efc = DEV_CFG(dev)->regs; + const struct flash_sam_dev_cfg *config = dev->config; + + Efc *const efc = config->regs; uint64_t timeout_time = k_uptime_get() + SAM_FLASH_TIMEOUT_MS; uint32_t fsr; @@ -135,7 +135,9 @@ static int flash_sam_wait_ready(const struct device *dev) static int flash_sam_write_page(const struct device *dev, off_t offset, const void *data, size_t len) { - Efc *const efc = DEV_CFG(dev)->regs; + const struct flash_sam_dev_cfg *config = dev->config; + + Efc *const efc = config->regs; const uint32_t *src = data; uint32_t *dst = (uint32_t *)((uint8_t *)CONFIG_FLASH_BASE_ADDRESS + offset); @@ -242,7 +244,9 @@ static int flash_sam_read(const struct device *dev, off_t offset, void *data, /* Erase a single 8KiB block */ static int flash_sam_erase_block(const struct device *dev, off_t offset) { - Efc *const efc = DEV_CFG(dev)->regs; + const struct flash_sam_dev_cfg *config = dev->config; + + Efc *const efc = config->regs; LOG_DBG("offset = 0x%lx", (long)offset); @@ -314,7 +318,9 @@ static int flash_sam_erase(const struct device *dev, off_t offset, size_t len) /* Enable or disable the write protection */ static int flash_sam_write_protection(const struct device *dev, bool enable) { - Efc *const efc = DEV_CFG(dev)->regs; + const struct flash_sam_dev_cfg *config = dev->config; + + Efc *const efc = config->regs; int rc = 0; if (enable) { @@ -360,7 +366,7 @@ flash_sam_get_parameters(const struct device *dev) static int flash_sam_init(const struct device *dev) { - struct flash_sam_dev_data *const data = DEV_DATA(dev); + struct flash_sam_dev_data *const data = dev->data; k_sem_init(&data->sem, 1, 1); diff --git a/drivers/flash/flash_stm32_qspi.c b/drivers/flash/flash_stm32_qspi.c index a986f7894b7..768699e2bc0 100644 --- a/drivers/flash/flash_stm32_qspi.c +++ b/drivers/flash/flash_stm32_qspi.c @@ -106,21 +106,17 @@ struct flash_stm32_qspi_data { }; #define DEV_NAME(dev) ((dev)->name) -#define DEV_CFG(dev) \ - (const struct flash_stm32_qspi_config * const)(dev->config) -#define DEV_DATA(dev) \ - (struct flash_stm32_qspi_data * const)(dev->data) static inline void qspi_lock_thread(const struct device *dev) { - struct flash_stm32_qspi_data *dev_data = DEV_DATA(dev); + struct flash_stm32_qspi_data *dev_data = dev->data; k_sem_take(&dev_data->sem, K_FOREVER); } static inline void qspi_unlock_thread(const struct device *dev) { - struct flash_stm32_qspi_data *dev_data = DEV_DATA(dev); + struct flash_stm32_qspi_data *dev_data = dev->data; k_sem_give(&dev_data->sem); } @@ -128,7 +124,7 @@ static inline void qspi_unlock_thread(const struct device *dev) static inline void qspi_set_address_size(const struct device *dev, QSPI_CommandTypeDef *cmd) { - struct flash_stm32_qspi_data *dev_data = DEV_DATA(dev); + struct flash_stm32_qspi_data *dev_data = dev->data; if (dev_data->flag_access_32bit) { cmd->AddressSize = QSPI_ADDRESS_32_BITS; @@ -141,7 +137,7 @@ static inline void qspi_set_address_size(const struct device *dev, static inline void qspi_prepare_quad_read(const struct device *dev, QSPI_CommandTypeDef *cmd) { - struct flash_stm32_qspi_data *dev_data = DEV_DATA(dev); + struct flash_stm32_qspi_data *dev_data = dev->data; if (IS_ENABLED(STM32_QSPI_USE_QUAD_IO) && dev_data->flag_quad_io_en) { cmd->Instruction = dev_data->qspi_read_cmd; @@ -154,7 +150,7 @@ static inline void qspi_prepare_quad_read(const struct device *dev, static inline void qspi_prepare_quad_program(const struct device *dev, QSPI_CommandTypeDef *cmd) { - struct flash_stm32_qspi_data *dev_data = DEV_DATA(dev); + struct flash_stm32_qspi_data *dev_data = dev->data; /* * There is no info about PP/4PP command in the SFDP tables, * hence it has been assumed that NOR flash memory supporting @@ -177,8 +173,8 @@ static inline void qspi_prepare_quad_program(const struct device *dev, */ static int qspi_send_cmd(const struct device *dev, QSPI_CommandTypeDef *cmd) { - const struct flash_stm32_qspi_config *dev_cfg = DEV_CFG(dev); - struct flash_stm32_qspi_data *dev_data = DEV_DATA(dev); + const struct flash_stm32_qspi_config *dev_cfg = dev->config; + struct flash_stm32_qspi_data *dev_data = dev->data; HAL_StatusTypeDef hal_ret; ARG_UNUSED(dev_cfg); @@ -205,8 +201,8 @@ static int qspi_send_cmd(const struct device *dev, QSPI_CommandTypeDef *cmd) static int qspi_read_access(const struct device *dev, QSPI_CommandTypeDef *cmd, uint8_t *data, size_t size) { - const struct flash_stm32_qspi_config *dev_cfg = DEV_CFG(dev); - struct flash_stm32_qspi_data *dev_data = DEV_DATA(dev); + const struct flash_stm32_qspi_config *dev_cfg = dev->config; + struct flash_stm32_qspi_data *dev_data = dev->data; HAL_StatusTypeDef hal_ret; ARG_UNUSED(dev_cfg); @@ -242,8 +238,8 @@ static int qspi_read_access(const struct device *dev, QSPI_CommandTypeDef *cmd, static int qspi_write_access(const struct device *dev, QSPI_CommandTypeDef *cmd, const uint8_t *data, size_t size) { - const struct flash_stm32_qspi_config *dev_cfg = DEV_CFG(dev); - struct flash_stm32_qspi_data *dev_data = DEV_DATA(dev); + const struct flash_stm32_qspi_config *dev_cfg = dev->config; + struct flash_stm32_qspi_data *dev_data = dev->data; HAL_StatusTypeDef hal_ret; ARG_UNUSED(dev_cfg); @@ -298,7 +294,7 @@ static int qspi_read_sfdp(const struct device *dev, off_t addr, uint8_t *data, static bool qspi_address_is_valid(const struct device *dev, off_t addr, size_t size) { - const struct flash_stm32_qspi_config *dev_cfg = DEV_CFG(dev); + const struct flash_stm32_qspi_config *dev_cfg = dev->config; size_t flash_size = dev_cfg->flash_size; return (addr >= 0) && ((uint64_t)addr + (uint64_t)size <= flash_size); @@ -423,8 +419,8 @@ static int flash_stm32_qspi_write(const struct device *dev, off_t addr, static int flash_stm32_qspi_erase(const struct device *dev, off_t addr, size_t size) { - const struct flash_stm32_qspi_config *dev_cfg = DEV_CFG(dev); - struct flash_stm32_qspi_data *dev_data = DEV_DATA(dev); + const struct flash_stm32_qspi_config *dev_cfg = dev->config; + struct flash_stm32_qspi_data *dev_data = dev->data; int ret = 0; if (!qspi_address_is_valid(dev, addr, size)) { @@ -509,7 +505,7 @@ flash_stm32_qspi_get_parameters(const struct device *dev) static void flash_stm32_qspi_isr(const struct device *dev) { - struct flash_stm32_qspi_data *dev_data = DEV_DATA(dev); + struct flash_stm32_qspi_data *dev_data = dev->data; HAL_QSPI_IRQHandler(&dev_data->hqspi); } @@ -614,7 +610,7 @@ static void flash_stm32_qspi_pages_layout(const struct device *dev, const struct flash_pages_layout **layout, size_t *layout_size) { - struct flash_stm32_qspi_data *dev_data = DEV_DATA(dev); + struct flash_stm32_qspi_data *dev_data = dev->data; *layout = &dev_data->layout; *layout_size = 1; @@ -634,8 +630,8 @@ static const struct flash_driver_api flash_stm32_qspi_driver_api = { #if defined(CONFIG_FLASH_PAGE_LAYOUT) static int setup_pages_layout(const struct device *dev) { - const struct flash_stm32_qspi_config *dev_cfg = DEV_CFG(dev); - struct flash_stm32_qspi_data *data = DEV_DATA(dev); + const struct flash_stm32_qspi_config *dev_cfg = dev->config; + struct flash_stm32_qspi_data *data = dev->data; const size_t flash_size = dev_cfg->flash_size; uint32_t layout_page_size = data->page_size; uint8_t exp = 0; @@ -760,7 +756,7 @@ static int qspi_write_enable(const struct device *dev) static int qspi_program_quad_io(const struct device *dev) { - struct flash_stm32_qspi_data *data = DEV_DATA(dev); + struct flash_stm32_qspi_data *data = dev->data; uint8_t reg; int ret; @@ -813,8 +809,8 @@ static int spi_nor_process_bfp(const struct device *dev, const struct jesd216_param_header *php, const struct jesd216_bfp *bfp) { - const struct flash_stm32_qspi_config *dev_cfg = DEV_CFG(dev); - struct flash_stm32_qspi_data *data = DEV_DATA(dev); + const struct flash_stm32_qspi_config *dev_cfg = dev->config; + struct flash_stm32_qspi_data *data = dev->data; struct jesd216_erase_type *etp = data->erase_types; const size_t flash_size = jesd216_bfp_density(bfp) / 8U; uint8_t addr_mode; @@ -902,7 +898,7 @@ static int spi_nor_process_bfp(const struct device *dev, #if STM32_QSPI_RESET_GPIO static void flash_stm32_qspi_gpio_reset(const struct device *dev) { - const struct flash_stm32_qspi_config *dev_cfg = DEV_CFG(dev); + const struct flash_stm32_qspi_config *dev_cfg = dev->config; /* Generate RESETn pulse for the flash memory */ gpio_pin_configure_dt(&dev_cfg->reset, GPIO_OUTPUT_ACTIVE); @@ -913,8 +909,8 @@ static void flash_stm32_qspi_gpio_reset(const struct device *dev) static int flash_stm32_qspi_init(const struct device *dev) { - const struct flash_stm32_qspi_config *dev_cfg = DEV_CFG(dev); - struct flash_stm32_qspi_data *dev_data = DEV_DATA(dev); + const struct flash_stm32_qspi_config *dev_cfg = dev->config; + struct flash_stm32_qspi_data *dev_data = dev->data; uint32_t ahb_clock_freq; uint32_t prescaler = 0; int ret;