ext: stm32cube: stm32f7xx: shift I2SR field in PLLI2SCFGR register

The I2SR field should be shifted by RCC_PLLI2SCFGR_PLLI2SR_Pos when the
PLLI2SCFGR register is read or written. Without this patch the PLLI2S
configuration is not done properly (R and M params are badly set) and
the PLLI2S generates bad clock waveform.

ST Bug tracker ID: 50108

Signed-off-by: Armando Visconti <armando.visconti@st.com>
This commit is contained in:
Armando Visconti 2018-07-06 10:06:48 +02:00 committed by Kumar Gala
commit 9a8932024a
2 changed files with 9 additions and 2 deletions

View file

@ -47,3 +47,10 @@ Patch List:
Impacted files:
drivers/include/stm32f7xx_ll_spi.h
ST Bug tracker ID: 13359
*Add correct shifting to I2SR field in PLLI2SCFGR register
The I2SR field should be shifted by RCC_PLLI2SCFGR_PLLI2SR_Pos when the PLLI2SCFGR register
is read or written.
Impacted files:
drivers/include/stm32f7xx_ll_rcc.h
ST Bug tracker ID: 50108

View file

@ -4039,7 +4039,7 @@ __STATIC_INLINE void LL_RCC_PLLI2S_ConfigDomain_SPDIFRX(uint32_t Source, uint32_
__STATIC_INLINE void LL_RCC_PLLI2S_ConfigDomain_I2S(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR)
{
MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM, Source | PLLM);
MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN | RCC_PLLI2SCFGR_PLLI2SR, PLLN << RCC_PLLI2SCFGR_PLLI2SN_Pos | PLLR);
MODIFY_REG(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN | RCC_PLLI2SCFGR_PLLI2SR, PLLN << RCC_PLLI2SCFGR_PLLI2SN_Pos | PLLR << RCC_PLLI2SCFGR_PLLI2SR_Pos);
}
/**
@ -4090,7 +4090,7 @@ __STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetQ(void)
*/
__STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetR(void)
{
return (uint32_t)(READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SR));
return (uint32_t)(READ_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
}
#if defined(RCC_PLLI2SCFGR_PLLI2SP)