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tests/drivers/clock_control: stm32f1: HSI clock is 8MHz

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On STM32F series, HSI clock is 8MHz, fix test using 16MHz
and a test name.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2022-04-01 09:16:50 +02:00 • committed by Carles Cufí
commit fa85670f1b
1 changed files with 2 additions and 2 deletions
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4
tests/drivers/clock_control/stm32_clock_configuration/stm32_common/testcase.yaml
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@ -92,12 +92,12 @@ tests:
extra_args: DTC_OVERLAY_FILE="boards/clear_f0_f1_f3_clocks.overlay;boards/f0_f3_pll_32_hse_8.overlay"
platform_allow: nucleo_f091rc stm32f3_disco
drivers.stm32_clock_configuration.common.f1.sysclksrc_hsi_8:
extra_args: DTC_OVERLAY_FILE="boards/clear_f0_f1_f3_clocks.overlay;boards/hsi_16.overlay"
extra_args: DTC_OVERLAY_FILE="boards/clear_f0_f1_f3_clocks.overlay;boards/hsi_8.overlay"
platform_allow: nucleo_f103rb
drivers.stm32_clock_configuration.common.f1.sysclksrc_hse_8:
extra_args: DTC_OVERLAY_FILE="boards/clear_f0_f1_f3_clocks.overlay;boards/hse_8.overlay"
platform_allow: nucleo_f103rb
drivers.stm32_clock_configuration.common.f1.sysclksrc_pll_64_hsi_16:
drivers.stm32_clock_configuration.common.f1.sysclksrc_pll_64_hsi_8:
extra_args: DTC_OVERLAY_FILE="boards/clear_f0_f1_f3_clocks.overlay;boards/f1_pll_64_hsi_8.overlay"
platform_allow: nucleo_f103rb
drivers.stm32_clock_configuration.common.f1.sysclksrc_pll_64_hse_8: