arch/x86: (Intel64) use per-CPU parameter struct for CPU startup
A new 'struct x86_cpuboot' is created as well as an instance called 'x86_cpuboot[]' which contains per-CPU boot data (initial stack, entry function/arg, selectors, etc.). The locore now consults this table to set up per-CPU registers, etc. during early boot. Also, rename tss.c to cpu.c as its scope is growing. Signed-off-by: Charles E. Youse <charles.youse@intel.com>
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5 changed files with 46 additions and 10 deletions
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@ -10,7 +10,7 @@ set_property(SOURCE intel64/locore.S PROPERTY LANGUAGE ASM)
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zephyr_library_sources(
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intel64/locore.S
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intel64/tss.c
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intel64/cpu.c
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intel64/irq.c
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intel64/thread.c
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intel64/fatal.c
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@ -7,6 +7,9 @@
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#include <kernel_arch_data.h>
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#include <kernel_arch_func.h>
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#include <kernel_structs.h>
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#include <arch/x86/multiboot.h>
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extern FUNC_NORETURN void z_x86_prep_c(struct multiboot_info *);
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extern u8_t _exception_stack[];
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@ -15,6 +18,14 @@ struct x86_tss64 tss0 = {
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.ist1 = (u64_t) _interrupt_stack + CONFIG_ISR_STACK_SIZE,
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.ist7 = (u64_t) _exception_stack + CONFIG_EXCEPTION_STACK_SIZE,
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.iomapb = 0xFFFF, /* no I/O access bitmap */
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.cpu = &(_kernel.cpus[0])
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};
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struct x86_cpuboot x86_cpuboot[] = {
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{
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.tr = X86_KERNEL_CPU0_TR,
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.gs = X86_KERNEL_CPU0_GS,
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.sp = (u64_t) _interrupt_stack + CONFIG_ISR_STACK_SIZE,
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.fn = z_x86_prep_c
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}
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};
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@ -39,6 +39,9 @@ __start:
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movl $__bss_num_dwords, %ecx
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rep stosl
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movl $x86_cpuboot, %ebp /* BSP is always logical CPU id 0 */
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movl %ebx, __x86_cpuboot_t_arg_OFFSET(%ebp) /* multiboot info */
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/*
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* transition to long mode, reload the segment registers,
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* and configure per-CPU stuff: GS, task register, stack.
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@ -71,12 +74,12 @@ __start:
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movw %ax, %ss
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movw %ax, %fs
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movl $X86_KERNEL_CPU0_TR, %eax
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movw __x86_cpuboot_t_tr_OFFSET(%rbp), %ax
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ltr %ax
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movl $X86_KERNEL_CPU0_GS, %eax
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movw __x86_cpuboot_t_gs_OFFSET(%rbp), %ax
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movw %ax, %gs
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movl $(_interrupt_stack + CONFIG_ISR_STACK_SIZE), %esp
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movq __x86_cpuboot_t_sp_OFFSET(%rbp), %rsp
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/*
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* finally, complete environment for the C runtime and go.
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@ -86,7 +89,8 @@ __start:
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#ifdef CONFIG_INIT_STACKS
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movq $0xAAAAAAAAAAAAAAAA, %rax
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movq $_interrupt_stack, %rdi
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movq %rsp, %rdi
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subq $CONFIG_ISR_STACK_SIZE, %rdi
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movq $(CONFIG_ISR_STACK_SIZE >> 3), %rcx
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rep stosq
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#endif
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@ -100,8 +104,8 @@ __start:
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/* don't replace CALL with JMP; honor the ABI stack alignment! */
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movl %ebx, %edi /* multiboot pointer (or NULL) */
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call z_x86_prep_c /* enter kernel; never returns */
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movq __x86_cpuboot_t_arg_OFFSET(%rbp), %rdi
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call *__x86_cpuboot_t_fn_OFFSET(%rbp) /* enter kernel; never return */
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/*
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* void x86_sse_init(struct k_thread *thread);
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@ -147,13 +151,13 @@ z_arch_switch:
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movq %r14, _thread_offset_to_r14(%rsi)
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movq %r15, _thread_offset_to_r15(%rsi)
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movq $(_interrupt_stack + CONFIG_ISR_STACK_SIZE), %rsp
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movq %gs:__x86_tss64_t_ist1_OFFSET, %rsp
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/* fall through to __resume */
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/*
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* Entry:
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* RSP = top of _interrupt_stack
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* RSP = top of CPU interrupt stack
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* RDI = (struct k_thread *) thread to resume
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*/
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@ -31,3 +31,10 @@ GEN_OFFSET_SYM(_thread_arch_t, sse);
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GEN_OFFSET_SYM(x86_tss64_t, ist1);
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GEN_OFFSET_SYM(x86_tss64_t, cpu);
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GEN_ABSOLUTE_SYM(__X86_TSS64_SIZEOF, sizeof(x86_tss64_t));
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GEN_OFFSET_SYM(x86_cpuboot_t, tr);
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GEN_OFFSET_SYM(x86_cpuboot_t, gs);
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GEN_OFFSET_SYM(x86_cpuboot_t, sp);
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GEN_OFFSET_SYM(x86_cpuboot_t, fn);
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GEN_OFFSET_SYM(x86_cpuboot_t, arg);
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GEN_ABSOLUTE_SYM(__X86_CPUBOOT_SIZEOF, sizeof(x86_cpuboot_t));
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@ -72,6 +72,20 @@ struct x86_tss64 {
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typedef struct x86_tss64 x86_tss64_t;
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/*
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* Per-CPU bootstrapping parameters. See locore.S and cpu.c.
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*/
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struct x86_cpuboot {
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u16_t tr; /* selector for task register */
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u16_t gs; /* selector for GS */
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u64_t sp; /* initial stack pointer */
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void *fn; /* kernel entry function */
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void *arg; /* argument for above function */
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};
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typedef struct x86_cpuboot x86_cpuboot_t;
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#endif /* _ASMLANGUAGE */
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#endif /* ZEPHYR_ARCH_X86_INCLUDE_INTEL64_KERNEL_ARCH_DATA_H_ */
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