soc: espressif: esp32c3: simple boot support

Add simplistic booting method which allows to run
applications without the 2nd stage bootloader.

- introduce memory layout header file
- update and optimize default and mcuboot linker scripts
- remove building multiple binaries during the application build

Signed-off-by: Marek Matej <marek.matej@espressif.com>

soc/espressif/esp32c3/CMakeLists.txt

@@ -13,6 +13,33 @@ zephyr_include_directories(.)
 zephyr_library_sources_ifdef(CONFIG_PM power.c)
 zephyr_library_sources_ifdef(CONFIG_POWEROFF poweroff.c)
 
+# get flash size to use in esptool as string
+math(EXPR esptoolpy_flashsize "${CONFIG_FLASH_SIZE} / 0x100000")
+
+if(NOT CONFIG_BOOTLOADER_MCUBOOT)
+
+  if(CONFIG_BUILD_OUTPUT_BIN)
+    # make ESP ROM loader compatible image
+    message("ESP-IDF path: ${ESP_IDF_PATH}")
+
+    set(ESPTOOL_PY ${ESP_IDF_PATH}/tools/esptool_py/esptool.py)
+    message("esptool path: ${ESPTOOL_PY}")
+
+    set(ELF2IMAGE_ARG "")
+    if(NOT CONFIG_MCUBOOT)
+      set(ELF2IMAGE_ARG "--ram-only-header")
+    endif()
+
+    set_property(GLOBAL APPEND PROPERTY extra_post_build_commands
+      COMMAND ${PYTHON_EXECUTABLE} ${ESPTOOL_PY}
+      ARGS --chip esp32c3 elf2image ${ELF2IMAGE_ARG}
+      --flash_mode dio --flash_freq 40m --flash_size ${esptoolpy_flashsize}MB
+      -o ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.bin
+      ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.elf)
+  endif()
+
+endif()
+
 # get code-partition slot0 address
 dt_nodelabel(dts_partition_path NODELABEL "slot0_partition")
 dt_reg_addr(img_0_off PATH ${dts_partition_path})
@@ -21,51 +48,25 @@ dt_reg_addr(img_0_off PATH ${dts_partition_path})
 dt_nodelabel(dts_partition_path NODELABEL "boot_partition")
 dt_reg_addr(boot_off PATH ${dts_partition_path})
 
-# get flash size to use in esptool as string
+if(CONFIG_ESP_SIMPLE_BOOT)
-math(EXPR esptoolpy_flashsize "${CONFIG_FLASH_SIZE} / 0x100000")
+  board_finalize_runner_args(esp32 "--esp-app-address=${boot_off}")
-
+else()
-if(CONFIG_BOOTLOADER_ESP_IDF)
+  board_finalize_runner_args(esp32 "--esp-app-address=${img_0_off}")
-
-  set(bootloader_dir "${ZEPHYR_HAL_ESPRESSIF_MODULE_DIR}/zephyr/blobs/lib/${CONFIG_SOC_SERIES}")
-
-  if(EXISTS "${bootloader_dir}/bootloader-${CONFIG_SOC_SERIES}.bin")
-    file(COPY "${bootloader_dir}/bootloader-${CONFIG_SOC_SERIES}.bin" DESTINATION ${CMAKE_BINARY_DIR})
-    file(RENAME "${CMAKE_BINARY_DIR}/bootloader-${CONFIG_SOC_SERIES}.bin" "${CMAKE_BINARY_DIR}/bootloader.bin")
-  endif()
-
-  if(EXISTS "${bootloader_dir}/partition-table-${CONFIG_SOC_SERIES}.bin")
-    file(COPY "${bootloader_dir}/partition-table-${CONFIG_SOC_SERIES}.bin" DESTINATION ${CMAKE_BINARY_DIR})
-    file(RENAME "${CMAKE_BINARY_DIR}/partition-table-${CONFIG_SOC_SERIES}.bin" "${CMAKE_BINARY_DIR}/partition-table.bin")
-  endif()
-
-  board_finalize_runner_args(esp32 "--esp-flash-bootloader=${CMAKE_BINARY_DIR}/bootloader.bin")
-
-  board_finalize_runner_args(esp32 "--esp-flash-partition_table=${CMAKE_BINARY_DIR}/partition-table.bin")
-
-  board_finalize_runner_args(esp32 "--esp-partition-table-address=0x8000")
-
 endif()
 
-if(CONFIG_MCUBOOT OR CONFIG_BOOTLOADER_ESP_IDF)
+if(CONFIG_MCUBOOT)
-
+    # search from cross references between bootloader sections
-  if(CONFIG_BUILD_OUTPUT_BIN)
+    message("check_callgraph using: ${ESP_IDF_PATH}/tools/ci/check_callgraph.py")
     set_property(GLOBAL APPEND PROPERTY extra_post_build_commands
-      COMMAND ${PYTHON_EXECUTABLE} ${ESP_IDF_PATH}/tools/esptool_py/esptool.py
+      COMMAND
-      ARGS --chip esp32c3 elf2image --flash_mode dio --flash_freq 40m --flash_size ${esptoolpy_flashsize}MB
+        ${PYTHON_EXECUTABLE} ${ESP_IDF_PATH}/tools/ci/check_callgraph.py
-      -o ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.bin
+      ARGS
-      ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.elf)
+        --rtl-dirs ${CMAKE_BINARY_DIR}/zephyr
-  endif()
+	--elf-file ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.elf
-
+        find-refs --from-section=.iram0.iram_loader --to-section=.iram0.text
-  if(CONFIG_MCUBOOT)
+        --exit-code)
-    board_finalize_runner_args(esp32 "--esp-flash-bootloader=${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.bin")
-  endif()
-
 endif()
 
-board_finalize_runner_args(esp32 "--esp-boot-address=${boot_off}")
-
-board_finalize_runner_args(esp32 "--esp-app-address=${img_0_off}")
-
 if(CONFIG_MCUBOOT)
   set(SOC_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/mcuboot.ld CACHE INTERNAL "")
 else()

soc/espressif/esp32c3/mcuboot.ld

@@ -1,20 +1,15 @@
 /*
- * Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
+ * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
  * SPDX-License-Identifier: Apache-2.0
  */
 
-/**
- * @file
- * @brief Linker command/script file
- *
- * Linker script for the esp32c3 platform.
- */
-
 #include <zephyr/devicetree.h>
 #include <zephyr/linker/sections.h>
 #include <zephyr/linker/linker-defs.h>
 #include <zephyr/linker/linker-tool.h>
 
+#include "memory.h"
+
 #ifdef CONFIG_XIP
 #error "ESP32C3 bootloader cannot use XIP"
 #endif /* CONFIG_XIP */
@@ -24,20 +19,18 @@
 #define GROUP_DATA_LINK_IN(vregion, lregion) > vregion
 
 #define RAMABLE_REGION dram_seg
-#define RODATA_REGION dram_seg
+#define RODATA_REGION  dram_seg
-
-#define IRAM_REGION iram_seg
-#define IRAM_LOADER_REGION iram_loader_seg
-
 #define ROMABLE_REGION dram_seg
-#define IROM_SEG_ALIGN 0x4
 
 /* Global symbols required for espressif hal build */
 MEMORY
 {
-  iram_seg        (RX) : org = 0x403CA000, len = 0x9000
+  iram_seg        (RX) : org = BOOTLOADER_IRAM_SEG_START,
-  iram_loader_seg (RX) : org = 0x403D3000, len = 0x4000
+                         len = BOOTLOADER_IRAM_SEG_LEN
-  dram_seg        (RW) : org = 0x3FCD8000, len = 0x9000
+  iram_loader_seg (RX) : org = BOOTLOADER_IRAM_LOADER_SEG_START,
+                         len = BOOTLOADER_IRAM_LOADER_SEG_LEN
+  dram_seg        (RW) : org = BOOTLOADER_DRAM_SEG_START,
+                         len = BOOTLOADER_DRAM_SEG_LEN
 
 #ifdef CONFIG_GEN_ISR_TABLES
   IDT_LIST(RW): org = 0x3ebfe010, len = 0x2000
@@ -49,15 +42,135 @@ ENTRY(CONFIG_KERNEL_ENTRY)
 
 SECTIONS
 {
-  SECTION_PROLOGUE(_RODATA_SECTION_NAME,,)
+  .iram0.loader_text :
   {
-    _rodata_start = ABSOLUTE(.);
+    . = ALIGN (16);
+    _loader_text_start = ABSOLUTE(.);
+    *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+
+    /* TODO: cross-segments calls in the libzephyr.a:device.* */
+
+    *libapp.a:flash_map_extended.*(.literal .text .literal.* .text.*)
+    *libzephyr.a:cbprintf_nano.*(.literal .text .literal.* .text.*)
+    *libzephyr.a:cpu.*(.literal .text .literal.* .text.*)
+    *libzephyr.a:mmu_hal.*(.literal .text .literal.* .text.*)
+    *libzephyr.a:cache_hal.*(.literal .text .literal.* .text.*)
+    *libzephyr.a:flash_map.*(.literal .text .literal.* .text.*)
+    *libzephyr.a:esp_rom_spiflash.*(.literal .text .literal.* .text.*)
+
+    *libzephyr.a:heap.*(.literal .text .literal.* .text.*)
+
+    *libkernel.a:kheap.*(.literal .text .literal.* .text.*)
+    *libkernel.a:mempool.*(.literal .text .literal.* .text.*)
+
+    *(.literal.bootloader_mmap .text.bootloader_mmap)
+    *(.literal.bootloader_munmap .text.bootloader_munmap)
+
+    *libzephyr.a:esp_loader.*(.literal .text .literal.* .text.*)
+    *libzephyr.a:mmu_hal.*(.literal .text .literal.* .text.*)
+
+    *(.literal.esp_intr_disable .literal.esp_intr_disable.* .text.esp_intr_disable .text.esp_intr_disable.*)
+    *(.literal.default_intr_handler .text.default_intr_handler .iram1.*.default_intr_handler)
+    *(.literal.esp_log_timestamp .text.esp_log_timestamp)
+    *(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp)
+    *(.literal.esp_system_abort .text.esp_system_abort)
+
+    *(.fini.literal)
+    *(.fini)
+    *(.gnu.version)
+    _loader_text_end = ABSOLUTE(.);
+    _iram_end = ABSOLUTE(.);
+  } > iram_loader_seg
+
+  .iram0.text :
+  {
+    /* Vectors go to IRAM */
+    _iram_start = ABSOLUTE(.);
+    _init_start = ABSOLUTE(.);
+
+    KEEP(*(.exception_vectors.text));
+    . = ALIGN(256);
+
+    _invalid_pc_placeholder = ABSOLUTE(.);
+
+    _iram_text_start = ABSOLUTE(.);
+
+    KEEP(*(.exception.entry*)); /* contains _isr_wrapper */
+    *(.exception.other*)
+    . = ALIGN(4);
+
+    *(.entry.text)
+    *(.init.literal)
+    *(.init)
+    . = ALIGN(4);
+    *(.iram1 .iram1.*)
+    *(.iram0.literal .iram.literal .iram.text.literal .iram0.text .iram.text)
+
+    /* C3 memprot requires 512 B alignment for split lines */
+    . = ALIGN (16);
+    _init_end = ABSOLUTE(.);
+    . = ALIGN(16);
+    *(.iram.data)
+    *(.iram.data*)
+    . = ALIGN(16);
+    *(.iram.bss)
+    *(.iram.bss*)
+
+    . = ALIGN(16);
+
+    *(.literal .text .literal.* .text.*)
+    *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
+    *(.fini.literal)
+    *(.fini)
+    *(.gnu.version)
+
+    /* CPU will try to prefetch up to 16 bytes of
+     * of instructions. This means that any configuration (e.g. MMU, PMS) must allow
+     * safe access to up to 16 bytes after the last real instruction, add
+     * dummy bytes to ensure this
+     */
+    . += 16;
+
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+
+    /* Similar to _iram_start, this symbol goes here so it is
+     * resolved by addr2line in preference to the first symbol in
+     * the flash.text segment.
+     */
+    _flash_cache_start = ABSOLUTE(0);
+  } > iram_seg
+
+  .dram0.data :
+  {
+    . = ALIGN(4);
+    __data_start = ABSOLUTE(.);
+    *(.data)
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    *(.data1)
+#ifdef CONFIG_RISCV_GP
+    __global_pointer$ = . + 0x800;
+#endif /* CONFIG_RISCV_GP */
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    *libzephyr.a:mmu_hal.*(.rodata .rodata.*)
+    *libzephyr.a:rtc_clk.*(.rodata .rodata.*)
+    KEEP(*(.jcr))
+    *(.dram1 .dram1.*)
+    . = ALIGN(4);
+
+    #include <snippets-rwdata.ld>
+    . = ALIGN(4);
 
     *(.rodata_desc .rodata_desc.*)
     *(.rodata_custom_desc .rodata_custom_desc.*)
 
-    __rodata_region_start = .;
-
     . = ALIGN(4);
     #include <snippets-rodata.ld>
     . = ALIGN(4);
@@ -108,39 +221,14 @@ SECTIONS
     _thread_local_end = ABSOLUTE(.);
     /* _rodata_reserved_end = ABSOLUTE(.); */
     . = ALIGN(4);
-  } GROUP_DATA_LINK_IN(RODATA_REGION, ROMABLE_REGION)
+  } > dram_seg
 
   #include <zephyr/linker/common-rom/common-rom-cpp.ld>
   #include <zephyr/linker/common-rom/common-rom-kernel-devices.ld>
   #include <zephyr/linker/common-rom/common-rom-debug.ld>
   #include <zephyr/linker/common-rom/common-rom-misc.ld>
-
   #include <snippets-sections.ld>
 
-  .dram0.data :
-  {
-    . = ALIGN(4);
-    __data_start = ABSOLUTE(.);
-    *(.data)
-    *(.data.*)
-    *(.gnu.linkonce.d.*)
-    *(.data1)
-#ifdef CONFIG_RISCV_GP
-    __global_pointer$ = . + 0x800;
-#endif /* CONFIG_RISCV_GP */
-    *(.sdata)
-    *(.sdata.*)
-    *(.gnu.linkonce.s.*)
-    *(.sdata2)
-    *(.sdata2.*)
-    *(.gnu.linkonce.s2.*)
-    *libzephyr.a:mmu_hal.*(.rodata .rodata.*)
-    *libzephyr.a:rtc_clk.*(.rodata .rodata.*)
-    KEEP(*(.jcr))
-    *(.dram1 .dram1.*)
-    . = ALIGN(4);
-  } GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
-
   #include <zephyr/linker/cplusplus-rom.ld>
   #include <zephyr/linker/thread-local-storage.ld>
   #include <snippets-data-sections.ld>
@@ -150,17 +238,16 @@ SECTIONS
 
   #include <zephyr/linker/common-rom/common-rom-logging.ld>
 
-  .dram0.end :
+  .noinit (NOLOAD):
   {
     . = ALIGN(4);
-    #include <snippets-rwdata.ld>
+    *(.noinit)
+    *(.noinit.*)
     . = ALIGN(4);
-    _end = ABSOLUTE(.);
+  } > dram_seg
-    __data_end = ABSOLUTE(.);
-  } GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
 
   /* Shared RAM */
-  SECTION_DATA_PROLOGUE(_BSS_SECTION_NAME,(NOLOAD),)
+  .bss (NOLOAD):
   {
     . = ALIGN (8);
     _bss_start = ABSOLUTE(.);
@@ -182,155 +269,13 @@ SECTIONS
     . = ALIGN (8);
     __bss_end = ABSOLUTE(.);
     _bss_end = ABSOLUTE(.);
-  } GROUP_LINK_IN(RAMABLE_REGION)
+  } > dram_seg
-
-  SECTION_DATA_PROLOGUE(_NOINIT_SECTION_NAME, (NOLOAD),)
-  {
-    . = ALIGN(4);
-    *(.noinit)
-    *(.noinit.*)
-    . = ALIGN(4);
-  } GROUP_LINK_IN(RAMABLE_REGION)
-
-  .iram_loader.text :
-  {
-    . = ALIGN (16);
-    _loader_text_start = ABSOLUTE(.);
-    *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
-    *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */
-    *libzephyr.a:bootloader_flash.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:bootloader_flash_config_esp32c3.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:bootloader_common_loader.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:bootloader_init_common.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:bootloader_random.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
-    *libzephyr.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable)
-    *libzephyr.a:bootloader_efuse_esp32c3.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:bootloader_utility.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:bootloader_sha.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:bootloader_console.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:bootloader_console_loader.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:bootloader_panic.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:bootloader_soc.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:esp_image_format.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:flash_encrypt.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:flash_partitions.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:secure_boot.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:esp_efuse_table.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:esp_efuse_fields.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:esp_efuse_api.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:esp_efuse_utility.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:esp_efuse_api_key_esp32xx.*(.literal .text .literal.* .text.*)
-    *esp_mcuboot.*(.literal .text .literal.* .text.*)
-    *esp_loader.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:mmu_hal.*(.literal .text .literal.* .text.*)
-    *libzephyr.a:rtc_clk.*(.literal .literal.* .text .text.*)
-    *libzephyr.a:rtc_clk_init.*(.literal .literal.* .text .text.*)
-    *libzephyr.a:rtc_time.*(.literal .literal.* .text .text.*)
-    *(.fini.literal)
-    *(.fini)
-    *(.gnu.version)
-    _loader_text_end = ABSOLUTE(.);
-  } > iram_loader_seg
-
-  /* .iram0.text : ALIGN(4) */
-  SECTION_PROLOGUE(_TEXT_SECTION_NAME, , ALIGN(4))
-  {
-    /* Vectors go to IRAM */
-    _iram_start = ABSOLUTE(.);
-    _init_start = ABSOLUTE(.);
-
-    KEEP(*(.exception_vectors.text));
-    . = ALIGN(256);
-
-    _invalid_pc_placeholder = ABSOLUTE(.);
-
-    _iram_text_start = ABSOLUTE(.);
-
-    KEEP(*(.exception.entry*)); /* contains _isr_wrapper */
-    *(.exception.other*)
-    . = ALIGN(4);
-
-    *(.entry.text)
-    *(.init.literal)
-    *(.init)
-    . = ALIGN(4);
-    *(.iram1 .iram1.*)
-    *(.iram0.literal .iram.literal .iram.text.literal .iram0.text .iram.text)
-
-    . = ALIGN(4);
-    _init_end = ABSOLUTE(.);
-  } GROUP_DATA_LINK_IN(IRAM_LOADER_REGION, ROMABLE_REGION)
-
-  .iram0.text_end (NOLOAD) :
-  {
-    /* C3 memprot requires 512 B alignment for split lines */
-    . = ALIGN (16);
-  } GROUP_LINK_IN(IRAM_LOADER_REGION)
-
-  .iram0.data :
-  {
-    . = ALIGN(16);
-    *(.iram.data)
-    *(.iram.data*)
-  } GROUP_DATA_LINK_IN(IRAM_LOADER_REGION, ROMABLE_REGION)
-
-  .iram0.bss (NOLOAD) :
-  {
-    . = ALIGN(16);
-    *(.iram.bss)
-    *(.iram.bss*)
-
-    . = ALIGN(16);
-    _iram_end = ABSOLUTE(.);
-  } GROUP_LINK_IN(IRAM_LOADER_REGION)
-
-  .flash_text_dummy (NOLOAD): ALIGN(IROM_SEG_ALIGN)
-  {
-    . = SIZEOF(_RODATA_SECTION_NAME);
-    . = ALIGN(4) + 0x20;
-    _rodata_reserved_start = .;
-  } GROUP_LINK_IN(IRAM_REGION)
-
-  .flash.text : ALIGN(IROM_SEG_ALIGN)
-  {
-    _stext = .;
-    _text_start = ABSOLUTE(.);
-
-    *(.literal .text .literal.* .text.*)
-    *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
-    *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
-    *(.fini.literal)
-    *(.fini)
-    *(.gnu.version)
-
-    /* CPU will try to prefetch up to 16 bytes of
-     * of instructions. This means that any configuration (e.g. MMU, PMS) must allow
-     * safe access to up to 16 bytes after the last real instruction, add
-     * dummy bytes to ensure this
-     */
-    . += 16;
-
-    _text_end = ABSOLUTE(.);
-    _etext = .;
-
-    /* Similar to _iram_start, this symbol goes here so it is
-     * resolved by addr2line in preference to the first symbol in
-     * the flash.text segment.
-     */
-    _flash_cache_start = ABSOLUTE(0);
-  } GROUP_DATA_LINK_IN(IRAM_REGION, ROMABLE_REGION)
 
   /* linker rel sections*/
   #include <zephyr/linker/rel-sections.ld>
 
 #ifdef CONFIG_GEN_ISR_TABLES
-#include <zephyr/linker/intlist.ld>
+  #include <zephyr/linker/intlist.ld>
 #endif
 
 #include <zephyr/linker/debug-sections.ld>

soc/espressif/esp32c3/memory.h

@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+/* SRAM0 (16kB) memory */
+#define SRAM0_IRAM_START   0x4037c000
+#define SRAM0_SIZE         0x4000
+/* SRAM1 (384kB) memory */
+#define SRAM1_DRAM_START   0x3fc80000
+#define SRAM1_IRAM_START   0x40380000
+/* ICache size is fixed to 16KB on ESP32-C3 */
+#define ICACHE_SIZE        SRAM0_SIZE
+
+/** Simplified memory map for the bootloader.
+ *  Make sure the bootloader can load into main memory without overwriting itself.
+ *
+ *  ESP32-C3 ROM static data usage is as follows:
+ *  - 0x3fccae00 - 0x3fcdc710: Shared buffers, used in UART/USB/SPI download mode only
+ *  - 0x3fcdc710 - 0x3fcde710: PRO CPU stack, can be reclaimed as heap after RTOS startup
+ *  - 0x3fcde710 - 0x3fce0000: ROM .bss and .data (not easily reclaimable)
+ *
+ *  The 2nd stage bootloader can take space up to the end of ROM shared
+ *  buffers area (0x3fcdc710).
+ */
+
+/* The offset between Dbus and Ibus.
+ * Used to convert between 0x403xxxxx and 0x3fcxxxxx addresses.
+ */
+#define IRAM_DRAM_OFFSET         0x700000
+#define DRAM_BUFFERS_START       0x3fccae00
+#define DRAM_STACK_START         0x3fcdc710
+#define DRAM_ROM_BSS_DATA_START  0x3fcde710
+
+/* Base address used for calculating memory layout
+ * counted from Dbus backwards and back to the Ibus
+ */
+#define BOOTLOADER_USABLE_DRAM_END DRAM_BUFFERS_START
+
+/* For safety margin between bootloader data section and startup stacks */
+#define BOOTLOADER_STACK_OVERHEAD      0x0
+/* These lengths can be adjusted, if necessary: */
+#define BOOTLOADER_DRAM_SEG_LEN        0x9000
+#define BOOTLOADER_IRAM_LOADER_SEG_LEN 0x3000
+#define BOOTLOADER_IRAM_SEG_LEN        0x8000
+
+/* Start of the lower region is determined by region size and the end of the higher region */
+#define BOOTLOADER_DRAM_SEG_END   (BOOTLOADER_USABLE_DRAM_END + BOOTLOADER_STACK_OVERHEAD)
+#define BOOTLOADER_DRAM_SEG_START (BOOTLOADER_DRAM_SEG_END - BOOTLOADER_DRAM_SEG_LEN)
+#define BOOTLOADER_IRAM_LOADER_SEG_START (BOOTLOADER_DRAM_SEG_START - \
+					BOOTLOADER_IRAM_LOADER_SEG_LEN + IRAM_DRAM_OFFSET)
+#define BOOTLOADER_IRAM_SEG_START (BOOTLOADER_IRAM_LOADER_SEG_START - BOOTLOADER_IRAM_SEG_LEN)
+
+/* Flash */
+#ifdef CONFIG_FLASH_SIZE
+#define FLASH_SIZE         CONFIG_FLASH_SIZE
+#else
+#define FLASH_SIZE         0x400000
+#endif
+
+/* Cached memory */
+#define CACHE_ALIGN        CONFIG_MMU_PAGE_SIZE
+#define IROM_SEG_ORG       0x42000000
+#define IROM_SEG_LEN       FLASH_SIZE
+#define DROM_SEG_ORG       0x3c000000
+#define DROM_SEG_LEN       FLASH_SIZE

soc/espressif/esp32c3/soc.c

@@ -43,17 +43,6 @@ extern void esp_reset_reason_init(void);
  */
 void __attribute__((section(".iram1"))) __esp_platform_start(void)
 {
-#ifdef CONFIG_RISCV_GP
-	/* Configure the global pointer register
-	 * (This should be the first thing startup does, as any other piece of code could be
-	 * relaxed by the linker to access something relative to __global_pointer$)
-	 */
-	__asm__ __volatile__(".option push\n"
-						".option norelax\n"
-						"la gp, __global_pointer$\n"
-						".option pop");
-#endif /* CONFIG_RISCV_GP */
-
 	__asm__ __volatile__("la t0, _esp32c3_vector_table\n"
 						"csrw mtvec, t0\n");
 
@@ -64,12 +53,7 @@ void __attribute__((section(".iram1"))) __esp_platform_start(void)
 
 	esp_reset_reason_init();
 
-#ifdef CONFIG_MCUBOOT
+#ifndef CONFIG_MCUBOOT
-	/* MCUboot early initialisation.
-	 */
-	bootloader_init();
-
-#else
 	/* ESP-IDF 2nd stage bootloader enables RTC WDT to check on startup sequence
 	 * related issues in application. Hence disable that as we are about to start
 	 * Zephyr environment.
@@ -103,13 +87,13 @@ void __attribute__((section(".iram1"))) __esp_platform_start(void)
 #ifdef CONFIG_SOC_FLASH_ESP32
 	esp_mspi_pin_init();
 
-    /**
+	/**
-     * This function initialise the Flash chip to the user-defined settings.
+	 * This function initialise the Flash chip to the user-defined settings.
-     *
+	 *
-     * In bootloader, we only init Flash (and MSPI) to a preliminary state, for being flexible to
+	 * In bootloader, we only init Flash (and MSPI) to a preliminary
-     * different chips.
+	 * state, for being flexible to different chips.
-     * In this stage, we re-configure the Flash (and MSPI) to required configuration
+	 * In this stage, we re-configure the Flash (and MSPI) to required configuration
-     */
+	 */
 	spi_flash_init_chip_state();
 
 	esp_mmu_map_init();
@@ -127,7 +111,7 @@ void __attribute__((section(".iram1"))) __esp_platform_start(void)
 	spi_flash_guard_set(&g_flash_guard_default_ops);
 #endif
 
-#endif /* CONFIG_MCUBOOT */
+#endif /* !CONFIG_MCUBOOT */
 
 	/*Initialize the esp32c3 interrupt controller */
 	esp_intr_initialize();