boards: stm32l562e_dk: Enable SPI and BLE
Enable spi1 interface that connects to STM module SPBTLE-RFTR on the stm32l562e_dk board. Tested the configuration with st_ble_sensor sample + ST BLE Sensor app on Android phone. Signed-off-by: Yestin Sun <sunyi0804@gmail.com>
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@ -8,4 +8,28 @@ if BOARD_STM32L562E_DK
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config BOARD
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config BOARD
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default "stm32l562e_dk"
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default "stm32l562e_dk"
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if BT
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config SPI
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default y
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choice BT_HCI_BUS_TYPE
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default BT_SPI
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endchoice
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config BT_SPI_BLUENRG
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default y
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config BT_BLUENRG_ACI
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default y
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# Disable Flow control
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config BT_HCI_ACL_FLOW_CONTROL
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default n
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config BT_HCI_VS_EXT
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default n
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endif # BT
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endif # BOARD_STM32L562E_DK
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endif # BOARD_STM32L562E_DK
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@ -164,6 +164,8 @@ The Zephyr stm32l562e_dk board configuration supports the following hardware fea
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+-----------+------------+-------------------------------------+
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+-----------+------------+-------------------------------------+
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| I2C | on-chip | i2c |
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| I2C | on-chip | i2c |
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+-----------+------------+-------------------------------------+
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+-----------+------------+-------------------------------------+
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| SPI | on-chip | spi |
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+-----------+------------+-------------------------------------+
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Other hardware features are not yet supported on this Zephyr port.
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Other hardware features are not yet supported on this Zephyr port.
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@ -184,6 +186,7 @@ Default Zephyr Peripheral Mapping:
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- USART_1 TX/RX : PA9/PA10
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- USART_1 TX/RX : PA9/PA10
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- I2C_1 SCL/SDA : PB6/PB7
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- I2C_1 SCL/SDA : PB6/PB7
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- SPI_1 SCK/MISO/MOSI : PG2/PG3/PG4 (BT SPI bus)
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- USER_PB : PC13
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- USER_PB : PC13
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- LD10 : PG12
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- LD10 : PG12
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@ -48,3 +48,18 @@
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label = "LSM6DSO";
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label = "LSM6DSO";
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};
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};
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};
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};
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&spi1 {
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pinctrl-0 = <&spi1_sck_pg2 &spi1_miso_pg3 &spi1_mosi_pg4>;
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cs-gpios = <&gpiog 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>;
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status = "okay";
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spbtle-rf@0 {
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compatible = "zephyr,bt-hci-spi";
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reg = <0>;
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irq-gpios = <&gpiog 6 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
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reset-gpios = <&gpiog 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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spi-max-frequency = <2000000>;
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label = "SPBTLE-RF";
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};
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};
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