boards: stm32l562e_dk: Enable SPI and BLE

Enable spi1 interface that connects to STM module SPBTLE-RFTR on the
stm32l562e_dk board.

Tested the configuration with st_ble_sensor sample + ST BLE Sensor
app on Android phone.

Signed-off-by: Yestin Sun <sunyi0804@gmail.com>
This commit is contained in:
Yestin Sun 2020-12-08 22:08:03 -08:00 committed by Anas Nashif
commit f7d866735e
3 changed files with 42 additions and 0 deletions

View file

@ -8,4 +8,28 @@ if BOARD_STM32L562E_DK
config BOARD
default "stm32l562e_dk"
if BT
config SPI
default y
choice BT_HCI_BUS_TYPE
default BT_SPI
endchoice
config BT_SPI_BLUENRG
default y
config BT_BLUENRG_ACI
default y
# Disable Flow control
config BT_HCI_ACL_FLOW_CONTROL
default n
config BT_HCI_VS_EXT
default n
endif # BT
endif # BOARD_STM32L562E_DK

View file

@ -164,6 +164,8 @@ The Zephyr stm32l562e_dk board configuration supports the following hardware fea
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
@ -184,6 +186,7 @@ Default Zephyr Peripheral Mapping:
- USART_1 TX/RX : PA9/PA10
- I2C_1 SCL/SDA : PB6/PB7
- SPI_1 SCK/MISO/MOSI : PG2/PG3/PG4 (BT SPI bus)
- USER_PB : PC13
- LD10 : PG12

View file

@ -48,3 +48,18 @@
label = "LSM6DSO";
};
};
&spi1 {
pinctrl-0 = <&spi1_sck_pg2 &spi1_miso_pg3 &spi1_mosi_pg4>;
cs-gpios = <&gpiog 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>;
status = "okay";
spbtle-rf@0 {
compatible = "zephyr,bt-hci-spi";
reg = <0>;
irq-gpios = <&gpiog 6 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
reset-gpios = <&gpiog 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
spi-max-frequency = <2000000>;
label = "SPBTLE-RF";
};
};