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arch/x86: do not assume MP means SMP

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It's possible to have multiple processors configured without using the
SMP scheduler, so don't make definitions dependent on CONFIG_SMP.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
This commit is contained in:
Charles E. Youse 2019-10-07 13:42:29 -04:00 • committed by Anas Nashif
commit f7cfb4303b
3 changed files with 15 additions and 15 deletions
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12
arch/x86/core/intel64/cpu.c
View file

@ -32,7 +32,7 @@ struct x86_tss64 tss0 = {
.cpu = &(_kernel.cpus[0])
};
#if defined(CONFIG_SMP) && (CONFIG_MP_NUM_CPUS > 1)
#if CONFIG_MP_NUM_CPUS > 1
Z_GENERIC_SECTION(.tss)
struct x86_tss64 tss1 = {
.ist7 = (u64_t) _exception_stack1 + CONFIG_EXCEPTION_STACK_SIZE,
@ -41,7 +41,7 @@ struct x86_tss64 tss1 = {
};
#endif
#if defined(CONFIG_SMP) && (CONFIG_MP_NUM_CPUS > 2)
#if CONFIG_MP_NUM_CPUS > 2
Z_GENERIC_SECTION(.tss)
struct x86_tss64 tss2 = {
.ist7 = (u64_t) _exception_stack2 + CONFIG_EXCEPTION_STACK_SIZE,
@ -50,7 +50,7 @@ struct x86_tss64 tss2 = {
};
#endif
#if defined(CONFIG_SMP) && (CONFIG_MP_NUM_CPUS > 3)
#if CONFIG_MP_NUM_CPUS > 3
Z_GENERIC_SECTION(.tss)
struct x86_tss64 tss3 = {
.ist7 = (u64_t) _exception_stack3 + CONFIG_EXCEPTION_STACK_SIZE,
@ -66,19 +66,19 @@ struct x86_cpuboot x86_cpuboot[] = {
.sp = (u64_t) _interrupt_stack + CONFIG_ISR_STACK_SIZE,
.fn = z_x86_prep_c
},
#if defined(CONFIG_SMP) && (CONFIG_MP_NUM_CPUS > 1)
#if CONFIG_MP_NUM_CPUS > 1
{
.tr = X86_KERNEL_CPU1_TR,
.gs = X86_KERNEL_CPU1_GS,
},
#endif
#if defined(CONFIG_SMP) && (CONFIG_MP_NUM_CPUS > 2)
#if CONFIG_MP_NUM_CPUS > 2
{
.tr = X86_KERNEL_CPU2_TR,
.gs = X86_KERNEL_CPU2_GS,
},
#endif
#if defined(CONFIG_SMP) && (CONFIG_MP_NUM_CPUS > 3)
#if CONFIG_MP_NUM_CPUS > 3
{
.tr = X86_KERNEL_CPU3_TR,
.gs = X86_KERNEL_CPU3_GS,

16
arch/x86/core/intel64/locore.S
View file

@ -14,7 +14,7 @@
.section .locore,"ax"
.code32
#if defined(CONFIG_SMP) && (CONFIG_MP_NUM_CPUS > 1)
#if CONFIG_MP_NUM_CPUS > 1
/*
* APs are sent here on startup, in real mode. This
@ -65,7 +65,7 @@ x86_ap_start:
unknown_loapic_id:
jmp unknown_loapic_id
#endif /* CONFIG_SMP && ... */
#endif /* CONFIG_MP_NUM_CPUS > 1 */
.code32
.globl __start
@ -280,7 +280,7 @@ gdt:
.word 0x8900
.word 0, 0, 0, 0, 0
#if defined(CONFIG_SMP) && (CONFIG_MP_NUM_CPUS > 1)
#if CONFIG_MP_NUM_CPUS > 1
/*
* CPU 1 task state segment descriptors
*/
@ -298,7 +298,7 @@ gdt:
.word 0, 0, 0, 0, 0
#endif
#if defined(CONFIG_SMP) && (CONFIG_MP_NUM_CPUS > 2)
#if CONFIG_MP_NUM_CPUS > 2
/*
* CPU 2 task state segment descriptors
*/
@ -316,7 +316,7 @@ gdt:
.word 0, 0, 0, 0, 0
#endif
#if defined(CONFIG_SMP) && (CONFIG_MP_NUM_CPUS > 3)
#if CONFIG_MP_NUM_CPUS > 3
/*
* CPU 3 task state segment descriptors
*/
@ -653,21 +653,21 @@ pdp: .long 0x00000183 /* 0x183 = G, 1GB, R/W, P */
_exception_stack:
.fill CONFIG_EXCEPTION_STACK_SIZE, 1, 0xAA
#if defined(CONFIG_SMP) && (CONFIG_MP_NUM_CPUS > 1)
#if CONFIG_MP_NUM_CPUS > 1
.global _exception_stack1
.align 16
_exception_stack1:
.fill CONFIG_EXCEPTION_STACK_SIZE, 1, 0xAA
#endif
#if defined(CONFIG_SMP) && (CONFIG_MP_NUM_CPUS > 2)
#if CONFIG_MP_NUM_CPUS > 2
.global _exception_stack2
.align 16
_exception_stack2:
.fill CONFIG_EXCEPTION_STACK_SIZE, 1, 0xAA
#endif
#if defined(CONFIG_SMP) && (CONFIG_MP_NUM_CPUS > 3)
#if CONFIG_MP_NUM_CPUS > 3
.global _exception_stack3
.align 16
_exception_stack3:

2
arch/x86/include/intel64/kernel_arch_func.h
View file

@ -34,7 +34,7 @@ static inline struct _cpu *z_arch_curr_cpu(void)
return cpu;
}
#if defined(CONFIG_SMP) && defined(CONFIG_SCHED_IPI_SUPPORTED)
#if defined(CONFIG_SMP)
#include <drivers/interrupt_controller/loapic.h>