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arch/x86: (Intel64) initialize TSS interrupt stack from cpuboot[]

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In non-SMP MP situations, the interrupt stacks might not exist, so
do not assume they do. Instead, initialize the TSS IST1 from the
cpuboot[] vector (meaning, on APs, the stack from z_arch_start_cpu).
Eliminates redundancy at the same time.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
This commit is contained in:
Charles E. Youse 2019-10-07 13:35:56 -04:00 • committed by Anas Nashif
commit e6a31a9e89
2 changed files with 1 additions and 4 deletions
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4
arch/x86/core/intel64/cpu.c
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@ -27,7 +27,6 @@ extern u8_t _exception_stack3[];
Z_GENERIC_SECTION(.tss)
struct x86_tss64 tss0 = {
.ist1 = (u64_t) _interrupt_stack + CONFIG_ISR_STACK_SIZE,
.ist7 = (u64_t) _exception_stack + CONFIG_EXCEPTION_STACK_SIZE,
.iomapb = 0xFFFF,
.cpu = &(_kernel.cpus[0])
@ -36,7 +35,6 @@ struct x86_tss64 tss0 = {
#if defined(CONFIG_SMP) && (CONFIG_MP_NUM_CPUS > 1)
Z_GENERIC_SECTION(.tss)
struct x86_tss64 tss1 = {
.ist1 = (u64_t) _interrupt_stack1 + CONFIG_ISR_STACK_SIZE,
.ist7 = (u64_t) _exception_stack1 + CONFIG_EXCEPTION_STACK_SIZE,
.iomapb = 0xFFFF,
.cpu = &(_kernel.cpus[1])
@ -46,7 +44,6 @@ struct x86_tss64 tss1 = {
#if defined(CONFIG_SMP) && (CONFIG_MP_NUM_CPUS > 2)
Z_GENERIC_SECTION(.tss)
struct x86_tss64 tss2 = {
.ist1 = (u64_t) _interrupt_stack2 + CONFIG_ISR_STACK_SIZE,
.ist7 = (u64_t) _exception_stack2 + CONFIG_EXCEPTION_STACK_SIZE,
.iomapb = 0xFFFF,
.cpu = &(_kernel.cpus[2])
@ -56,7 +53,6 @@ struct x86_tss64 tss2 = {
#if defined(CONFIG_SMP) && (CONFIG_MP_NUM_CPUS > 3)
Z_GENERIC_SECTION(.tss)
struct x86_tss64 tss3 = {
.ist1 = (u64_t) _interrupt_stack3 + CONFIG_ISR_STACK_SIZE,
.ist7 = (u64_t) _exception_stack3 + CONFIG_EXCEPTION_STACK_SIZE,
.iomapb = 0xFFFF,
.cpu = &(_kernel.cpus[3])

1
arch/x86/core/intel64/locore.S
View file

@ -135,6 +135,7 @@ go64: movl %cr4, %eax /* enable PAE and SSE */
movw %ax, %gs
movq __x86_cpuboot_t_sp_OFFSET(%rbp), %rsp
movq %rsp, %gs:__x86_tss64_t_ist1_OFFSET
/*
* finally, complete environment for the C runtime and go.