arch: x86: core: early_serial: obtain NS16550 uart base address from DT

The NS16550 UART base address was hardcoded in <soc.h> headers. This
bypasses the console choice defined in Devicetree. Hardcoded hardware
choices must be avoided now that DT is in place.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit is contained in:
Gerard Marull-Paretas 2022-06-01 15:48:40 +02:00 committed by Carles Cufí
commit f51674ac24

View file

@ -11,10 +11,10 @@
#include <soc.h>
#ifdef UART_NS16550_ACCESS_IOPORT
#ifdef CONFIG_UART_NS16550_ACCESS_IOPORT
/* Legacy I/O Port Access to a NS16550 UART */
#define IN(reg) sys_in8(reg + UART_NS16550_ACCESS_IOPORT)
#define OUT(reg, val) sys_out8(val, reg + UART_NS16550_ACCESS_IOPORT)
#define IN(reg) sys_in8(reg + DT_REG_ADDR(DT_CHOSEN(zephyr_console)))
#define OUT(reg, val) sys_out8(val, reg + DT_REG_ADDR(DT_CHOSEN(zephyr_console)))
#elif defined(X86_SOC_EARLY_SERIAL_PCIDEV)
/* "Modern" mapping of a UART into a PCI MMIO device. The registers
* are still bytes, but spaced at a 32 bit stride instead of packed
@ -86,7 +86,7 @@ int arch_printk_char_out(int c)
void z_x86_early_serial_init(void)
{
#if defined(DEVICE_MMIO_IS_IN_RAM) && !defined(UART_NS16550_ACCESS_IOPORT)
#if defined(DEVICE_MMIO_IS_IN_RAM) && !defined(CONFIG_UART_NS16550_ACCESS_IOPORT)
#ifdef X86_SOC_EARLY_SERIAL_PCIDEV
struct pcie_mbar mbar;
pcie_get_mbar(X86_SOC_EARLY_SERIAL_PCIDEV, 0, &mbar);