arch: x86: core: early_serial: obtain NS16550 uart base address from DT
The NS16550 UART base address was hardcoded in <soc.h> headers. This bypasses the console choice defined in Devicetree. Hardcoded hardware choices must be avoided now that DT is in place. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
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1 changed files with 4 additions and 4 deletions
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@ -11,10 +11,10 @@
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#include <soc.h>
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#ifdef UART_NS16550_ACCESS_IOPORT
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#ifdef CONFIG_UART_NS16550_ACCESS_IOPORT
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/* Legacy I/O Port Access to a NS16550 UART */
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#define IN(reg) sys_in8(reg + UART_NS16550_ACCESS_IOPORT)
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#define OUT(reg, val) sys_out8(val, reg + UART_NS16550_ACCESS_IOPORT)
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#define IN(reg) sys_in8(reg + DT_REG_ADDR(DT_CHOSEN(zephyr_console)))
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#define OUT(reg, val) sys_out8(val, reg + DT_REG_ADDR(DT_CHOSEN(zephyr_console)))
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#elif defined(X86_SOC_EARLY_SERIAL_PCIDEV)
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/* "Modern" mapping of a UART into a PCI MMIO device. The registers
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* are still bytes, but spaced at a 32 bit stride instead of packed
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@ -86,7 +86,7 @@ int arch_printk_char_out(int c)
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void z_x86_early_serial_init(void)
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{
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#if defined(DEVICE_MMIO_IS_IN_RAM) && !defined(UART_NS16550_ACCESS_IOPORT)
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#if defined(DEVICE_MMIO_IS_IN_RAM) && !defined(CONFIG_UART_NS16550_ACCESS_IOPORT)
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#ifdef X86_SOC_EARLY_SERIAL_PCIDEV
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struct pcie_mbar mbar;
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pcie_get_mbar(X86_SOC_EARLY_SERIAL_PCIDEV, 0, &mbar);
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