drivers: ieee802154_rf2xx: convert to use spi_dt_spec

Convert ieee802154_rf2xx driver to use `spi_dt_spec` helpers.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
This commit is contained in:
Bartosz Bilas 2021-10-29 09:11:36 +02:00 committed by Christopher Friedt
commit f445cb9a7e
3 changed files with 16 additions and 73 deletions

View file

@ -841,44 +841,14 @@ static inline int configure_gpios(const struct device *dev)
static inline int configure_spi(const struct device *dev)
{
struct rf2xx_context *ctx = dev->data;
const struct rf2xx_config *conf = dev->config;
/* Get SPI Driver Instance*/
ctx->spi = device_get_binding(conf->spi.devname);
if (!ctx->spi) {
LOG_ERR("Failed to get instance of %s device",
conf->spi.devname);
if (!spi_is_ready(&conf->spi)) {
LOG_ERR("SPI bus %s is not ready",
conf->spi.bus->name);
return -ENODEV;
}
/* Apply SPI Config: 8-bit, MSB First, MODE-0 */
ctx->spi_cfg.operation = SPI_WORD_SET(8) |
SPI_TRANSFER_MSB;
ctx->spi_cfg.slave = conf->spi.addr;
ctx->spi_cfg.frequency = conf->spi.freq;
ctx->spi_cfg.cs = NULL;
/*
* Get SPI Chip Select Instance
*
* This is an optinal feature configured on DTS. Some SPI controllers
* automatically set CS line by device slave address. Check your SPI
* device driver to understand if you need this option enabled.
*/
ctx->spi_cs.gpio_dev = device_get_binding(conf->spi.cs.devname);
if (ctx->spi_cs.gpio_dev) {
ctx->spi_cs.gpio_pin = conf->spi.cs.pin;
ctx->spi_cs.gpio_dt_flags = conf->spi.cs.flags;
ctx->spi_cs.delay = 0U;
ctx->spi_cfg.cs = &ctx->spi_cs;
LOG_DBG("SPI GPIO CS configured on %s:%u",
conf->spi.cs.devname, conf->spi.cs.pin);
}
return 0;
}
@ -981,18 +951,6 @@ static struct ieee802154_radio_api rf2xx_radio_api = {
UTIL_AND(DT_INST_NODE_HAS_PROP(n, gpio_pha), \
DT_INST_GPIO_FLAGS(n, gpio_pha))
#define DRV_INST_SPI_DEV_CS_GPIOS_LABEL(n) \
UTIL_AND(DT_INST_SPI_DEV_HAS_CS_GPIOS(n), \
DT_INST_SPI_DEV_CS_GPIOS_LABEL(n))
#define DRV_INST_SPI_DEV_CS_GPIOS_PIN(n) \
UTIL_AND(DT_INST_SPI_DEV_HAS_CS_GPIOS(n), \
DT_INST_SPI_DEV_CS_GPIOS_PIN(n))
#define DRV_INST_SPI_DEV_CS_GPIOS_FLAGS(n) \
UTIL_AND(DT_INST_SPI_DEV_HAS_CS_GPIOS(n), \
DT_INST_SPI_DEV_CS_GPIOS_FLAGS(n))
#define DRV_INST_LOCAL_MAC_ADDRESS(n) \
UTIL_AND(DT_INST_NODE_HAS_PROP(n, local_mac_address), \
UTIL_AND(DT_INST_PROP_LEN(n, local_mac_address) == 8, \
@ -1023,12 +981,8 @@ static struct ieee802154_radio_api rf2xx_radio_api = {
.clkm.pin = DRV_INST_GPIO_PIN(n, clkm_gpios), \
.clkm.flags = DRV_INST_GPIO_FLAGS(n, clkm_gpios), \
\
.spi.devname = DT_INST_BUS_LABEL(n), \
.spi.addr = DT_INST_REG_ADDR(n), \
.spi.freq = DT_INST_PROP(n, spi_max_frequency), \
.spi.cs.devname = DRV_INST_SPI_DEV_CS_GPIOS_LABEL(n), \
.spi.cs.pin = DRV_INST_SPI_DEV_CS_GPIOS_PIN(n), \
.spi.cs.flags = DRV_INST_SPI_DEV_CS_GPIOS_FLAGS(n), \
.spi = SPI_DT_SPEC_INST_GET(n, SPI_WORD_SET(8) | \
SPI_TRANSFER_MSB, 0), \
}
#define IEEE802154_RF2XX_DEVICE_DATA(n) \

View file

@ -80,13 +80,6 @@ struct rf2xx_dt_gpio_t {
uint32_t flags;
};
struct rf2xx_dt_spi_t {
const char *devname;
uint32_t freq;
uint32_t addr;
struct rf2xx_dt_gpio_t cs;
};
struct rf2xx_config {
struct rf2xx_dt_gpio_t irq;
struct rf2xx_dt_gpio_t reset;
@ -94,7 +87,7 @@ struct rf2xx_config {
struct rf2xx_dt_gpio_t dig2;
struct rf2xx_dt_gpio_t clkm;
struct rf2xx_dt_spi_t spi;
struct spi_dt_spec spi;
uint8_t inst;
uint8_t has_mac;
@ -111,10 +104,6 @@ struct rf2xx_context {
const struct device *dig2_gpio;
const struct device *clkm_gpio;
const struct device *spi;
struct spi_config spi_cfg;
struct spi_cs_control spi_cs;
struct gpio_callback irq_cb;
struct k_thread trx_thread;

View file

@ -56,7 +56,7 @@ void rf2xx_iface_phy_tx_start(const struct device *dev)
uint8_t rf2xx_iface_reg_read(const struct device *dev,
uint8_t addr)
{
const struct rf2xx_context *ctx = dev->data;
const struct rf2xx_config *conf = dev->config;
uint8_t status;
uint8_t regval = 0;
@ -85,7 +85,7 @@ uint8_t rf2xx_iface_reg_read(const struct device *dev,
.count = 2
};
if (spi_transceive(ctx->spi, &ctx->spi_cfg, &tx, &rx) != 0) {
if (spi_transceive_dt(&conf->spi, &tx, &rx) != 0) {
LOG_ERR("Failed to exec rf2xx_reg_read CMD at address %d",
addr);
}
@ -100,7 +100,7 @@ void rf2xx_iface_reg_write(const struct device *dev,
uint8_t addr,
uint8_t data)
{
const struct rf2xx_context *ctx = dev->data;
const struct rf2xx_config *conf = dev->config;
uint8_t status;
addr |= RF2XX_RF_CMD_REG_W;
@ -128,7 +128,7 @@ void rf2xx_iface_reg_write(const struct device *dev,
.count = 1
};
if (spi_transceive(ctx->spi, &ctx->spi_cfg, &tx, &rx) != 0) {
if (spi_transceive_dt(&conf->spi, &tx, &rx) != 0) {
LOG_ERR("Failed to exec rf2xx_reg_write at address %d",
addr);
}
@ -171,7 +171,7 @@ void rf2xx_iface_frame_read(const struct device *dev,
uint8_t *data,
uint8_t length)
{
const struct rf2xx_context *ctx = dev->data;
const struct rf2xx_config *conf = dev->config;
uint8_t cmd = RF2XX_RF_CMD_FRAME_R;
const struct spi_buf tx_buf = {
@ -191,7 +191,7 @@ void rf2xx_iface_frame_read(const struct device *dev,
.count = 1
};
if (spi_transceive(ctx->spi, &ctx->spi_cfg, &tx, &rx) != 0) {
if (spi_transceive_dt(&conf->spi, &tx, &rx) != 0) {
LOG_ERR("Failed to exec rf2xx_frame_read PHR");
}
@ -203,7 +203,7 @@ void rf2xx_iface_frame_write(const struct device *dev,
uint8_t *data,
uint8_t length)
{
const struct rf2xx_context *ctx = dev->data;
const struct rf2xx_config *conf = dev->config;
uint8_t cmd = RF2XX_RF_CMD_FRAME_W;
uint8_t status;
uint8_t phr;
@ -242,7 +242,7 @@ void rf2xx_iface_frame_write(const struct device *dev,
.count = 1
};
if (spi_transceive(ctx->spi, &ctx->spi_cfg, &tx, &rx) != 0) {
if (spi_transceive_dt(&conf->spi, &tx, &rx) != 0) {
LOG_ERR("Failed to exec rf2xx_frame_write");
}
@ -255,7 +255,7 @@ void rf2xx_iface_sram_read(const struct device *dev,
uint8_t *data,
uint8_t length)
{
const struct rf2xx_context *ctx = dev->data;
const struct rf2xx_config *conf = dev->config;
uint8_t cmd = RF2XX_RF_CMD_SRAM_R;
uint8_t status[2];
@ -288,7 +288,7 @@ void rf2xx_iface_sram_read(const struct device *dev,
.count = 2
};
if (spi_transceive(ctx->spi, &ctx->spi_cfg, &tx, &rx) != 0) {
if (spi_transceive_dt(&conf->spi, &tx, &rx) != 0) {
LOG_ERR("Failed to exec rf2xx_sram_read");
}