drivers: gpio: Add GPIO support for mimx8ml8_m7 (NXP i.MX8M Plus SoC)

The current MCUX IGPIO driver assumes that the target SoC supports
the DR_SET, DR_CLEAR, and DR_TOGGLE functionality, but some do not
(namely, the M7 core of the i.MX8M Plus SoC). Current releases of
the MCUXpresso SDK IGPIO driver contain utility functions to set,
clear, and toggle pins which include provisions to support SoCs
with and without DR_SET, DR_CLEAR, and DR_TOGGLE, and this change
switches to using these utility functions.

Additionally, this change enables GPIO support on the mimx8ml8_m7
target.

Signed-off-by: Chris Trowbridge <chris.trowbridge@lairdconnect.com>
This commit is contained in:
Chris Trowbridge 2022-02-03 08:31:12 -05:00 committed by Marti Bolivar
commit f401be157f
7 changed files with 91 additions and 5 deletions

View file

@ -47,11 +47,11 @@ static int mcux_igpio_configure(const struct device *dev,
}
if (flags & GPIO_OUTPUT_INIT_HIGH) {
base->DR_SET = BIT(pin);
GPIO_WritePinOutput(base, pin, 1);
}
if (flags & GPIO_OUTPUT_INIT_LOW) {
base->DR_CLEAR = BIT(pin);
GPIO_WritePinOutput(base, pin, 0);
}
WRITE_BIT(base->GDIR, pin, flags & GPIO_OUTPUT);
@ -87,7 +87,7 @@ static int mcux_igpio_port_set_bits_raw(const struct device *dev,
const struct mcux_igpio_config *config = dev->config;
GPIO_Type *base = config->base;
base->DR_SET = mask;
GPIO_PortSet(base, mask);
return 0;
}
@ -98,7 +98,7 @@ static int mcux_igpio_port_clear_bits_raw(const struct device *dev,
const struct mcux_igpio_config *config = dev->config;
GPIO_Type *base = config->base;
base->DR_CLEAR = mask;
GPIO_PortClear(base, mask);
return 0;
}
@ -109,7 +109,7 @@ static int mcux_igpio_port_toggle_bits(const struct device *dev,
const struct mcux_igpio_config *config = dev->config;
GPIO_Type *base = config->base;
base->DR_TOGGLE = mask;
GPIO_PortToggle(base, mask);
return 0;
}