diff --git a/boards/arm/mimx8mp_evk/mimx8mp_evk_ddr.dts b/boards/arm/mimx8mp_evk/mimx8mp_evk_ddr.dts
index 575f5a8371b..d068bd2f31d 100644
--- a/boards/arm/mimx8mp_evk/mimx8mp_evk_ddr.dts
+++ b/boards/arm/mimx8mp_evk/mimx8mp_evk_ddr.dts
@@ -26,3 +26,7 @@
 	status = "okay";
 	current-speed = <115200>;
 };
+
+&gpio3 {
+	status = "okay";
+};
diff --git a/boards/arm/mimx8mp_evk/mimx8mp_evk_itcm.dts b/boards/arm/mimx8mp_evk/mimx8mp_evk_itcm.dts
index b8d3ba0177e..ff35b0d0350 100644
--- a/boards/arm/mimx8mp_evk/mimx8mp_evk_itcm.dts
+++ b/boards/arm/mimx8mp_evk/mimx8mp_evk_itcm.dts
@@ -26,3 +26,7 @@
 	status = "okay";
 	current-speed = <115200>;
 };
+
+&gpio3 {
+	status = "okay";
+};
diff --git a/drivers/gpio/gpio_mcux_igpio.c b/drivers/gpio/gpio_mcux_igpio.c
index 865c54d923a..59e8dfb717f 100644
--- a/drivers/gpio/gpio_mcux_igpio.c
+++ b/drivers/gpio/gpio_mcux_igpio.c
@@ -47,11 +47,11 @@ static int mcux_igpio_configure(const struct device *dev,
 	}
 
 	if (flags & GPIO_OUTPUT_INIT_HIGH) {
-		base->DR_SET = BIT(pin);
+		GPIO_WritePinOutput(base, pin, 1);
 	}
 
 	if (flags & GPIO_OUTPUT_INIT_LOW) {
-		base->DR_CLEAR = BIT(pin);
+		GPIO_WritePinOutput(base, pin, 0);
 	}
 
 	WRITE_BIT(base->GDIR, pin, flags & GPIO_OUTPUT);
@@ -87,7 +87,7 @@ static int mcux_igpio_port_set_bits_raw(const struct device *dev,
 	const struct mcux_igpio_config *config = dev->config;
 	GPIO_Type *base = config->base;
 
-	base->DR_SET = mask;
+	GPIO_PortSet(base, mask);
 
 	return 0;
 }
@@ -98,7 +98,7 @@ static int mcux_igpio_port_clear_bits_raw(const struct device *dev,
 	const struct mcux_igpio_config *config = dev->config;
 	GPIO_Type *base = config->base;
 
-	base->DR_CLEAR = mask;
+	GPIO_PortClear(base, mask);
 
 	return 0;
 }
@@ -109,7 +109,7 @@ static int mcux_igpio_port_toggle_bits(const struct device *dev,
 	const struct mcux_igpio_config *config = dev->config;
 	GPIO_Type *base = config->base;
 
-	base->DR_TOGGLE = mask;
+	GPIO_PortToggle(base, mask);
 
 	return 0;
 }
diff --git a/dts/arm/nxp/nxp_imx8ml_m7.dtsi b/dts/arm/nxp/nxp_imx8ml_m7.dtsi
index 6787781d8ee..555fef0cd56 100644
--- a/dts/arm/nxp/nxp_imx8ml_m7.dtsi
+++ b/dts/arm/nxp/nxp_imx8ml_m7.dtsi
@@ -87,6 +87,76 @@
 			#clock-cells = <3>;
 		};
 
+		gpio1: gpio@30200000 {
+			compatible = "nxp,imx-gpio";
+			reg = <0x30200000 DT_SIZE_K(64)>;
+			interrupts = <64 0>, <65 0>;
+			rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
+					       RDC_DOMAIN_PERM_RW)|\
+			       RDC_DOMAIN_PERM(M7_DOMAIN_ID,\
+					       RDC_DOMAIN_PERM_RW))>;
+			label = "GPIO_1";
+			gpio-controller;
+			#gpio-cells = <2>;
+			status = "disabled";
+		};
+
+		gpio2: gpio@30210000 {
+			compatible = "nxp,imx-gpio";
+			reg = <0x30210000 DT_SIZE_K(64)>;
+			interrupts = <66 0>, <67 0>;
+			rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
+					       RDC_DOMAIN_PERM_RW)|\
+			       RDC_DOMAIN_PERM(M7_DOMAIN_ID,\
+					       RDC_DOMAIN_PERM_RW))>;
+			label = "GPIO_2";
+			gpio-controller;
+			#gpio-cells = <2>;
+			status = "disabled";
+		};
+
+		gpio3: gpio@30220000 {
+			compatible = "nxp,imx-gpio";
+			reg = <0x30220000 DT_SIZE_K(64)>;
+			interrupts = <68 0>, <69 0>;
+			rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
+					       RDC_DOMAIN_PERM_RW)|\
+			       RDC_DOMAIN_PERM(M7_DOMAIN_ID,\
+					       RDC_DOMAIN_PERM_RW))>;
+			label = "GPIO_3";
+			gpio-controller;
+			#gpio-cells = <2>;
+			status = "disabled";
+		};
+
+		gpio4: gpio@30230000 {
+			compatible = "nxp,imx-gpio";
+			reg = <0x30230000 DT_SIZE_K(64)>;
+			interrupts = <70 0>, <71 0>;
+			rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
+					       RDC_DOMAIN_PERM_RW)|\
+			       RDC_DOMAIN_PERM(M7_DOMAIN_ID,\
+					       RDC_DOMAIN_PERM_RW))>;
+			label = "GPIO_4";
+			gpio-controller;
+			#gpio-cells = <2>;
+			status = "disabled";
+		};
+
+		gpio5: gpio@30240000 {
+			compatible = "nxp,imx-gpio";
+			reg = <0x30240000 DT_SIZE_K(64)>;
+			interrupts = <72 0>, <73 0>;
+			rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
+					       RDC_DOMAIN_PERM_RW)|\
+			       RDC_DOMAIN_PERM(M7_DOMAIN_ID,\
+					       RDC_DOMAIN_PERM_RW))>;
+			label = "GPIO_5";
+			gpio-controller;
+			#gpio-cells = <2>;
+			status = "disabled";
+		};
+
 		/*
 		 * For now only UART4 is supported and
 		 * tested with the serial driver
diff --git a/soc/arm/nxp_imx/mimx8ml8_m7/Kconfig.defconfig.mimx8ml8_m7 b/soc/arm/nxp_imx/mimx8ml8_m7/Kconfig.defconfig.mimx8ml8_m7
index 2240ab3c4cb..caa89bf4403 100644
--- a/soc/arm/nxp_imx/mimx8ml8_m7/Kconfig.defconfig.mimx8ml8_m7
+++ b/soc/arm/nxp_imx/mimx8ml8_m7/Kconfig.defconfig.mimx8ml8_m7
@@ -27,6 +27,9 @@ config PINMUX_MCUX
 
 endif # PINMUX
 
+config GPIO
+	default y
+
 if SERIAL
 
 config UART_MCUX_IUART
diff --git a/soc/arm/nxp_imx/mimx8ml8_m7/Kconfig.defconfig.series b/soc/arm/nxp_imx/mimx8ml8_m7/Kconfig.defconfig.series
index e95ab9c9595..3a14d299db7 100644
--- a/soc/arm/nxp_imx/mimx8ml8_m7/Kconfig.defconfig.series
+++ b/soc/arm/nxp_imx/mimx8ml8_m7/Kconfig.defconfig.series
@@ -13,6 +13,10 @@ config NUM_IRQS
 	# must be >= the highest interrupt number used
 	default 159
 
+config GPIO_MCUX_IGPIO
+	default y if HAS_MCUX_IGPIO
+	depends on GPIO
+
 source "soc/arm/nxp_imx/mimx8ml8_m7/Kconfig.defconfig.mimx8ml8_m7"
 
 endif # SOC_SERIES_IMX8ML_M7
diff --git a/soc/arm/nxp_imx/mimx8ml8_m7/Kconfig.soc b/soc/arm/nxp_imx/mimx8ml8_m7/Kconfig.soc
index b638760f731..43572f1a047 100644
--- a/soc/arm/nxp_imx/mimx8ml8_m7/Kconfig.soc
+++ b/soc/arm/nxp_imx/mimx8ml8_m7/Kconfig.soc
@@ -15,6 +15,7 @@ config SOC_MIMX8ML8
 	select CPU_HAS_ARM_MPU
 	select CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS
 	select ARM_MPU
+	select HAS_MCUX_IGPIO
 
 endchoice