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soc: intel_adsp: set trace size to non-zero

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Looks like those two SoCs still had old header information depending on
Kconfig from SOF, remove those and set trace size directly.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2021-01-12 16:10:18 -05:00
commit f336a8ea1b
2 changed files with 0 additions and 8 deletions
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4
soc/xtensa/intel_adsp/cavs_v20/include/soc/memory.h
View file

@ -194,11 +194,7 @@
/* window 3 */
#define SRAM_TRACE_BASE (SRAM_STREAM_BASE + SRAM_STREAM_SIZE)
#if CONFIG_TRACE
#define SRAM_TRACE_SIZE 0x2000
#else
#define SRAM_TRACE_SIZE 0x0
#endif
#define HP_SRAM_WIN3_BASE SRAM_TRACE_BASE
#define HP_SRAM_WIN3_SIZE SRAM_TRACE_SIZE

4
soc/xtensa/intel_adsp/cavs_v25/include/soc/memory.h
View file

@ -195,11 +195,7 @@
/* window 3 */
#define SRAM_TRACE_BASE (SRAM_STREAM_BASE + SRAM_STREAM_SIZE)
#if CONFIG_TRACE
#define SRAM_TRACE_SIZE 0x2000
#else
#define SRAM_TRACE_SIZE 0x0
#endif
#define HP_SRAM_WIN3_BASE SRAM_TRACE_BASE
#define HP_SRAM_WIN3_SIZE SRAM_TRACE_SIZE