spi: Implement new spi api in the mcux dspi driver
Adds support for the new spi api to the mcux dspi shim driver. Does not remove support for the legacy spi api since there are still consumers of that api, particularly the mcr20a 802.15.4 driver. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This commit is contained in:
Maureen Helm
Carles Cufí
parent
65f6c96736
commit
ef5152ab22
3 changed files with 272 additions and 4 deletions
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@ -14,20 +14,33 @@
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#define SYS_LOG_LEVEL CONFIG_SYS_LOG_SPI_LEVEL
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#include <logging/sys_log.h>
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#ifndef CONFIG_SPI_LEGACY_API
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#include "spi_context.h"
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#endif
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struct spi_mcux_config {
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SPI_Type *base;
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clock_name_t clock_source;
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void (*irq_config_func)(struct device *dev);
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#ifdef CONFIG_SPI_LEGACY_API
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struct spi_config default_cfg;
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#endif
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};
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struct spi_mcux_data {
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dspi_master_handle_t handle;
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#ifdef CONFIG_SPI_LEGACY_API
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struct k_sem sync;
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status_t callback_status;
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u32_t slave;
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#else
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struct spi_context ctx;
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size_t transfer_len;
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#endif
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};
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#ifdef CONFIG_SPI_LEGACY_API
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static void spi_mcux_master_transfer_callback(SPI_Type *base,
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dspi_master_handle_t *handle, status_t status, void *userData)
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{
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@ -237,6 +250,238 @@ static const struct spi_driver_api spi_mcux_driver_api = {
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.transceive = spi_mcux_transceive,
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};
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#else
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static void spi_mcux_transfer_next_packet(struct device *dev)
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{
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const struct spi_mcux_config *config = dev->config->config_info;
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struct spi_mcux_data *data = dev->driver_data;
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SPI_Type *base = config->base;
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struct spi_context *ctx = &data->ctx;
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dspi_transfer_t transfer;
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status_t status;
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if ((ctx->tx_len == 0) && (ctx->rx_len == 0)) {
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/* nothing left to rx or tx, we're done! */
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spi_context_cs_control(&data->ctx, false);
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spi_context_complete(&data->ctx, 0);
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return;
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}
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transfer.configFlags = kDSPI_MasterCtar0 | kDSPI_MasterPcsContinuous |
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(ctx->config->slave << DSPI_MASTER_PCS_SHIFT);
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if (ctx->tx_len == 0) {
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/* rx only, nothing to tx */
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transfer.txData = NULL;
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transfer.rxData = ctx->rx_buf;
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transfer.dataSize = ctx->rx_len;
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} else if (ctx->rx_len == 0) {
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/* tx only, nothing to rx */
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transfer.txData = (u8_t *) ctx->tx_buf;
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transfer.rxData = NULL;
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transfer.dataSize = ctx->tx_len;
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} else if (ctx->tx_len == ctx->rx_len) {
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/* rx and tx are the same length */
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transfer.txData = (u8_t *) ctx->tx_buf;
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transfer.rxData = ctx->rx_buf;
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transfer.dataSize = ctx->tx_len;
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} else if (ctx->tx_len > ctx->rx_len) {
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/* Break up the tx into multiple transfers so we don't have to
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* rx into a longer intermediate buffer. Leave chip select
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* active between transfers.
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*/
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transfer.txData = (u8_t *) ctx->tx_buf;
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transfer.rxData = ctx->rx_buf;
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transfer.dataSize = ctx->rx_len;
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transfer.configFlags |= kDSPI_MasterActiveAfterTransfer;
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} else {
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/* Break up the rx into multiple transfers so we don't have to
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* tx from a longer intermediate buffer. Leave chip select
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* active between transfers.
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*/
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transfer.txData = (u8_t *) ctx->tx_buf;
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transfer.rxData = ctx->rx_buf;
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transfer.dataSize = ctx->tx_len;
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transfer.configFlags |= kDSPI_MasterActiveAfterTransfer;
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}
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if (!(ctx->tx_count <= 1 && ctx->rx_count <= 1)) {
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transfer.configFlags |= kDSPI_MasterActiveAfterTransfer;
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}
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data->transfer_len = transfer.dataSize;
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status = DSPI_MasterTransferNonBlocking(base, &data->handle, &transfer);
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if (status != kStatus_Success) {
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SYS_LOG_ERR("Transfer could not start");
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}
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}
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static void spi_mcux_isr(void *arg)
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{
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struct device *dev = (struct device *)arg;
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const struct spi_mcux_config *config = dev->config->config_info;
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struct spi_mcux_data *data = dev->driver_data;
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SPI_Type *base = config->base;
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DSPI_MasterTransferHandleIRQ(base, &data->handle);
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}
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static void spi_mcux_master_transfer_callback(SPI_Type *base,
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dspi_master_handle_t *handle, status_t status, void *userData)
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{
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struct device *dev = userData;
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struct spi_mcux_data *data = dev->driver_data;
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spi_context_update_tx(&data->ctx, 1, data->transfer_len);
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spi_context_update_rx(&data->ctx, 1, data->transfer_len);
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spi_mcux_transfer_next_packet(dev);
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}
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static int spi_mcux_configure(struct device *dev,
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const struct spi_config *spi_cfg)
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{
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const struct spi_mcux_config *config = dev->config->config_info;
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struct spi_mcux_data *data = dev->driver_data;
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SPI_Type *base = config->base;
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dspi_master_config_t master_config;
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u32_t clock_freq;
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u32_t word_size;
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DSPI_MasterGetDefaultConfig(&master_config);
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if (spi_cfg->slave > FSL_FEATURE_DSPI_CHIP_SELECT_COUNT) {
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SYS_LOG_ERR("Slave %d is greater than %d",
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spi_cfg->slave, FSL_FEATURE_DSPI_CHIP_SELECT_COUNT);
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return -EINVAL;
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}
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word_size = SPI_WORD_SIZE_GET(spi_cfg->operation);
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if (word_size > FSL_FEATURE_DSPI_MAX_DATA_WIDTH) {
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SYS_LOG_ERR("Word size %d is greater than %d",
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word_size, FSL_FEATURE_DSPI_MAX_DATA_WIDTH);
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return -EINVAL;
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}
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master_config.ctarConfig.bitsPerFrame = word_size;
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master_config.ctarConfig.cpol =
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(SPI_MODE_GET(spi_cfg->operation) & SPI_MODE_CPOL)
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? kDSPI_ClockPolarityActiveLow
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: kDSPI_ClockPolarityActiveHigh;
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master_config.ctarConfig.cpha =
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(SPI_MODE_GET(spi_cfg->operation) & SPI_MODE_CPHA)
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? kDSPI_ClockPhaseSecondEdge
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: kDSPI_ClockPhaseFirstEdge;
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master_config.ctarConfig.direction =
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(SPI_MODE_GET(spi_cfg->operation) & SPI_TRANSFER_LSB)
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? kDSPI_LsbFirst
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: kDSPI_MsbFirst;
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master_config.ctarConfig.baudRate = spi_cfg->frequency;
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clock_freq = CLOCK_GetFreq(config->clock_source);
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if (!clock_freq) {
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SYS_LOG_ERR("Got frequency of 0");
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return -EINVAL;
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}
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DSPI_MasterInit(base, &master_config, clock_freq);
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DSPI_MasterTransferCreateHandle(base, &data->handle,
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spi_mcux_master_transfer_callback, dev);
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data->ctx.config = spi_cfg;
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spi_context_cs_configure(&data->ctx);
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return 0;
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}
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static int transceive(struct device *dev,
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const struct spi_config *spi_cfg,
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const struct spi_buf_set *tx_bufs,
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const struct spi_buf_set *rx_bufs,
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bool asynchronous,
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struct k_poll_signal *signal)
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{
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struct spi_mcux_data *data = dev->driver_data;
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int ret;
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spi_context_lock(&data->ctx, asynchronous, signal);
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ret = spi_mcux_configure(dev, spi_cfg);
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if (ret) {
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goto out;
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}
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spi_context_buffers_setup(&data->ctx, tx_bufs, rx_bufs, 1);
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spi_context_cs_control(&data->ctx, true);
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spi_mcux_transfer_next_packet(dev);
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ret = spi_context_wait_for_completion(&data->ctx);
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out:
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spi_context_release(&data->ctx, ret);
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return ret;
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}
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static int spi_mcux_transceive(struct device *dev,
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const struct spi_config *spi_cfg,
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const struct spi_buf_set *tx_bufs,
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const struct spi_buf_set *rx_bufs)
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{
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return transceive(dev, spi_cfg, tx_bufs, rx_bufs, false, NULL);
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}
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#ifdef CONFIG_SPI_ASYNC
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static int spi_mcux_transceive_async(struct device *dev,
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const struct spi_config *spi_cfg,
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const struct spi_buf_set *tx_bufs,
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const struct spi_buf_set *rx_bufs,
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struct k_poll_signal *async)
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{
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return transceive(dev, spi_cfg, tx_bufs, rx_bufs, true, async);
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}
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#endif /* CONFIG_SPI_ASYNC */
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static int spi_mcux_release(struct device *dev,
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const struct spi_config *spi_cfg)
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{
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struct spi_mcux_data *data = dev->driver_data;
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spi_context_unlock_unconditionally(&data->ctx);
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return 0;
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}
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static int spi_mcux_init(struct device *dev)
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{
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const struct spi_mcux_config *config = dev->config->config_info;
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struct spi_mcux_data *data = dev->driver_data;
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config->irq_config_func(dev);
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spi_context_unlock_unconditionally(&data->ctx);
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return 0;
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}
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static const struct spi_driver_api spi_mcux_driver_api = {
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.transceive = spi_mcux_transceive,
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#ifdef CONFIG_SPI_ASYNC
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.transceive_async = spi_mcux_transceive_async,
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#endif
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.release = spi_mcux_release,
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};
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#endif /* CONFIG_SPI_LEGACY_API */
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#ifdef CONFIG_SPI_0
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static void spi_mcux_config_func_0(struct device *dev);
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@ -244,13 +489,20 @@ static const struct spi_mcux_config spi_mcux_config_0 = {
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.base = DSPI0,
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.clock_source = DSPI0_CLK_SRC,
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.irq_config_func = spi_mcux_config_func_0,
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#ifdef CONFIG_SPI_LEGACY_API
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.default_cfg = {
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.config = CONFIG_SPI_0_DEFAULT_CFG,
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.max_sys_freq = CONFIG_SPI_0_DEFAULT_BAUD_RATE,
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}
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#endif
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};
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static struct spi_mcux_data spi_mcux_data_0;
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static struct spi_mcux_data spi_mcux_data_0 = {
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#ifndef CONFIG_SPI_LEGACY_API
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SPI_CONTEXT_INIT_LOCK(spi_mcux_data_0, ctx),
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SPI_CONTEXT_INIT_SYNC(spi_mcux_data_0, ctx),
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#endif
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};
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DEVICE_AND_API_INIT(spi_mcux_0, CONFIG_SPI_0_NAME, &spi_mcux_init,
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&spi_mcux_data_0, &spi_mcux_config_0,
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@ -273,13 +525,20 @@ static const struct spi_mcux_config spi_mcux_config_1 = {
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.base = DSPI1,
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.clock_source = DSPI1_CLK_SRC,
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.irq_config_func = spi_mcux_config_func_1,
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#ifdef CONFIG_SPI_LEGACY_API
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.default_cfg = {
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.config = CONFIG_SPI_1_DEFAULT_CFG,
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.max_sys_freq = CONFIG_SPI_1_DEFAULT_BAUD_RATE,
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}
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#endif
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};
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static struct spi_mcux_data spi_mcux_data_1;
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static struct spi_mcux_data spi_mcux_data_1 = {
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#ifndef CONFIG_SPI_LEGACY_API
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SPI_CONTEXT_INIT_LOCK(spi_mcux_data_1, ctx),
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SPI_CONTEXT_INIT_SYNC(spi_mcux_data_1, ctx),
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#endif
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};
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DEVICE_AND_API_INIT(spi_mcux_1, CONFIG_SPI_1_NAME, &spi_mcux_init,
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&spi_mcux_data_1, &spi_mcux_config_1,
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@ -302,13 +561,20 @@ static const struct spi_mcux_config spi_mcux_config_2 = {
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.base = DSPI2,
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.clock_source = DSPI2_CLK_SRC,
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.irq_config_func = spi_mcux_config_func_2,
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#ifdef CONFIG_SPI_LEGACY_API
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.default_cfg = {
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.config = CONFIG_SPI_2_DEFAULT_CFG,
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.max_sys_freq = CONFIG_SPI_2_DEFAULT_BAUD_RATE,
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}
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#endif
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};
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static struct spi_mcux_data spi_mcux_data_2;
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static struct spi_mcux_data spi_mcux_data_2 = {
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#ifndef CONFIG_SPI_LEGACY_API
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SPI_CONTEXT_INIT_LOCK(spi_mcux_data_2, ctx),
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SPI_CONTEXT_INIT_SYNC(spi_mcux_data_2, ctx),
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#endif
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};
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DEVICE_AND_API_INIT(spi_mcux_2, CONFIG_SPI_2_NAME, &spi_mcux_init,
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&spi_mcux_data_2, &spi_mcux_config_2,
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