drivers: serial: Add Cypress PSoC6 UART driver
Added basic PSoC6 UART driver and added two UART nodes in the PSoC6 device tree to have output from CM0+ and CM4 cores. Signed-off-by: Nazar Chornenkyy <nazar.chornenkyy@cypress.com> Signed-off-by: Oleg Kapshii <oleg.kapshii@cypress.com>
This commit is contained in:
Nazar Chornenkyy
Anas Nashif
parent
93f938c44e
commit
edd6c7df41
5 changed files with 231 additions and 0 deletions
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@ -23,5 +23,6 @@ zephyr_library_sources_if_kconfig(uart_stellaris.c)
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zephyr_library_sources_if_kconfig(uart_stm32.c)
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zephyr_library_sources_if_kconfig(uart_sam0.c)
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zephyr_library_sources_if_kconfig(usart_mcux_lpc.c)
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zephyr_library_sources_if_kconfig(uart_psoc6.c)
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zephyr_library_sources_ifdef(CONFIG_USERSPACE uart_handlers.c)
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@ -101,4 +101,6 @@ source "drivers/serial/Kconfig.msp432p4xx"
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source "drivers/serial/Kconfig.sam0"
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source "drivers/serial/Kconfig.psoc6"
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endif
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25
drivers/serial/Kconfig.psoc6
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25
drivers/serial/Kconfig.psoc6
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@ -0,0 +1,25 @@
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# Kconfig - Cypress UART configuration
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#
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# Copyright (c) 2018 Cypress
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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menuconfig UART_PSOC6
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bool "PSoC6 MCU serial driver"
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select SERIAL_HAS_DRIVER
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depends on SOC_FAMILY_PSOC6
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help
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This option enables the UART driver for PSoC6 family of processors.
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config UART_PSOC6_UART_5
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bool "Enable PSOC6 SCB6 as UART_5 on Port 5"
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depends on UART_PSOC6
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help
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Enable support for UART_5 on port 5 in the driver.
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config UART_PSOC6_UART_6
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bool "Enable PSOC6 SCB6 as UART_6 on Port 12"
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depends on UART_PSOC6
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help
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Enable support for UART_6 on port 12 in the driver.
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171
drivers/serial/uart_psoc6.c
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171
drivers/serial/uart_psoc6.c
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@ -0,0 +1,171 @@
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/*
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* Copyright (c) 2018 Cypress
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* SPDX-License-Identifier: Apache-2.0
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*/
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/** @file
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* @brief UART driver for Cypress PSoC6 MCU family.
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*
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* Note:
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* - Error handling is not implemented.
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* - The driver works only in polling mode, interrupt mode is not implemented.
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*/
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#include <device.h>
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#include <errno.h>
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#include <init.h>
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#include <misc/__assert.h>
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#include <soc.h>
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#include <uart.h>
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#include <board.h>
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#include "cy_syslib.h"
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#include "cy_sysclk.h"
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#include "cy_gpio.h"
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#include "cy_scb_uart.h"
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/*
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* Verify Kconfig configuration
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*/
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struct cypress_psoc6_config {
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CySCB_Type *base;
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GPIO_PRT_Type *port;
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u32_t rx_num;
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u32_t tx_num;
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en_hsiom_sel_t rx_val;
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en_hsiom_sel_t tx_val;
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en_clk_dst_t scb_clock;
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};
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/* Populate configuration structure */
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static const cy_stc_scb_uart_config_t uartConfig = {
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.uartMode = CY_SCB_UART_STANDARD,
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.enableMutliProcessorMode = false,
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.smartCardRetryOnNack = false,
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.irdaInvertRx = false,
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.irdaEnableLowPowerReceiver = false,
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.oversample = CONFIG_UART_PSOC6_CONFIG_OVERSAMPLE,
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.enableMsbFirst = false,
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.dataWidth = CONFIG_UART_PSOC6_CONFIG_DATAWIDTH,
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.parity = CY_SCB_UART_PARITY_NONE,
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.stopBits = CY_SCB_UART_STOP_BITS_1,
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.enableInputFilter = false,
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.breakWidth = CONFIG_UART_PSOC6_CONFIG_BREAKWIDTH,
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.dropOnFrameError = false,
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.dropOnParityError = false,
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.receiverAddress = 0UL,
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.receiverAddressMask = 0UL,
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.acceptAddrInFifo = false,
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.enableCts = false,
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.ctsPolarity = CY_SCB_UART_ACTIVE_LOW,
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.rtsRxFifoLevel = 0UL,
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.rtsPolarity = CY_SCB_UART_ACTIVE_LOW,
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.rxFifoTriggerLevel = 0UL,
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.rxFifoIntEnableMask = 0UL,
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.txFifoTriggerLevel = 0UL,
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.txFifoIntEnableMask = 0UL,
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};
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/**
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* Function Name: uart_psoc6_init()
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*
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* Peforms hardware initialization: debug UART.
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*
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*/
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static int uart_psoc6_init(struct device *dev)
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{
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const struct cypress_psoc6_config *config = dev->config->config_info;
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/* Connect SCB5 UART function to pins */
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Cy_GPIO_SetHSIOM(config->port, config->rx_num, config->rx_val);
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Cy_GPIO_SetHSIOM(config->port, config->tx_num, config->tx_val);
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/* Configure pins for UART operation */
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Cy_GPIO_SetDrivemode(config->port, config->rx_num, CY_GPIO_DM_HIGHZ);
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Cy_GPIO_SetDrivemode(config->port, config->tx_num,
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CY_GPIO_DM_STRONG_IN_OFF);
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/* Connect assigned divider to be a clock source for UART */
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Cy_SysClk_PeriphAssignDivider(config->scb_clock,
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CONFIG_UART_PSOC6_UART_CLK_DIV_TYPE,
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CONFIG_UART_PSOC6_UART_CLK_DIV_NUMBER);
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Cy_SysClk_PeriphSetDivider(CONFIG_UART_PSOC6_UART_CLK_DIV_TYPE,
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CONFIG_UART_PSOC6_UART_CLK_DIV_NUMBER,
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CONFIG_UART_PSOC6_UART_CLK_DIV_VAL);
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Cy_SysClk_PeriphEnableDivider(CONFIG_UART_PSOC6_UART_CLK_DIV_TYPE,
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CONFIG_UART_PSOC6_UART_CLK_DIV_NUMBER);
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/* Configure UART to operate */
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(void) Cy_SCB_UART_Init(config->base, &uartConfig, NULL);
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Cy_SCB_UART_Enable(config->base);
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return 0;
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}
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static int uart_psoc6_poll_in(struct device *dev, unsigned char *c)
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{
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const struct cypress_psoc6_config *config = dev->config->config_info;
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u32_t rec;
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rec = Cy_SCB_UART_Get(config->base);
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*c = (unsigned char)(rec & 0xff);
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return ((rec == CY_SCB_UART_RX_NO_DATA) ? -1 : 0);
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}
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static unsigned char uart_psoc6_poll_out(struct device *dev, unsigned char c)
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{
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const struct cypress_psoc6_config *config = dev->config->config_info;
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while (Cy_SCB_UART_Put(config->base, (uint32_t)c) != 1UL)
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;
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return c;
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}
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static const struct uart_driver_api uart_psoc6_driver_api = {
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.poll_in = uart_psoc6_poll_in,
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.poll_out = uart_psoc6_poll_out,
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};
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#ifdef CONFIG_UART_PSOC6_UART_5
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static const struct cypress_psoc6_config cypress_psoc6_uart5_config = {
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.base = CONFIG_UART_PSOC6_UART_5_BASE_ADDRESS,
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.port = CONFIG_UART_PSOC6_UART_5_PORT,
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.rx_num = CONFIG_UART_PSOC6_UART_5_RX_NUM,
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.tx_num = CONFIG_UART_PSOC6_UART_5_TX_NUM,
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.rx_val = CONFIG_UART_PSOC6_UART_5_RX_VAL,
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.tx_val = CONFIG_UART_PSOC6_UART_5_TX_VAL,
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.scb_clock = CONFIG_UART_PSOC6_UART_5_CLOCK,
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};
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DEVICE_AND_API_INIT(uart_5, CONFIG_UART_PSOC6_UART_5_NAME,
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uart_psoc6_init, NULL,
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&cypress_psoc6_uart5_config,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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(void *)&uart_psoc6_driver_api);
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#endif /* CONFIG_UART_PSOC6_UART_5 */
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#ifdef CONFIG_UART_PSOC6_UART_6
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static const struct cypress_psoc6_config cypress_psoc6_uart6_config = {
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.base = CONFIG_UART_PSOC6_UART_6_BASE_ADDRESS,
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.port = CONFIG_UART_PSOC6_UART_6_PORT,
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.rx_num = CONFIG_UART_PSOC6_UART_6_RX_NUM,
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.tx_num = CONFIG_UART_PSOC6_UART_6_TX_NUM,
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.rx_val = CONFIG_UART_PSOC6_UART_6_RX_VAL,
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.tx_val = CONFIG_UART_PSOC6_UART_6_TX_VAL,
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.scb_clock = CONFIG_UART_PSOC6_UART_6_CLOCK,
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};
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DEVICE_AND_API_INIT(uart_6, CONFIG_UART_PSOC6_UART_6_NAME,
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uart_psoc6_init, NULL,
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&cypress_psoc6_uart6_config,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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(void *)&uart_psoc6_driver_api);
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#endif /* CONFIG_UART_PSOC6_UART_6 */
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32
dts/bindings/serial/cypress,psoc6-uart.yaml
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32
dts/bindings/serial/cypress,psoc6-uart.yaml
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@ -0,0 +1,32 @@
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#
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# Copyright (c) 2018, Cypress
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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---
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title: CYPRESS UART
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id: cypress,psoc6-uart
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version: 0.1
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description: >
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This binding gives a base representation of the Cypress UART
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inherits:
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!include uart.yaml
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properties:
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compatible:
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constraint: "cypress,psoc6-uart"
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reg:
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type: array
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description: mmio register space
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generation: define
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category: required
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interrupts:
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type: array
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category: required
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description: required interrupts
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generation: define
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...
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