soc: intel_adsp: Clean up shim driver

Each platform was defining its own shim.h header, with slightly
variant field definitions, for a register block that is almost
completely compatible between versions.  This is made worse by the
fact that these represent an API imported fairly early from SOF, the
upstream version of which has since diverged.

Move the existing shim struct into a header ("cavs-shim.h") of its
own, remove a bunch of unused symbols, fill in definitions for some
registers that were left out, correct naming to match the hardware
docs in a few places, make sure all hardware dependencies are source
from devicetree only, and modify existing usage to use the new API
exclusively.

Interestingly this leaves the older shim.h header in place, as it
turns out to contain definitions for a bunch of things that were never
part of the shim register block.  Those will be unified in separate
patches.

Finally: note that the existing IPM_CAVS_IDC driver (soon to be
removed from all the intel_adsp soc's) is still using the old API, so
redeclare the minimal subset that it needs for the benefit of the
platforms in transition.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

soc/xtensa/intel_adsp/common/bootloader/boot_entry.S

@@ -13,12 +13,18 @@
  * 2) Stack is in first HPSRAM bank.
  */
 
+#include <devicetree.h>
 #include <soc/shim.h>
+#include <cavs-shim.h>
 #include <soc/platform.h>
 #include <soc/memory.h>
 #include <xtensa/corebits.h>
 #include <xtensa/config/core-isa.h>
 
+#define SHIM_ADDR DT_REG_ADDR(DT_NODELABEL(shim))
+#define SHIM_L2_MECS (SHIM_ADDR + 0xd0)
+#define SHIM_L2_PREF_CFG (SHIM_ADDR + 0x508)
+
 	.type   boot_master_core, @function
 
 	.begin	literal_prefix	.boot_entry
@@ -66,7 +72,7 @@ wnd0_error_address:
 
 #if defined(PLATFORM_MEM_INIT_AT_BOOT)
 shim_ldoctl_address:
-	.word SHIM_BASE + SHIM_LDOCTL
+	.word (SHIM_ADDR + 0xa4)
 
 ldoctl_hpsram_ldo_on:
 	.word SHIM_LDOCTL_HPSRAM_LDO_ON